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Change <b28> to HTT (Hyperthreading technology). If this flag is set then

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cpuid with %eax=1 will return a logical cpu count in bits 16-23 of %ebx.
Bit 29 is actually 'TM' according to AP-485.  This signifies the presence
of the thermal control circuit (which I believe can slow the clock down
to reduce core temperature).
This commit is contained in:
Peter Wemm 2002-01-16 02:22:19 +00:00
parent 8868a7d8a2
commit c056a3ab57
2 changed files with 6 additions and 6 deletions
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6
sys/amd64/amd64/identcpu.c
View File

@ -578,7 +578,7 @@ printcpuinfo(void)
"\010MCE" /* Machine Check support */
"\011CX8" /* CMPEXCH8 instruction */
"\012APIC" /* SMP local APIC */
"\013oldMTRR"
"\013oldMTRR" /* Previous implementation of MTRR */
"\014SEP" /* Fast System Call */
"\015MTRR" /* Memory Type Range Registers */
"\016PGE" /* PG_G (global bit) support */
@ -596,8 +596,8 @@ printcpuinfo(void)
"\032SSE" /* Streaming SIMD Extensions */
"\033SSE2" /* Streaming SIMD Extensions #2 */
"\034SS" /* Self snoop */
"\035<b28>"
"\036ACC" /* Auto Clock Correction (TCC/ACPI) */
"\035HTT" /* Hyperthreading (see EBX bit 16-23) */
"\036TM" /* Thermal Monintor clock slowdown */
"\037IA64" /* CPU can execute IA64 instructions */
"\040<b31>"
);

6
sys/i386/i386/identcpu.c
View File

@ -578,7 +578,7 @@ printcpuinfo(void)
"\010MCE" /* Machine Check support */
"\011CX8" /* CMPEXCH8 instruction */
"\012APIC" /* SMP local APIC */
"\013oldMTRR"
"\013oldMTRR" /* Previous implementation of MTRR */
"\014SEP" /* Fast System Call */
"\015MTRR" /* Memory Type Range Registers */
"\016PGE" /* PG_G (global bit) support */
@ -596,8 +596,8 @@ printcpuinfo(void)
"\032SSE" /* Streaming SIMD Extensions */
"\033SSE2" /* Streaming SIMD Extensions #2 */
"\034SS" /* Self snoop */
"\035<b28>"
"\036ACC" /* Auto Clock Correction (TCC/ACPI) */
"\035HTT" /* Hyperthreading (see EBX bit 16-23) */
"\036TM" /* Thermal Monintor clock slowdown */
"\037IA64" /* CPU can execute IA64 instructions */
"\040<b31>"
);