Initial OMAP4 WUGEN pass-through driver. SPI interrupts are passed
through WUGEN to GIC. Hardware initialization is left in state after reset as well as before. This is needed after an update of Linux dts files.
This commit is contained in:
Svatopluk Kraus
parent
5f250b53e8
commit
c2849e3c11
@ -12,6 +12,7 @@ arm/ti/omap4/omap4_l2cache.c optional pl310
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arm/ti/omap4/omap4_prcm_clks.c standard
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arm/ti/omap4/omap4_scm_padconf.c standard
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arm/ti/omap4/omap4_mp.c optional smp
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arm/ti/omap4/omap4_wugen.c standard
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arm/ti/twl/twl.c optional twl
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arm/ti/twl/twl_vreg.c optional twl twl_vreg
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228
sys/arm/ti/omap4/omap4_wugen.c
Normal file
228
sys/arm/ti/omap4/omap4_wugen.c
Normal file
@ -0,0 +1,228 @@
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/*-
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* Copyright (c) 2016 Svatopluk Kraus
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* Copyright (c) 2016 Michal Meloun
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/systm.h>
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#include <machine/fdt.h>
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#include <machine/intr.h>
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#include <machine/resource.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "pic_if.h"
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static struct ofw_compat_data compat_data[] = {
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{"ti,omap4-wugen-mpu", 1},
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{NULL, 0}
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};
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struct omap4_wugen_sc {
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device_t sc_dev;
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struct resource *sc_mem_res;
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device_t sc_parent;
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};
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static int
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omap4_wugen_register(device_t dev, struct intr_irqsrc *isrc,
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boolean_t *is_percpu)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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return (PIC_REGISTER(sc->sc_parent, isrc, is_percpu));
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}
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static int
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omap4_wugen_unregister(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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return (PIC_UNREGISTER(sc->sc_parent, isrc));
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}
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static void
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omap4_wugen_enable_source(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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PIC_ENABLE_SOURCE(sc->sc_parent, isrc);
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}
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static void
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omap4_wugen_disable_source(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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PIC_DISABLE_SOURCE(sc->sc_parent, isrc);
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}
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static void
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omap4_wugen_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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PIC_ENABLE_INTR(sc->sc_parent, isrc);
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}
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static void
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omap4_wugen_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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PIC_PRE_ITHREAD(sc->sc_parent, isrc);
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}
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static void
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omap4_wugen_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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PIC_POST_ITHREAD(sc->sc_parent, isrc);
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}
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static void
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omap4_wugen_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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PIC_POST_FILTER(sc->sc_parent, isrc);
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}
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#ifdef SMP
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static int
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omap4_wugen_bind(device_t dev, struct intr_irqsrc *isrc)
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{
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struct omap4_wugen_sc *sc = device_get_softc(dev);
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return (PIC_BIND(sc->sc_parent, isrc));
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}
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#endif
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static int
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omap4_wugen_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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return (BUS_PROBE_DEFAULT);
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}
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static int
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omap4_wugen_detach(device_t dev)
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{
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struct omap4_wugen_sc *sc;
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sc = device_get_softc(dev);
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if (sc->sc_mem_res != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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sc->sc_mem_res = NULL;
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}
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return (0);
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}
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static int
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omap4_wugen_attach(device_t dev)
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{
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struct omap4_wugen_sc *sc;
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phandle_t node;
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phandle_t parent_xref;
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int rid, rv;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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node = ofw_bus_get_node(dev);
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rv = OF_getencprop(node, "interrupt-parent", &parent_xref,
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sizeof(parent_xref));
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if (rv <= 0) {
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device_printf(dev, "can't read parent node property\n");
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goto fail;
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}
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sc->sc_parent = OF_device_from_xref(parent_xref);
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if (sc->sc_parent == NULL) {
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device_printf(dev, "can't find parent controller\n");
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goto fail;
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}
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->sc_mem_res == NULL) {
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device_printf(dev, "can't allocate resources\n");
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return (ENXIO);
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}
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if (intr_pic_register(dev, OF_xref_from_node(node)) != 0) {
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device_printf(dev, "can't register PIC\n");
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goto fail;
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}
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return (0);
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fail:
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omap4_wugen_detach(dev);
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return (ENXIO);
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}
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static device_method_t omap4_wugen_methods[] = {
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DEVMETHOD(device_probe, omap4_wugen_probe),
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DEVMETHOD(device_attach, omap4_wugen_attach),
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DEVMETHOD(device_detach, omap4_wugen_detach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_register, omap4_wugen_register),
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DEVMETHOD(pic_unregister, omap4_wugen_unregister),
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DEVMETHOD(pic_enable_source, omap4_wugen_enable_source),
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DEVMETHOD(pic_disable_source, omap4_wugen_disable_source),
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DEVMETHOD(pic_enable_intr, omap4_wugen_enable_intr),
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DEVMETHOD(pic_pre_ithread, omap4_wugen_pre_ithread),
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DEVMETHOD(pic_post_ithread, omap4_wugen_post_ithread),
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DEVMETHOD(pic_post_filter, omap4_wugen_post_filter),
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#ifdef SMP
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DEVMETHOD(pic_bind, omap4_wugen_bind),
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#endif
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DEVMETHOD_END
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};
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devclass_t omap4_wugen_devclass;
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DEFINE_CLASS_0(omap4_wugen, omap4_wugen_driver, omap4_wugen_methods,
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sizeof(struct omap4_wugen_sc));
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EARLY_DRIVER_MODULE(omap4_wugen, simplebus, omap4_wugen_driver,
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omap4_wugen_devclass, NULL, NULL,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1);
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