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powerpc: Fix moea64 pmap from 347952

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vm_paddr_t is only 32 bits on AIM32 (currently), causing a build failure with
the shifting.

MFC after:	2 weeks
MFC with:	r347952
This commit is contained in:
Justin Hibbits 2019-05-18 14:55:59 +00:00
parent fd0be988cb
commit c3acaec564
1 changed files with 4 additions and 0 deletions
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4
sys/powerpc/aim/mmu_oea64.c
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@ -127,8 +127,12 @@ static struct mtx_padalign pv_lock[PV_LOCK_COUNT];
* NUMA domains on POWER9 appear to be indexed as sparse memory spaces, with the * NUMA domains on POWER9 appear to be indexed as sparse memory spaces, with the
* index at (N << 45). * index at (N << 45).
*/ */
#ifdef __powerpc64__
#define PV_LOCK_IDX(pa) (pa_index(pa) % PV_LOCK_PER_DOM + \ #define PV_LOCK_IDX(pa) (pa_index(pa) % PV_LOCK_PER_DOM + \
(((pa) >> 45) % MAXMEMDOM) * PV_LOCK_PER_DOM) (((pa) >> 45) % MAXMEMDOM) * PV_LOCK_PER_DOM)
#else
#define PV_LOCK_IDX(pa) (pa_index(pa) % PV_LOCK_COUNT)
#endif
#define PV_LOCKPTR(pa) ((struct mtx *)(&pv_lock[PV_LOCK_IDX(pa)])) #define PV_LOCKPTR(pa) ((struct mtx *)(&pv_lock[PV_LOCK_IDX(pa)]))
#define PV_LOCK(pa) mtx_lock(PV_LOCKPTR(pa)) #define PV_LOCK(pa) mtx_lock(PV_LOCKPTR(pa))
#define PV_UNLOCK(pa) mtx_unlock(PV_LOCKPTR(pa)) #define PV_UNLOCK(pa) mtx_unlock(PV_LOCKPTR(pa))