Adapt CATR() to r222813. This is somewhat tricky as we can't afford using
more than three temporary register in several places CATR() is used so this code trades instructions in for registers. Actually, this still isn't sufficient and CATR() has the side-effect of clobbering %y. Luckily, with the current uses of CATR() this either doesn't matter or we are able to (save and) restore it. Now that there's only one use of AND() and TEST() left inline these.
This commit is contained in:
Marius Strobl
parent
3bd5692b1f
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c40847145b
@ -40,16 +40,6 @@
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#else
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#define AND(var, mask, r1, r2) \
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SET(var, r2, r1) ; \
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lduw [r1], r2 ; \
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and r2, mask, r1
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#define TEST(var, mask, r1, r2, l1) \
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AND(var, mask, r1, r2) ; \
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brz r1, l1 ## f ; \
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nop
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/*
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* XXX could really use another register...
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*/
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@ -79,15 +69,37 @@ l2: add r2, 1, r3 ; \
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SET(l1 ## b, r3, r2) ; \
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stx r2, [r1 + KTR_DESC]
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/*
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* NB: this clobbers %y.
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*/
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#define CATR(mask, desc, r1, r2, r3, l1, l2, l3) \
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set mask, r1 ; \
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TEST(ktr_mask, r1, r2, r2, l3) ; \
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lduw [PCPU(MID)], r1 ; \
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SET(ktr_mask, r3, r2) ; \
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lduw [r2], r2 ; \
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and r2, r1, r1 ; \
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brz r1, l3 ## f ; \
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nop ; \
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lduw [PCPU(CPUID)], r2 ; \
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mov _NCPUBITS, r3 ; \
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mov %g0, %y ; \
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udiv r2, r3, r2 ; \
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srl r2, 0, r2 ; \
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sllx r2, PTR_SHIFT, r2 ; \
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SET(ktr_cpumask, r3, r1) ; \
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ldx [r1 + r2], r1 ; \
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lduw [PCPU(CPUID)], r2 ; \
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mov _NCPUBITS, r3 ; \
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mov %g0, %y ; \
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udiv r2, r3, r2 ; \
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srl r2, 0, r2 ; \
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smul r2, r3, r3 ; \
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lduw [PCPU(CPUID)], r2 ; \
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sub r2, r3, r3 ; \
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mov 1, r2 ; \
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sllx r2, r1, r1 ; \
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#ifdef notyet \
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TEST(ktr_cpumask, r1, r2, r3, l3) ; \
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#endif \
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sllx r2, r3, r2 ; \
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andn r1, r2, r1 ; \
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brz r1, l3 ## f ; \
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nop ; \
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ATR(desc, r1, r2, r3, l1, l2)
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#endif /* LOCORE */
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@ -2615,9 +2615,9 @@ ENTRY(tl0_ret)
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andn %l4, TSTATE_CWP_MASK, %g2
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/*
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* Restore %y. Could also be below if we had more alternate globals.
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* Save %y in an alternate global.
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*/
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wr %l5, 0, %y
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mov %l5, %g4
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/*
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* Setup %wstate for return. We need to restore the user window state
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@ -2662,8 +2662,8 @@ tl0_ret_fill:
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* Fixup %tstate so the saved %cwp points to the current window and
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* restore it.
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*/
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rdpr %cwp, %g4
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wrpr %g2, %g4, %tstate
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rdpr %cwp, %g1
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wrpr %g2, %g1, %tstate
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/*
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* Restore the user window state. The transition bit was set above
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@ -2673,19 +2673,24 @@ tl0_ret_fill:
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#if KTR_COMPILE & KTR_TRAP
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CATR(KTR_TRAP, "tl0_ret: td=%#lx pil=%#lx pc=%#lx npc=%#lx sp=%#lx"
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, %g2, %g3, %g4, 7, 8, 9)
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ldx [PCPU(CURTHREAD)], %g3
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stx %g3, [%g2 + KTR_PARM1]
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rdpr %pil, %g3
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stx %g3, [%g2 + KTR_PARM2]
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rdpr %tpc, %g3
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stx %g3, [%g2 + KTR_PARM3]
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rdpr %tnpc, %g3
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stx %g3, [%g2 + KTR_PARM4]
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stx %sp, [%g2 + KTR_PARM5]
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, %g1, %g2, %g3, 7, 8, 9)
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ldx [PCPU(CURTHREAD)], %g2
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stx %g2, [%g1 + KTR_PARM1]
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rdpr %pil, %g2
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stx %g2, [%g1 + KTR_PARM2]
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rdpr %tpc, %g2
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stx %g2, [%g1 + KTR_PARM3]
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rdpr %tnpc, %g2
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stx %g2, [%g1 + KTR_PARM4]
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stx %sp, [%g1 + KTR_PARM5]
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9:
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#endif
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/*
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* Restore %y. Note that the CATR above clobbered it.
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*/
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wr %g4, 0, %y
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/*
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* Return to usermode.
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*/
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@ -2700,6 +2705,11 @@ tl0_ret_fill_end:
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stx %l5, [%l0 + KTR_PARM2]
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stx %sp, [%l0 + KTR_PARM3]
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9:
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/*
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* Restore %y clobbered by the CATR. This was saved in %l5 above.
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*/
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wr %l5, 0, %y
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#endif
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/*
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@ -2867,34 +2877,36 @@ ENTRY(tl1_ret)
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andn %l0, TSTATE_CWP_MASK, %g1
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mov %l1, %g2
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mov %l2, %g3
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mov %l4, %g4
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wrpr %l3, 0, %pil
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wr %l4, 0, %y
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restore
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wrpr %g0, 2, %tl
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rdpr %cwp, %g4
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wrpr %g1, %g4, %tstate
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wrpr %g2, 0, %tpc
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wrpr %g3, 0, %tnpc
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rdpr %cwp, %g2
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wrpr %g1, %g2, %tstate
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#if KTR_COMPILE & KTR_TRAP
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CATR(KTR_TRAP, "tl1_ret: td=%#lx pil=%#lx ts=%#lx pc=%#lx sp=%#lx"
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, %g2, %g3, %g4, 7, 8, 9)
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ldx [PCPU(CURTHREAD)], %g3
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stx %g3, [%g2 + KTR_PARM1]
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rdpr %pil, %g3
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stx %g3, [%g2 + KTR_PARM2]
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rdpr %tstate, %g3
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stx %g3, [%g2 + KTR_PARM3]
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rdpr %tpc, %g3
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stx %g3, [%g2 + KTR_PARM4]
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stx %sp, [%g2 + KTR_PARM5]
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, %g1, %g2, %g3, 7, 8, 9)
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ldx [PCPU(CURTHREAD)], %g2
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stx %g2, [%g1 + KTR_PARM1]
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rdpr %pil, %g2
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stx %g2, [%g1 + KTR_PARM2]
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rdpr %tstate, %g2
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stx %g2, [%g1 + KTR_PARM3]
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rdpr %tpc, %g2
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stx %g2, [%g1 + KTR_PARM4]
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stx %sp, [%g1 + KTR_PARM5]
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9:
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#endif
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wr %g4, 0, %y
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retry
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END(tl1_ret)
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@ -2995,33 +3007,35 @@ ENTRY(tl1_intr)
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andn %l0, TSTATE_CWP_MASK, %g1
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mov %l1, %g2
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mov %l2, %g3
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mov %l4, %g4
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wrpr %l3, 0, %pil
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wr %l4, 0, %y
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restore
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wrpr %g0, 2, %tl
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rdpr %cwp, %g4
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wrpr %g1, %g4, %tstate
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wrpr %g2, 0, %tpc
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wrpr %g3, 0, %tnpc
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rdpr %cwp, %g2
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wrpr %g1, %g2, %tstate
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#if KTR_COMPILE & KTR_INTR
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CATR(KTR_INTR, "tl1_intr: td=%#x pil=%#lx ts=%#lx pc=%#lx sp=%#lx"
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, %g2, %g3, %g4, 7, 8, 9)
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ldx [PCPU(CURTHREAD)], %g3
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stx %g3, [%g2 + KTR_PARM1]
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rdpr %pil, %g3
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stx %g3, [%g2 + KTR_PARM2]
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rdpr %tstate, %g3
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stx %g3, [%g2 + KTR_PARM3]
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rdpr %tpc, %g3
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stx %g3, [%g2 + KTR_PARM4]
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stx %sp, [%g2 + KTR_PARM5]
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, %g1, %g2, %g3, 7, 8, 9)
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ldx [PCPU(CURTHREAD)], %g2
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stx %g2, [%g1 + KTR_PARM1]
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rdpr %pil, %g2
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stx %g2, [%g1 + KTR_PARM2]
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rdpr %tstate, %g2
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stx %g2, [%g1 + KTR_PARM3]
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rdpr %tpc, %g2
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stx %g2, [%g1 + KTR_PARM4]
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stx %sp, [%g1 + KTR_PARM5]
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9:
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#endif
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wr %g4, 0, %y
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retry
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END(tl1_intr)
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@ -269,13 +269,17 @@ ENTRY(mp_startup)
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add %l1, %l2, %l1
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sub %l1, SPOFF + CCFSZ, %sp
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/* Initialize global registers. */
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call cpu_setregs
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mov %l1, %o0
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#if KTR_COMPILE & KTR_SMP
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CATR(KTR_SMP,
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"mp_startup: bootstrap cpuid=%d mid=%d pcpu=%#lx data=%#lx sp=%#lx"
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, %g1, %g2, %g3, 7, 8, 9)
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lduw [%l1 + PC_CPUID], %g2
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lduw [PCPU(CPUID)], %g2
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stx %g2, [%g1 + KTR_PARM1]
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lduw [%l1 + PC_MID], %g2
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lduw [PCPU(MID)], %g2
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stx %g2, [%g1 + KTR_PARM2]
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stx %l1, [%g1 + KTR_PARM3]
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stx %sp, [%g1 + KTR_PARM5]
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@ -457,9 +457,6 @@ cpu_mp_bootstrap(struct pcpu *pc)
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*/
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tlb_flush_nonlocked();
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/* Initialize global registers. */
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cpu_setregs(pc);
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/*
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* Enable interrupts.
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* Note that the PIL we be lowered indirectly via sched_throw(NULL)
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