This isn't used, so remove it. It isn't relevant to most mips platforms.
This commit is contained in:
Warner Losh
parent
b86c3f2930
commit
c4738b2d88
@ -1,194 +0,0 @@
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/*-
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* Copyright (c) 1997-2001, 2005, Juniper Networks, Inc.
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* All rights reserved.
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*
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* ns16550.h -- NS16550 DUART Device Driver, used on Atlas, SCB and NIC
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*
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* Michael Beesley, April 1997
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* Highly leveraged from the Atlas device driver written by Jim Hayes
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*
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* JNPR: ns16550.h,v 1.2.4.1 2007/09/10 07:51:14 girish
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* $FreeBSD$
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*/
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#ifndef __NS16550_H__
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#define __NS16550_H__
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/* speed to initialize to during chip tests */
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#define SIO_TEST_SPEED 9600
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/* default serial console speed if not set with sysctl or probed from boot */
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#ifndef CONSPEED
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#define CONSPEED 9600
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#endif
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/* default serial gdb speed if not set with sysctl or probed from boot */
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#ifndef GDBSPEED
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#define GDBSPEED CONSPEED
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#endif
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#define IO_COMSIZE 8 /* 8250, 16x50 com controllers */
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/*
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* NS16550 UART registers
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*/
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/* 8250 registers #[0-6]. */
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#define IER_ERXRDY 0x1
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#define IER_ETXRDY 0x2
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#define IER_ERLS 0x4
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#define IER_EMSC 0x8
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#define IIR_IMASK 0xf
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#define IIR_RXTOUT 0xc
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#define IIR_RLS 0x6
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#define IIR_RXRDY 0x4
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#define IIR_TXRDY 0x2
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#define IIR_NOPEND 0x1
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#define IIR_MLSC 0x0
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#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
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#define LCR_DLAB 0x80
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#define CFCR_DLAB LCR_DLAB
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#define LCR_EFR_ENABLE 0xbf /* magic to enable EFR on 16650 up */
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#define CFCR_EFR_ENABLE LCR_EFR_ENABLE
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#define LCR_SBREAK 0x40
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#define CFCR_SBREAK LCR_SBREAK
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#define LCR_PZERO 0x30
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#define CFCR_PZERO LCR_PZERO
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#define LCR_PONE 0x20
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#define CFCR_PONE LCR_PONE
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#define LCR_PEVEN 0x10
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#define CFCR_PEVEN LCR_PEVEN
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#define LCR_PODD 0x00
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#define CFCR_PODD LCR_PODD
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#define LCR_PENAB 0x08
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#define CFCR_PENAB LCR_PENAB
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#define LCR_STOPB 0x04
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#define CFCR_STOPB LCR_STOPB
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#define LCR_8BITS 0x03
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#define CFCR_8BITS LCR_8BITS
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#define LCR_7BITS 0x02
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#define CFCR_7BITS LCR_7BITS
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#define LCR_6BITS 0x01
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#define CFCR_6BITS LCR_6BITS
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#define LCR_5BITS 0x00
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#define CFCR_5BITS LCR_5BITS
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#define MCR_PRESCALE 0x80 /* only available on 16650 up */
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#define MCR_LOOPBACK 0x10
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#define MCR_IE 0x08
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#define MCR_IENABLE MCR_IE
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#define MCR_DRS 0x04
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#define MCR_RTS 0x02
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#define MCR_DTR 0x01
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#define LSR_RCV_FIFO 0x80
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#define LSR_TEMT 0x40
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#define LSR_TSRE LSR_TEMT
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#define LSR_THRE 0x20
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#define LSR_TXRDY LSR_THRE
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#define LSR_BI 0x10
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#define LSR_FE 0x08
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#define LSR_PE 0x04
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#define LSR_OE 0x02
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#define LSR_RXRDY 0x01
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#define LSR_RCV_MASK 0x1f
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#define MSR_DCD 0x80
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#define MSR_RI 0x40
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#define MSR_DSR 0x20
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#define MSR_CTS 0x10
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#define MSR_DDCD 0x08
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#define MSR_TERI 0x04
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#define MSR_DDSR 0x02
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#define MSR_DCTS 0x01
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#define FCR_ENABLE 0x01
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#define FIFO_ENABLE FCR_ENABLE
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#define FCR_RCV_RST 0x02
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#define FIFO_RCV_RST FCR_RCV_RST
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#define FCR_XMT_RST 0x04
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#define FIFO_XMT_RST FCR_XMT_RST
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#define FCR_DMA 0x08
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#define FIFO_DMA_MODE FCR_DMA
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#define FCR_RX_LOW 0x00
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#define FIFO_RX_LOW FCR_RX_LOW
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#define FCR_RX_MEDL 0x40
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#define FIFO_RX_MEDL FCR_RX_MEDL
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#define FCR_RX_MEDH 0x80
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#define FIFO_RX_MEDH FCR_RX_MEDH
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#define FCR_RX_HIGH 0xc0
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#define FIFO_RX_HIGH FCR_RX_HIGH
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/* 16650 registers #2,[4-7]. Access enabled by LCR_EFR_ENABLE. */
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#define EFR_CTS 0x80
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#define EFR_AUTOCTS EFR_CTS
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#define EFR_RTS 0x40
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#define EFR_AUTORTS EFR_RTS
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#define EFR_EFE 0x10 /* enhanced functions enable */
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#define com_data 0 /* data register (R) */
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#define com_rdata 0 /* data register (R) */
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#define com_tdata 0 /* data register (W) */
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#define com_dlbl 0 /* divisor latch low (W) */
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#define com_dlbh 0x4 /* divisor latch high (W) */
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#define com_ier 0x4 /* interrupt enable (W) */
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#define com_iir 0x8 /* interrupt identification (R) */
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#define com_fifo 0x8 /* FIFO control (W) */
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#define com_lctl 0xc /* line control register (R/W) */
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#define com_cfcr 0xc /* line control register (R/W) */
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#define com_mcr 0x10 /* modem control register (R/W) */
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#define com_lsr 0x14 /* line status register (R/W) */
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#define com_msr 0x18 /* modem status register (R/W) */
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#define NS16550_HZ (33300000) /* 33.3 Mhz */
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#define DEFAULT_RCLK (33300000)
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#define NS16550_PAD(x)
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/*
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* ns16550_device: Structure to lay down over the device registers
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* Note: all accesses are 8-bit reads and writes
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*/
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typedef struct {
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volatile u_int32_t data; /* data register (R/W) */
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volatile u_int32_t ier; /* interrupt enable (W) */
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volatile u_int32_t iir; /* interrupt identification (R) */
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volatile u_int32_t cfcr; /* line control register (R/W) */
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volatile u_int32_t mcr; /* modem control register (R/W) */
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volatile u_int32_t lsr; /* line status register (R/W) */
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volatile u_int32_t msr; /* modem status register (R/W) */
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volatile u_int32_t scr; /* scratch register (R/W) */
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} ns16550_device;
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#define com_lcr com_cfcr
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#define com_efr com_fifo
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#define NS16550_SYNC __asm __volatile ("sync")
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#define NS16550_DEVICE (1<<0)
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#define TI16C752B_DEVICE (1<<1)
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#define fifo iir /* 16550 fifo control (W) */
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/* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
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#define BRTC(x) (NS16550_HZ / (16*(x)))
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#define PA_2_K1VA(a) (MIPS_UNCACHED_MEMORY_ADDR | (a))
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#ifdef COMBRD
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#undef COMBRD
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#define COMBRD(x) (NS16550_HZ / (16*(x)))
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#endif
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void uart_post_init(u_int32_t addr);
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void puts_post(u_int32_t addr, const char *char_p);
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void hexout_post(u_int32_t addr, u_int32_t value, int num_chars);
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#endif /* __NS16550_H__ */
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/* end of file */
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@ -93,7 +93,6 @@ __FBSDID("$FreeBSD$");
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#endif
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#include <sys/random.h>
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#include <machine/ns16550.h>
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#include <net/if.h>
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#define BOOTINFO_DEBUG 0
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@ -293,19 +292,6 @@ mips_proc0_init(void)
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PCPU_SET(curpcb, thread0.td_pcb);
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}
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#ifdef DEBUG_UART_POLLED
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void
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init_bootstrap_console()
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{
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/*
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* Initalize the (temporary) bootstrap console interface, so
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* we can use printf until the VM system starts being setup.
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* The real console is initialized before then.
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*/
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uart_post_init(PA_2_K1VA(ADDR_NS16550_UART1));
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}
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#endif
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struct msgbuf *msgbufp=0;
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#if 0
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@ -60,11 +60,6 @@ __FBSDID("$FreeBSD$");
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#include <machine/pmap.h>
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#include <machine/resource.h>
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#ifdef DCHU_DEBUG_UART
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#include <machine/pltfm.h>
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#include <machine/ns16550.h>
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#endif
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static struct rman irq_rman, port_rman, mem_rman;
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static int mainbus_probe(device_t);
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@ -116,10 +111,6 @@ static driver_t mainbus_driver = {
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};
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static devclass_t mainbus_devclass;
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#ifdef DEBUG_UART
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#define printf(s) puts_post(PA_2_K1VA(ADDR_NS16550_UART1), s)
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#endif
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DRIVER_MODULE(mainbus, root, mainbus_driver, mainbus_devclass, 0, 0);
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static int
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@ -179,9 +170,7 @@ mainbus_print_child(device_t bus, device_t child)
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int retval = 0;
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retval += bus_print_child_header(bus, child);
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#ifndef DEBUG_UART
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retval += printf(" on motherboard\n");
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#endif
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return (retval);
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}
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