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MFC r257476, r257478:

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Revamp the SoC identity numbering scheme to be more in line with the way
  Freescale numbers the chips in the ID registers.

  Add definitions for the register and data that describes the SoC type.
This commit is contained in:
ian 2013-12-13 22:30:21 +00:00
parent 3a53055ae2
commit c48d670c8a
2 changed files with 18 additions and 13 deletions
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6
sys/arm/freescale/imx/imx6_anatopreg.h
View File

@ -122,7 +122,9 @@
#define IMX6_ANALOG_USB2_MISC_CLR 0x258
#define IMX6_ANALOG_USB2_MISC_TOG 0x25C
#define IMX6_ANALOG_DIGPROG 0x260
#define IMX6_ANALOG_DIGPROG_SL 0x280
#define IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT 16
#define IMX6_ANALOG_DIGPROG_SOCTYPE_MASK \
(0xff << IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT)
#endif

25
sys/arm/freescale/imx/imx_machdep.h
View File

@ -36,24 +36,27 @@
void imx_devmap_addentry(vm_paddr_t _pa, vm_size_t _sz);
void imx_wdog_cpu_reset(vm_offset_t _wdcr_phys) __attribute__((__noreturn__));
/* From here down, routines are implemented in imxNN_machdep.c. */
/*
* SoC identity.
* According to the documentation, there is such a thing as an i.MX6 Dual
* (non-lite flavor). However, Freescale doesn't seem to have assigned it a
* number in their code for determining the SoC type in u-boot.
*
* To-do: put silicon revision numbers into the low-order bits somewhere.
*/
#define IMXSOC_51 0x05000100
#define IMXSOC_53 0x05000300
#define IMXSOC_6S 0x06000010
#define IMXSOC_6SL 0x06000011
#define IMXSOC_6D 0x06000020
#define IMXSOC_6DL 0x06000021
#define IMXSOC_6Q 0x06000040
#define IMXSOC_6QL 0x06000041
#define IMXSOC_FAMSHIFT 24
#define IMXSOC_51 0x51000000
#define IMXSOC_53 0x53000000
#define IMXSOC_6SL 0x60000000
#define IMXSOC_6DL 0x61000000
#define IMXSOC_6S 0x62000000
#define IMXSOC_6Q 0x63000000
#define IMXSOC_FAMSHIFT 28
u_int imx_soc_type(void);
u_int imx_soc_family(void);
/* From here down, routines are implemented in imxNN_machdep.c. */
void imx_devmap_init(void);
/*