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Fixed initialization of the divisor latch. We depended on siocnopen()

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initializing it for the (usual) (siocniobase != 0) case, but
siocnopen() doesn't initialize it if the latch registers already
have the correct values.
This commit is contained in:
bde 1997-12-28 06:36:35 +00:00
parent b26196a27a
commit c4f9529d8c
3 changed files with 63 additions and 6 deletions
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23
sys/dev/sio/sio.c
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)com.c 7.5 (Berkeley) 5/16/91
* $Id: sio.c,v 1.191 1997/12/16 17:40:07 eivind Exp $
* $Id: sio.c,v 1.192 1997/12/28 06:20:47 bde Exp $
*/
#include "opt_comconsole.h"
@ -2635,10 +2635,11 @@ void
siocnprobe(cp)
struct consdev *cp;
{
speed_t boot_speed;
u_char cfcr;
struct isa_device *dvp;
int s;
struct siocnstate sp;
speed_t boot_speed;
/*
* Find our first enabled console, if any. If it is a high-level
@ -2666,6 +2667,24 @@ siocnprobe(cp)
if (boot_speed)
comdefaultrate = boot_speed;
}
/*
* Initialize the divisor latch. We can't rely on
* siocnopen() to do this the first time, since it
* avoids writing to the latch if the latch appears
* to have the correct value. Also, if we didn't
* just read the speed from the hardware, then we
* need to set the speed in hardware so that
* switching it later is null.
*/
cfcr = inb(siocniobase + com_cfcr);
outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
outb(siocniobase + com_dlbl,
COMBRD(comdefaultrate) & 0xff);
outb(siocniobase + com_dlbh,
(u_int) COMBRD(comdefaultrate) >> 8);
outb(siocniobase + com_cfcr, cfcr);
siocnopen(&sp);
splx(s);
if (!COM_LLCONSOLE(dvp)) {

23
sys/i386/isa/sio.c
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)com.c 7.5 (Berkeley) 5/16/91
* $Id: sio.c,v 1.191 1997/12/16 17:40:07 eivind Exp $
* $Id: sio.c,v 1.192 1997/12/28 06:20:47 bde Exp $
*/
#include "opt_comconsole.h"
@ -2635,10 +2635,11 @@ void
siocnprobe(cp)
struct consdev *cp;
{
speed_t boot_speed;
u_char cfcr;
struct isa_device *dvp;
int s;
struct siocnstate sp;
speed_t boot_speed;
/*
* Find our first enabled console, if any. If it is a high-level
@ -2666,6 +2667,24 @@ siocnprobe(cp)
if (boot_speed)
comdefaultrate = boot_speed;
}
/*
* Initialize the divisor latch. We can't rely on
* siocnopen() to do this the first time, since it
* avoids writing to the latch if the latch appears
* to have the correct value. Also, if we didn't
* just read the speed from the hardware, then we
* need to set the speed in hardware so that
* switching it later is null.
*/
cfcr = inb(siocniobase + com_cfcr);
outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
outb(siocniobase + com_dlbl,
COMBRD(comdefaultrate) & 0xff);
outb(siocniobase + com_dlbh,
(u_int) COMBRD(comdefaultrate) >> 8);
outb(siocniobase + com_cfcr, cfcr);
siocnopen(&sp);
splx(s);
if (!COM_LLCONSOLE(dvp)) {

23
sys/isa/sio.c
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)com.c 7.5 (Berkeley) 5/16/91
* $Id: sio.c,v 1.191 1997/12/16 17:40:07 eivind Exp $
* $Id: sio.c,v 1.192 1997/12/28 06:20:47 bde Exp $
*/
#include "opt_comconsole.h"
@ -2635,10 +2635,11 @@ void
siocnprobe(cp)
struct consdev *cp;
{
speed_t boot_speed;
u_char cfcr;
struct isa_device *dvp;
int s;
struct siocnstate sp;
speed_t boot_speed;
/*
* Find our first enabled console, if any. If it is a high-level
@ -2666,6 +2667,24 @@ siocnprobe(cp)
if (boot_speed)
comdefaultrate = boot_speed;
}
/*
* Initialize the divisor latch. We can't rely on
* siocnopen() to do this the first time, since it
* avoids writing to the latch if the latch appears
* to have the correct value. Also, if we didn't
* just read the speed from the hardware, then we
* need to set the speed in hardware so that
* switching it later is null.
*/
cfcr = inb(siocniobase + com_cfcr);
outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr);
outb(siocniobase + com_dlbl,
COMBRD(comdefaultrate) & 0xff);
outb(siocniobase + com_dlbh,
(u_int) COMBRD(comdefaultrate) >> 8);
outb(siocniobase + com_cfcr, cfcr);
siocnopen(&sp);
splx(s);
if (!COM_LLCONSOLE(dvp)) {