Work around for the Intel Pentium F00F bug; this is Intel's recommended
workaround. Note that this currently eats up two pages extra in the system; this could be alleviated by aligning idt correctly, and then only dealing with that (as opposed to the current method of allocated two pages and copying the IDT table to that, and then setting that to be the IDT table).
This commit is contained in:
Sean Eric Fagan
parent
a587a35bbd
commit
c4fbf2774d
@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.32 1997/11/06 03:10:28 kato Exp $
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* $Id: identcpu.c,v 1.33 1997/11/07 08:52:27 phk Exp $
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*/
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#include "opt_cpu.h"
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@ -107,6 +107,10 @@ do_cpuid(u_long ax, u_long *p)
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);
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}
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#ifndef NO_F00F_HACK
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int has_f00f_bug = 0;
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#endif
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void
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printcpuinfo(void)
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{
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@ -136,6 +140,14 @@ printcpuinfo(void)
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break;
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case 0x500:
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strcat(cpu_model, "Pentium"); /* nb no space */
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#ifndef NO_F00F_HACK
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/*
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* XXX - If/when Intel fixes the bug, this
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* should also check the version of the
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* CPU, not just that it's a Pentium.
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*/
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has_f00f_bug = 1;
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#endif
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break;
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case 0x600:
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strcat(cpu_model, "Pentium Pro");
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.273 1997/11/21 18:27:10 bde Exp $
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* $Id: machdep.c,v 1.274 1997/11/24 18:35:11 bde Exp $
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*/
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#include "apm.h"
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@ -866,6 +866,11 @@ u_int my_tr; /* which task register setting */
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#endif /* VM86 */
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#endif
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#ifndef NO_F00F_HACK
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struct gate_descriptor *t_idt;
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int has_f00f_bug;
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#endif
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static struct i386tss dblfault_tss;
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static char dblfault_stack[PAGE_SIZE];
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@ -1534,6 +1539,43 @@ init386(first)
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proc0.p_addr->u_pcb.pcb_ext = 0;
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}
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#ifndef NO_F00F_HACK
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void f00f_hack(void);
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SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
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void
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f00f_hack(void) {
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struct region_descriptor r_idt;
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unsigned char *tmp;
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int i;
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vm_offset_t vp;
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unsigned *pte;
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if (!has_f00f_bug)
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return;
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printf("Intel Pentium F00F detected, installing workaround\n");
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r_idt.rd_limit = sizeof(idt) - 1;
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tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
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if (tmp == 0)
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panic("kmem_alloc returned 0");
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if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
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panic("kmem_alloc returned non-page-aligned memory");
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/* Put the first seven entries in the lower page */
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t_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
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bcopy(idt, t_idt, sizeof(idt));
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r_idt.rd_base = (int)t_idt;
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lidt(&r_idt);
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vp = trunc_page(t_idt);
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if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
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VM_PROT_READ, FALSE) != KERN_SUCCESS)
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panic("vm_map_protect failed");
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return;
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}
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#endif /* NO_F00F_HACK */
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int
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ptrace_set_pc(p, addr)
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struct proc *p;
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)trap.c 7.4 (Berkeley) 5/13/91
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* $Id: trap.c,v 1.114 1997/11/06 19:28:09 phk Exp $
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* $Id: trap.c,v 1.115 1997/11/24 13:25:37 bde Exp $
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*/
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/*
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@ -142,6 +142,11 @@ static char *trap_msg[] = {
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static void userret __P((struct proc *p, struct trapframe *frame,
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u_quad_t oticks));
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#ifndef NO_F00F_HACK
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extern struct gate_descriptor *t_idt;
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extern int has_f00f_bug;
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#endif
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static inline void
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userret(p, frame, oticks)
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struct proc *p;
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@ -211,6 +216,9 @@ trap(frame)
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u_long eva;
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#endif
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#ifndef NO_F00F_HACK
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restart:
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#endif
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type = frame.tf_trapno;
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code = frame.tf_err;
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@ -276,6 +284,10 @@ trap(frame)
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i = trap_pfault(&frame, TRUE);
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if (i == -1)
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return;
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#ifndef NO_F00F_HACK
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if (i == -2)
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goto restart;
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#endif
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if (i == 0)
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goto out;
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@ -642,7 +654,18 @@ trap_pfault(frame, usermode)
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if (va >= KERNBASE) {
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/*
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* Don't allow user-mode faults in kernel address space.
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* An exception: if the faulting address is the invalid
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* instruction entry in the IDT, then the Intel Pentium
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* F00F bug workaround was triggered, and we need to
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* treat it is as an illegal instruction, and not a page
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* fault.
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*/
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#ifndef NO_F00F_HACK
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if ((eva == (unsigned int)&t_idt[6]) && has_f00f_bug) {
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frame->tf_trapno = T_PRIVINFLT;
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return -2;
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}
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#endif
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if (usermode)
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goto nogo;
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.32 1997/11/06 03:10:28 kato Exp $
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* $Id: identcpu.c,v 1.33 1997/11/07 08:52:27 phk Exp $
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*/
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#include "opt_cpu.h"
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@ -107,6 +107,10 @@ do_cpuid(u_long ax, u_long *p)
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);
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}
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#ifndef NO_F00F_HACK
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int has_f00f_bug = 0;
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#endif
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void
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printcpuinfo(void)
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{
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@ -136,6 +140,14 @@ printcpuinfo(void)
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break;
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case 0x500:
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strcat(cpu_model, "Pentium"); /* nb no space */
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#ifndef NO_F00F_HACK
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/*
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* XXX - If/when Intel fixes the bug, this
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* should also check the version of the
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* CPU, not just that it's a Pentium.
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*/
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has_f00f_bug = 1;
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#endif
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break;
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case 0x600:
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strcat(cpu_model, "Pentium Pro");
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.273 1997/11/21 18:27:10 bde Exp $
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* $Id: machdep.c,v 1.274 1997/11/24 18:35:11 bde Exp $
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*/
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#include "apm.h"
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@ -866,6 +866,11 @@ u_int my_tr; /* which task register setting */
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#endif /* VM86 */
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#endif
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#ifndef NO_F00F_HACK
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struct gate_descriptor *t_idt;
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int has_f00f_bug;
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#endif
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static struct i386tss dblfault_tss;
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static char dblfault_stack[PAGE_SIZE];
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@ -1534,6 +1539,43 @@ init386(first)
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proc0.p_addr->u_pcb.pcb_ext = 0;
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}
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#ifndef NO_F00F_HACK
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void f00f_hack(void);
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SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
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void
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f00f_hack(void) {
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struct region_descriptor r_idt;
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unsigned char *tmp;
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int i;
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vm_offset_t vp;
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unsigned *pte;
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if (!has_f00f_bug)
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return;
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printf("Intel Pentium F00F detected, installing workaround\n");
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r_idt.rd_limit = sizeof(idt) - 1;
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tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
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if (tmp == 0)
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panic("kmem_alloc returned 0");
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if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
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panic("kmem_alloc returned non-page-aligned memory");
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/* Put the first seven entries in the lower page */
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t_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
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bcopy(idt, t_idt, sizeof(idt));
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r_idt.rd_base = (int)t_idt;
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lidt(&r_idt);
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vp = trunc_page(t_idt);
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if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
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VM_PROT_READ, FALSE) != KERN_SUCCESS)
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panic("vm_map_protect failed");
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return;
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}
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#endif /* NO_F00F_HACK */
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int
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ptrace_set_pc(p, addr)
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struct proc *p;
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)trap.c 7.4 (Berkeley) 5/13/91
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* $Id: trap.c,v 1.114 1997/11/06 19:28:09 phk Exp $
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* $Id: trap.c,v 1.115 1997/11/24 13:25:37 bde Exp $
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*/
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/*
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@ -142,6 +142,11 @@ static char *trap_msg[] = {
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static void userret __P((struct proc *p, struct trapframe *frame,
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u_quad_t oticks));
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#ifndef NO_F00F_HACK
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extern struct gate_descriptor *t_idt;
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extern int has_f00f_bug;
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#endif
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static inline void
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userret(p, frame, oticks)
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struct proc *p;
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@ -211,6 +216,9 @@ trap(frame)
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u_long eva;
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#endif
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#ifndef NO_F00F_HACK
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restart:
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#endif
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type = frame.tf_trapno;
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code = frame.tf_err;
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@ -276,6 +284,10 @@ trap(frame)
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i = trap_pfault(&frame, TRUE);
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if (i == -1)
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return;
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#ifndef NO_F00F_HACK
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if (i == -2)
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goto restart;
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#endif
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if (i == 0)
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goto out;
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@ -642,7 +654,18 @@ trap_pfault(frame, usermode)
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if (va >= KERNBASE) {
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/*
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* Don't allow user-mode faults in kernel address space.
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* An exception: if the faulting address is the invalid
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* instruction entry in the IDT, then the Intel Pentium
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* F00F bug workaround was triggered, and we need to
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* treat it is as an illegal instruction, and not a page
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* fault.
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*/
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#ifndef NO_F00F_HACK
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if ((eva == (unsigned int)&t_idt[6]) && has_f00f_bug) {
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frame->tf_trapno = T_PRIVINFLT;
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return -2;
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}
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#endif
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if (usermode)
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goto nogo;
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)trap.c 7.4 (Berkeley) 5/13/91
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* $Id: trap.c,v 1.114 1997/11/06 19:28:09 phk Exp $
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* $Id: trap.c,v 1.115 1997/11/24 13:25:37 bde Exp $
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*/
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/*
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@ -142,6 +142,11 @@ static char *trap_msg[] = {
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static void userret __P((struct proc *p, struct trapframe *frame,
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u_quad_t oticks));
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#ifndef NO_F00F_HACK
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extern struct gate_descriptor *t_idt;
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extern int has_f00f_bug;
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#endif
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static inline void
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userret(p, frame, oticks)
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struct proc *p;
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@ -211,6 +216,9 @@ trap(frame)
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u_long eva;
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#endif
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#ifndef NO_F00F_HACK
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restart:
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#endif
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type = frame.tf_trapno;
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code = frame.tf_err;
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@ -276,6 +284,10 @@ trap(frame)
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i = trap_pfault(&frame, TRUE);
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if (i == -1)
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return;
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#ifndef NO_F00F_HACK
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if (i == -2)
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goto restart;
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#endif
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if (i == 0)
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goto out;
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@ -642,7 +654,18 @@ trap_pfault(frame, usermode)
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if (va >= KERNBASE) {
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/*
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* Don't allow user-mode faults in kernel address space.
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* An exception: if the faulting address is the invalid
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* instruction entry in the IDT, then the Intel Pentium
|
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* F00F bug workaround was triggered, and we need to
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* treat it is as an illegal instruction, and not a page
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* fault.
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*/
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#ifndef NO_F00F_HACK
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if ((eva == (unsigned int)&t_idt[6]) && has_f00f_bug) {
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frame->tf_trapno = T_PRIVINFLT;
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return -2;
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}
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#endif
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if (usermode)
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goto nogo;
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Block a user