Fix a massive couple of botches here: the NVRAM settings
read wasn't flagging the SYNC mode was enabled. The temp values for offset and sync period were uint8_t, but were being assigned and shifted from a uint32_t value. This didn't show up in testing because a random number of 1030 cards set a bit that says "honor BIOS negotiation", which means this whole code path was skipped. This should clear up at least some of the negotation issues that have been seen.
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b61386a482
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@ -660,7 +660,7 @@ mpt_read_config_info_spi(struct mpt_softc *mpt)
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if (rv) {
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if (rv) {
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mpt_prt(mpt, "failed to read SPI Port Page 0\n");
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mpt_prt(mpt, "failed to read SPI Port Page 0\n");
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} else {
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} else {
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mpt_lprt(mpt, MPT_PRT_DEBUG,
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mpt_lprt(mpt, MPT_PRT_NEGOTIATION,
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"SPI Port Page 0: Capabilities %x PhysicalInterface %x\n",
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"SPI Port Page 0: Capabilities %x PhysicalInterface %x\n",
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mpt->mpt_port_page0.Capabilities,
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mpt->mpt_port_page0.Capabilities,
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mpt->mpt_port_page0.PhysicalInterface);
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mpt->mpt_port_page0.PhysicalInterface);
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@ -3290,7 +3290,7 @@ mpt_get_spi_settings(struct mpt_softc *mpt, struct ccb_trans_settings *cts)
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struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
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struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
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struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
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struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
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target_id_t tgt;
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target_id_t tgt;
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uint8_t dval, pval, oval;
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uint32_t dval, pval, oval;
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int rv;
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int rv;
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cts->protocol = PROTO_SCSI;
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cts->protocol = PROTO_SCSI;
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@ -3348,7 +3348,7 @@ mpt_get_spi_settings(struct mpt_softc *mpt, struct ccb_trans_settings *cts)
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pval >>= MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD;
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pval >>= MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD;
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mpt->mpt_dev_page0[tgt] = tmp;
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mpt->mpt_dev_page0[tgt] = tmp;
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} else {
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} else {
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dval = DP_WIDE|DP_DISC_ENABLE|DP_TQING_ENABLE;
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dval = DP_WIDE|DP_DISC_ENABLE|DP_TQING_ENABLE|DP_SYNC;
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oval = mpt->mpt_port_page0.Capabilities;
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oval = mpt->mpt_port_page0.Capabilities;
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oval = MPI_SCSIPORTPAGE0_CAP_GET_MAX_SYNC_OFFSET(oval);
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oval = MPI_SCSIPORTPAGE0_CAP_GET_MAX_SYNC_OFFSET(oval);
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pval = mpt->mpt_port_page0.Capabilities;
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pval = mpt->mpt_port_page0.Capabilities;
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@ -3359,37 +3359,29 @@ mpt_get_spi_settings(struct mpt_softc *mpt, struct ccb_trans_settings *cts)
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scsi->valid = 0;
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scsi->valid = 0;
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spi->flags = 0;
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spi->flags = 0;
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scsi->flags = 0;
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scsi->flags = 0;
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if (dval & DP_DISC_ENABLE) {
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spi->sync_offset = oval;
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spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
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spi->sync_period = pval;
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}
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spi->valid |= CTS_SPI_VALID_SYNC_OFFSET;
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if (oval) {
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spi->valid |= CTS_SPI_VALID_SYNC_RATE;
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spi->sync_offset = oval;
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spi->valid |= CTS_SPI_VALID_SYNC_OFFSET;
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}
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if (pval) {
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spi->sync_period = pval;
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spi->valid |= CTS_SPI_VALID_SYNC_RATE;
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}
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spi->valid |= CTS_SPI_VALID_BUS_WIDTH;
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spi->valid |= CTS_SPI_VALID_BUS_WIDTH;
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if (dval & DP_WIDE) {
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if (dval & DP_WIDE) {
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spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
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spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
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} else {
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} else {
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spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
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spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
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}
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}
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if (dval & DP_TQING_ENABLE) {
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scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
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}
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if (cts->ccb_h.target_lun != CAM_LUN_WILDCARD) {
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if (cts->ccb_h.target_lun != CAM_LUN_WILDCARD) {
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scsi->valid = CTS_SCSI_VALID_TQ;
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scsi->valid = CTS_SCSI_VALID_TQ;
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if (dval & DP_TQING_ENABLE) {
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scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
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}
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spi->valid |= CTS_SPI_VALID_DISC;
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spi->valid |= CTS_SPI_VALID_DISC;
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} else {
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if (dval & DP_DISC_ENABLE) {
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scsi->valid = 0;
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spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
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}
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}
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}
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mpt_lprt(mpt, MPT_PRT_NEGOTIATION,
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mpt_lprt(mpt, MPT_PRT_NEGOTIATION,
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"mpt_get_spi_settings[%d]:%s per=%x off=%d SPF=%x SPV=%x SCF=%x SCV"
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"mpt_get_spi_settings[%d]: %s flags 0x%x per 0x%x off=%d\n", tgt,
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"=%x bw=%x\n",
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IS_CURRENT_SETTINGS(cts)? "ACTIVE" : "NVRAM ", dval, pval, oval);
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tgt, IS_CURRENT_SETTINGS(cts)? "ACTIVE" : "NVRAM ", pval, oval,
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spi->flags, spi->valid, scsi->flags, scsi->valid, spi->bus_width);
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return (0);
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return (0);
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}
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}
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