Many new test defines, including:
- TEST_CPUSTOP adds stop_cpus()/restart_cpus(), OFF by default - TEST_ALTTIMER new method for attaching 8259 PIC to APIC this method avoids 'ExtInt' programming, ON by default - TIMER_ALL sends 8259/8254 timer INTs to all CPUs, ON by default - ASMPOSTCODExxx code to display bytes to POST hardware, OFF by default
This commit is contained in:
Steve Passe
parent
409ba536dc
commit
c5f838abdb
@ -6,7 +6,7 @@
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $Id: smp.h,v 1.6 1997/07/08 23:29:48 smp Exp smp $
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* $Id: smp.h,v 1.7 1997/07/13 00:26:07 smp Exp smp $
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*
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*/
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@ -110,6 +110,7 @@ extern volatile ioapic_t *ioapic[];
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#endif /* MULTIPLE_IOAPICS */
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/* functions in mpapic.c */
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void apic_dump __P((void));
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void apic_initialize __P((void));
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int apic_ipi __P((int, int, int));
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int selected_apic_ipi __P((u_int, int, int));
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@ -6,7 +6,7 @@
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $Id: smp.h,v 1.6 1997/07/08 23:29:48 smp Exp smp $
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* $Id: smp.h,v 1.7 1997/07/13 00:26:07 smp Exp smp $
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*
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*/
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@ -110,6 +110,7 @@ extern volatile ioapic_t *ioapic[];
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#endif /* MULTIPLE_IOAPICS */
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/* functions in mpapic.c */
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void apic_dump __P((void));
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void apic_initialize __P((void));
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int apic_ipi __P((int, int, int));
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int selected_apic_ipi __P((u_int, int, int));
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@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: smptests.h,v 1.4 1997/07/06 23:36:49 smp Exp smp $
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* $Id: smptests.h,v 1.11 1997/07/13 00:47:54 smp Exp smp $
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*/
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#ifndef _MACHINE_SMPTESTS_H_
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@ -39,36 +39,70 @@
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#define POST_ADDR 0x80
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*/
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#ifdef POST_ADDR
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#define ASMPOSTCODE_INC \
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pushl %eax ; \
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movl _current_postcode, %eax ; \
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incl %eax ; \
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andl $0xff, %eax ; \
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movl %eax, _current_postcode ; \
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outb %al, $POST_ADDR ; \
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popl %eax
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/*
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* Overwrite the current_postcode low nibble .
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*/
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#define ASMPOSTCODE_HILO(X) \
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pushl %eax ; \
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movl $X, %eax ; \
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movl %eax, _current_postcode ; \
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outb %al, $POST_ADDR ; \
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popl %eax
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/*
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* Overwrite the current_postcode low nibble .
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*/
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#define ASMPOSTCODE_LO(X) \
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pushl %eax ; \
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movl _current_postcode, %eax ; \
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andl $0xf0, %eax ; \
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orl $X, %eax ; \
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outb %al, $POST_ADDR
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movl %eax, _current_postcode ; \
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outb %al, $POST_ADDR ; \
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popl %eax
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/*
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* Overwrite the current_postcode high nibble .
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* Note: this does NOT shift the digit to the high position!
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*/
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#define ASMPOSTCODE_HI(X) \
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pushl %eax ; \
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movl _current_postcode, %eax ; \
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andl $0x0f, %eax ; \
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orl $X, %eax ; \
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outb %al, $POST_ADDR
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movl %eax, _current_postcode ; \
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outb %al, $POST_ADDR ; \
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popl %eax
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#else
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#define ASMPOSTCODE_INC
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#define ASMPOSTCODE_HILO(X)
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#define ASMPOSTCODE_LO(X)
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#define ASMPOSTCODE_HI(X)
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#endif /* POST_ADDR */
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/*
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* misc. counters
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* Use non 'ExtInt' method of external (non-conected) 8254 timer
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* See "Intel I486 Microprocessors and Related Products", page 4-292:
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* 82489DX/8259A DUAL MODE CONNECTION
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*
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#define COUNT_XINVLTLB_HITS
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#define COUNT_SPURIOUS_INTS
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*/
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#define TEST_ALTTIMER
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/*
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* send 8254 timer INTs to all CPUs in LOPRIO mode
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*
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*/
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#define TIMER_ALL
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/*
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@ -76,6 +110,7 @@
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*
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#define TEST_CPUSTOP
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#define DEBUG_CPUSTOP
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#define COUNT_CSHITS
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*/
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@ -94,6 +129,14 @@
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#define IGNORE_IDLEPROCS
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/*
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* misc. counters
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*
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#define COUNT_XINVLTLB_HITS
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#define COUNT_SPURIOUS_INTS
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*/
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/**
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* hack to "fake-out" kernel into thinking it is running on a 'default config'
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*
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@ -102,4 +145,43 @@
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*/
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/*
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* simple test code for IPI interaction, save for future...
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*
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#define TEST_TEST1
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#define IPI_TARGET_TEST1 1
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*/
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/*
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* these are all temps for debugging CPUSTOP code in mplock.s
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* they will (hopefully) go away soon...
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*
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#define GUARD_INTS
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*/
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#ifdef GUARD_INTS
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#define GUARD_CPU 1
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#define MAYBE_PANIC(irq_num) \
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cmpl $GUARD_CPU, _cpuid ; \
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jne 9f ; \
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cmpl $1, _ok_test1 ; \
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jne 9f ; \
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pushl lapic_isr3 ; \
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pushl lapic_isr2 ; \
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pushl lapic_isr1 ; \
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pushl lapic_isr0 ; \
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pushl lapic_irr3 ; \
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pushl lapic_irr2 ; \
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pushl lapic_irr1 ; \
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pushl lapic_irr0 ; \
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pushl $irq_num ; \
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pushl _cpuid ; \
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pushl $panic_msg ; \
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call _printf ; \
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addl $44, %esp ; \
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9:
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#else
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#define MAYBE_PANIC(irq_num)
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#endif /* GUARD_INTS */
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#endif /* _MACHINE_SMPTESTS_H_ */
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@ -6,7 +6,7 @@
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $Id: smp.h,v 1.6 1997/07/08 23:29:48 smp Exp smp $
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* $Id: smp.h,v 1.7 1997/07/13 00:26:07 smp Exp smp $
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*
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*/
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@ -110,6 +110,7 @@ extern volatile ioapic_t *ioapic[];
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#endif /* MULTIPLE_IOAPICS */
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/* functions in mpapic.c */
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void apic_dump __P((void));
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void apic_initialize __P((void));
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int apic_ipi __P((int, int, int));
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int selected_apic_ipi __P((u_int, int, int));
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