MFC r260886, r261165, r261171, r261172, r261214
Fix gcc with -Wstrict-prototypes by telling it bi_emac takes no parameters. Bus space handles need to be the VA of the requested resource, not the rounded page VA. Correct so the DBGU device can be mapped for FDT console since it isn't on a page boundary. Make early printf output nicer by inserting a carriage return before any linefeeds that are output. Before resetting the USART, delay a bit to allow the transmitter to finish the current character to drain to avoid glitching. Also, simplify the code a smidge. Remove extra parens to silence clang warning.
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faac8f5770
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@ -269,7 +269,7 @@ db_unwind_exec_insn(struct unwind_state *state)
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/* Stop processing */
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state->entries = 0;
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} else if ((insn == INSN_POP_REGS)) {
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} else if (insn == INSN_POP_REGS) {
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unsigned int mask, reg;
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mask = db_unwind_exec_read_byte(state);
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@ -65,11 +65,13 @@ at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
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pa = trunc_page(bpa);
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if (pa >= AT91_PA_BASE + 0xff00000) {
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*bshp = pa - AT91_PA_BASE + AT91_BASE;
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*bshp = bpa - AT91_PA_BASE + AT91_BASE;
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return (0);
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}
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if (pa >= AT91_BASE + 0xff00000)
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if (pa >= AT91_BASE + 0xff00000) {
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*bshp = bpa;
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return (0);
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}
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endpa = round_page(bpa + size);
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*bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
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@ -38,9 +38,39 @@ __FBSDID("$FreeBSD$");
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#include <arm/at91/at91_piovar.h>
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#include <arm/at91/at91board.h>
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#include <arm/at91/at91sam9260reg.h>
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#include <arm/at91/at91_smc.h>
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#include <arm/at91/at91_gpio.h>
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#include <dev/nand/nfc_at91.h>
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BOARD_INIT long
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board_init(void)
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static struct at91_smc_init nand_smc = {
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.ncs_rd_setup = 0,
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.nrd_setup = 1,
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.ncs_wr_setup = 0,
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.nwe_setup = 1,
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.ncs_rd_pulse = 3,
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.nrd_pulse = 3,
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.ncs_wr_pulse = 3,
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.nwe_pulse = 3,
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.nrd_cycle = 5,
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.nwe_cycle = 5,
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.mode = SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
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.tdf_cycles = 2,
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};
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static struct at91_nand_params nand_param = {
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.ale = 1u << 21,
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.cle = 1u << 22,
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.width = 8,
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.rnb_pin = AT91_PIN_PC13,
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.nce_pin = AT91_PIN_PC14,
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.cs = 3,
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};
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static void
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bi_dbgu(void)
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{
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/*
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@ -50,6 +80,11 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB14, 0);
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/* DTXD */
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB15, 1);
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}
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static void
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bi_emac(void)
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{
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/*
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* EMAC
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@ -91,7 +126,11 @@ board_init(void)
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at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA28, 0);
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/* ECOL */
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at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA29, 0);
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}
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static void
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bi_mmc(void)
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{
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/*
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* MMC, wired to socket B.
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@ -114,11 +153,11 @@ board_init(void)
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* don't support the dataflash. But if you did, you'd have to
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* use CS0 and CS1.
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*/
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}
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/*
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* SPI1 is wired to a audio CODEC that we don't support, so
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* give it a pass.
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*/
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static void
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bi_iic(void)
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{
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/*
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* TWI. Only one child on the iic bus, which we take care of
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@ -128,6 +167,11 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA23, 1);
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/* TWCK */
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at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA24, 1);
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}
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static void
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bi_usart0(void)
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{
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/*
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* USART0
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@ -148,7 +192,11 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB26, 1);
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/* CTS0 */
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB27, 0);
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}
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static void
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bi_usart1(void)
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{
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/*
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* USART1
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*/
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@ -160,9 +208,54 @@ board_init(void)
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB6, 1);
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/* RXD1 */
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at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB7, 0);
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}
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static void
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bi_nand(void)
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{
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/* Samsung 256MB SLC Flash */
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/* Setup Static Memory Controller */
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at91_smc_setup(0, 3, &nand_smc);
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at91_enable_nand(&nand_param);
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/*
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* This assumes
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* - RNB is on pin PC13
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* - CE is on pin PC14
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*
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* Nothing actually uses RNB right now.
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*
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* For CE, this currently asserts it during board setup and leaves it
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* that way forever.
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*
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* All this can go away when the gpio pin-renumbering happens...
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*/
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at91_pio_use_gpio(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
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at91_pio_gpio_input(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13); /* RNB */
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at91_pio_gpio_output(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */
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at91_pio_gpio_clear(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */
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}
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BOARD_INIT long
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board_init(void)
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{
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bi_dbgu();
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bi_emac();
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bi_mmc();
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/*
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* SPI1 is wired to a audio CODEC that we don't support, so
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* give it a pass.
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*/
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bi_iic();
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bi_usart0();
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bi_usart1();
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/* USART2 - USART5 aren't wired up, except via PIO pins, ignore them. */
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bi_nand();
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return (at91_ramsize());
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}
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@ -288,6 +288,10 @@ volatile uint32_t *at91_dbgu = (volatile uint32_t *)(AT91_BASE + AT91_DBGU0);
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void
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eputc(int c)
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{
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if (c == '\n')
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eputc('\r');
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while (!(at91_dbgu[USART_CSR / 4] & USART_CSR_TXRDY))
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continue;
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at91_dbgu[USART_THR / 4] = c;
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