MFC r260886, r261165, r261171, r261172, r261214

Fix gcc with -Wstrict-prototypes by telling it bi_emac takes no
  parameters.

  Bus space handles need to be the VA of the requested resource, not the
  rounded page VA. Correct so the DBGU device can be mapped for FDT
  console since it isn't on a page boundary.

  Make early printf output nicer by inserting a carriage return before
  any linefeeds that are output.

  Before resetting the USART, delay a bit to allow the transmitter to
  finish the current character to drain to avoid glitching. Also,
  simplify the code a smidge.

  Remove extra parens to silence clang warning.
This commit is contained in:
ian 2014-05-14 23:51:07 +00:00
parent faac8f5770
commit c87e0b262c
4 changed files with 108 additions and 9 deletions

View File

@ -269,7 +269,7 @@ db_unwind_exec_insn(struct unwind_state *state)
/* Stop processing */
state->entries = 0;
} else if ((insn == INSN_POP_REGS)) {
} else if (insn == INSN_POP_REGS) {
unsigned int mask, reg;
mask = db_unwind_exec_read_byte(state);

View File

@ -65,11 +65,13 @@ at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
pa = trunc_page(bpa);
if (pa >= AT91_PA_BASE + 0xff00000) {
*bshp = pa - AT91_PA_BASE + AT91_BASE;
*bshp = bpa - AT91_PA_BASE + AT91_BASE;
return (0);
}
if (pa >= AT91_BASE + 0xff00000)
if (pa >= AT91_BASE + 0xff00000) {
*bshp = bpa;
return (0);
}
endpa = round_page(bpa + size);
*bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);

View File

@ -38,9 +38,39 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91_piovar.h>
#include <arm/at91/at91board.h>
#include <arm/at91/at91sam9260reg.h>
#include <arm/at91/at91_smc.h>
#include <arm/at91/at91_gpio.h>
#include <dev/nand/nfc_at91.h>
BOARD_INIT long
board_init(void)
static struct at91_smc_init nand_smc = {
.ncs_rd_setup = 0,
.nrd_setup = 1,
.ncs_wr_setup = 0,
.nwe_setup = 1,
.ncs_rd_pulse = 3,
.nrd_pulse = 3,
.ncs_wr_pulse = 3,
.nwe_pulse = 3,
.nrd_cycle = 5,
.nwe_cycle = 5,
.mode = SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
.tdf_cycles = 2,
};
static struct at91_nand_params nand_param = {
.ale = 1u << 21,
.cle = 1u << 22,
.width = 8,
.rnb_pin = AT91_PIN_PC13,
.nce_pin = AT91_PIN_PC14,
.cs = 3,
};
static void
bi_dbgu(void)
{
/*
@ -50,6 +80,11 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB14, 0);
/* DTXD */
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB15, 1);
}
static void
bi_emac(void)
{
/*
* EMAC
@ -91,7 +126,11 @@ board_init(void)
at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA28, 0);
/* ECOL */
at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA29, 0);
}
static void
bi_mmc(void)
{
/*
* MMC, wired to socket B.
@ -114,11 +153,11 @@ board_init(void)
* don't support the dataflash. But if you did, you'd have to
* use CS0 and CS1.
*/
}
/*
* SPI1 is wired to a audio CODEC that we don't support, so
* give it a pass.
*/
static void
bi_iic(void)
{
/*
* TWI. Only one child on the iic bus, which we take care of
@ -128,6 +167,11 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA23, 1);
/* TWCK */
at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA24, 1);
}
static void
bi_usart0(void)
{
/*
* USART0
@ -148,7 +192,11 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB26, 1);
/* CTS0 */
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB27, 0);
}
static void
bi_usart1(void)
{
/*
* USART1
*/
@ -160,9 +208,54 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB6, 1);
/* RXD1 */
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB7, 0);
}
static void
bi_nand(void)
{
/* Samsung 256MB SLC Flash */
/* Setup Static Memory Controller */
at91_smc_setup(0, 3, &nand_smc);
at91_enable_nand(&nand_param);
/*
* This assumes
* - RNB is on pin PC13
* - CE is on pin PC14
*
* Nothing actually uses RNB right now.
*
* For CE, this currently asserts it during board setup and leaves it
* that way forever.
*
* All this can go away when the gpio pin-renumbering happens...
*/
at91_pio_use_gpio(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
at91_pio_gpio_input(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13); /* RNB */
at91_pio_gpio_output(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */
at91_pio_gpio_clear(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */
}
BOARD_INIT long
board_init(void)
{
bi_dbgu();
bi_emac();
bi_mmc();
/*
* SPI1 is wired to a audio CODEC that we don't support, so
* give it a pass.
*/
bi_iic();
bi_usart0();
bi_usart1();
/* USART2 - USART5 aren't wired up, except via PIO pins, ignore them. */
bi_nand();
return (at91_ramsize());
}

View File

@ -288,6 +288,10 @@ volatile uint32_t *at91_dbgu = (volatile uint32_t *)(AT91_BASE + AT91_DBGU0);
void
eputc(int c)
{
if (c == '\n')
eputc('\r');
while (!(at91_dbgu[USART_CSR / 4] & USART_CSR_TXRDY))
continue;
at91_dbgu[USART_THR / 4] = c;