Run if_vr(4) through FlexeLint and clean some of the cobwebs found.
This commit is contained in:
Poul-Henning Kamp
parent
58967d8d46
commit
c8ea76936e
@ -74,7 +74,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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@ -89,10 +88,8 @@ __FBSDID("$FreeBSD$");
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#define VR_USEIOSPACE
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@ -136,12 +133,32 @@ static struct vr_type vr_devs[] = {
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{ 0, 0, 0, NULL }
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};
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struct vr_softc {
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struct ifnet *vr_ifp; /* interface info */
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device_t vr_dev;
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struct resource *vr_res;
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struct resource *vr_irq;
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void *vr_intrhand;
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device_t vr_miibus;
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u_int8_t vr_revid; /* Rhine chip revision */
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u_int8_t vr_flags; /* See VR_F_* below */
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struct vr_list_data *vr_ldata;
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struct vr_chain_data vr_cdata;
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struct callout vr_stat_callout;
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struct mtx vr_mtx;
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int suspended; /* if 1, sleeping/detaching */
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int vr_quirks;
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#ifdef DEVICE_POLLING
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int rxcycles;
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#endif
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};
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static int vr_probe(device_t);
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static int vr_attach(device_t);
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static int vr_detach(device_t);
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static int vr_newbuf(struct vr_softc *, struct vr_chain_onefrag *,
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struct mbuf *);
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static int vr_newbuf(struct vr_chain_onefrag *, struct mbuf *);
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static void vr_rxeof(struct vr_softc *);
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static void vr_rxeoc(struct vr_softc *);
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@ -163,15 +180,15 @@ static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static void vr_mii_sync(struct vr_softc *);
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static void vr_mii_send(struct vr_softc *, uint32_t, int);
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#endif
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static int vr_mii_readreg(struct vr_softc *, struct vr_mii_frame *);
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static int vr_mii_writereg(struct vr_softc *, struct vr_mii_frame *);
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static int vr_mii_readreg(const struct vr_softc *, struct vr_mii_frame *);
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static int vr_mii_writereg(const struct vr_softc *, const struct vr_mii_frame *);
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static int vr_miibus_readreg(device_t, uint16_t, uint16_t);
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static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t);
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static void vr_miibus_statchg(device_t);
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static void vr_setcfg(struct vr_softc *, int);
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static void vr_setmulti(struct vr_softc *);
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static void vr_reset(struct vr_softc *);
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static void vr_reset(const struct vr_softc *);
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static int vr_list_rx_init(struct vr_softc *);
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static int vr_list_tx_init(struct vr_softc *);
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@ -212,40 +229,34 @@ static devclass_t vr_devclass;
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DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0);
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DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
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#define VR_F_RESTART 0x01 /* Restart unit on next tick */
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#define VR_SETBIT(sc, reg, x) \
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CSR_WRITE_1(sc, reg, \
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CSR_READ_1(sc, reg) | (x))
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#define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx)
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#define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx)
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#define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED)
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#define VR_CLRBIT(sc, reg, x) \
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CSR_WRITE_1(sc, reg, \
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CSR_READ_1(sc, reg) & ~(x))
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/*
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* register space access macros
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*/
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#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val)
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#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val)
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#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val)
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#define VR_SETBIT16(sc, reg, x) \
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CSR_WRITE_2(sc, reg, \
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CSR_READ_2(sc, reg) | (x))
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#define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg)
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#define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg)
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#define VR_CLRBIT16(sc, reg, x) \
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CSR_WRITE_2(sc, reg, \
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CSR_READ_2(sc, reg) & ~(x))
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#define VR_SETBIT(sc, reg, x) CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x))
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#define VR_CLRBIT(sc, reg, x) CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x))
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#define VR_SETBIT32(sc, reg, x) \
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CSR_WRITE_4(sc, reg, \
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CSR_READ_4(sc, reg) | (x))
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#define VR_CLRBIT32(sc, reg, x) \
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CSR_WRITE_4(sc, reg, \
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CSR_READ_4(sc, reg) & ~(x))
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#define SIO_SET(x) \
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CSR_WRITE_1(sc, VR_MIICMD, \
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CSR_READ_1(sc, VR_MIICMD) | (x))
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#define SIO_CLR(x) \
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CSR_WRITE_1(sc, VR_MIICMD, \
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CSR_READ_1(sc, VR_MIICMD) & ~(x))
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#define VR_SETBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))
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#define VR_CLRBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
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#ifdef VR_USESWSHIFT
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#define CSR_READ_4(sc, reg) bus_read_4(sc->vr_res, reg)
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#define SIO_SET(x) CSR_WRITE_1(sc, VR_MIICMD, CSR_READ_1(sc, VR_MIICMD) | (x))
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#define SIO_CLR(x) CSR_WRITE_1(sc, VR_MIICMD, CSR_READ_1(sc, VR_MIICMD) & ~(x))
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/*
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* Sync the PHYs by setting data bit and strobing the clock 32 times.
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*/
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@ -292,7 +303,7 @@ vr_mii_send(struct vr_softc *sc, uint32_t bits, int cnt)
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* Read an PHY register through the MII.
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*/
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static int
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vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
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vr_mii_readreg(const struct vr_softc *sc, struct vr_mii_frame *frame)
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#ifdef VR_USESWSHIFT
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{
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int i, ack;
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@ -397,7 +408,7 @@ vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
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* Write to a PHY register through the MII.
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*/
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static int
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vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame)
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vr_mii_writereg(const struct vr_softc *sc, const struct vr_mii_frame *frame)
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#ifdef VR_USESWSHIFT
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{
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CSR_WRITE_1(sc, VR_MIICMD, 0);
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@ -461,22 +472,13 @@ vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg)
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struct vr_mii_frame frame;
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struct vr_softc *sc = device_get_softc(dev);
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switch (sc->vr_revid) {
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case REV_ID_VT6102_APOLLO:
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if (phy != 1) {
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frame.mii_data = 0;
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goto out;
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}
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default:
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break;
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}
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if (sc->vr_revid == REV_ID_VT6102_APOLLO && phy != 1)
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return (0);
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bzero((char *)&frame, sizeof(frame));
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frame.mii_phyaddr = phy;
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frame.mii_regaddr = reg;
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vr_mii_readreg(sc, &frame);
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out:
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return (frame.mii_data);
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}
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@ -486,13 +488,8 @@ vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data)
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struct vr_mii_frame frame;
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struct vr_softc *sc = device_get_softc(dev);
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switch (sc->vr_revid) {
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case REV_ID_VT6102_APOLLO:
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if (phy != 1)
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return (0);
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default:
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break;
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}
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if (sc->vr_revid == REV_ID_VT6102_APOLLO && phy != 1)
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return (0);
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bzero((char *)&frame, sizeof(frame));
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frame.mii_phyaddr = phy;
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@ -594,7 +591,7 @@ vr_setcfg(struct vr_softc *sc, int media)
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}
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static void
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vr_reset(struct vr_softc *sc)
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vr_reset(const struct vr_softc *sc)
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{
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register int i;
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@ -659,19 +656,17 @@ vr_probe(device_t dev)
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* setup and ethernet/BPF attach.
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*/
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static int
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vr_attach(dev)
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device_t dev;
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vr_attach(device_t dev)
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{
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int i;
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u_char eaddr[ETHER_ADDR_LEN];
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struct vr_softc *sc;
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struct ifnet *ifp;
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int unit, error = 0, rid;
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int error = 0, rid;
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struct vr_type *t;
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sc = device_get_softc(dev);
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sc->vr_dev = dev;
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unit = device_get_unit(dev);
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t = vr_match(dev);
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KASSERT(t != NULL, ("Lost if_vr device match"));
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sc->vr_quirks = t->vr_quirks;
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@ -908,7 +903,7 @@ vr_list_rx_init(struct vr_softc *sc)
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for (i = 0; i < VR_RX_LIST_CNT; i++) {
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cd->vr_rx_chain[i].vr_ptr =
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(struct vr_desc *)&ld->vr_rx_list[i];
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if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS)
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if (vr_newbuf(&cd->vr_rx_chain[i], NULL) == ENOBUFS)
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return (ENOBUFS);
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if (i == (VR_RX_LIST_CNT - 1)) {
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cd->vr_rx_chain[i].vr_nextdesc =
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@ -936,7 +931,7 @@ vr_list_rx_init(struct vr_softc *sc)
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* overflow the field and make a mess.
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*/
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static int
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vr_newbuf(struct vr_softc *sc, struct vr_chain_onefrag *c, struct mbuf *m)
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vr_newbuf(struct vr_chain_onefrag *c, struct mbuf *m)
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{
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struct mbuf *m_new = NULL;
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@ -1022,7 +1017,7 @@ vr_rxeof(struct vr_softc *sc)
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if (rxstat & VR_RXSTAT_BUFFERR)
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printf("rx buffer error");
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printf("\n");
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vr_newbuf(sc, cur_rx, m);
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vr_newbuf(cur_rx, m);
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continue;
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}
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@ -1051,7 +1046,7 @@ vr_rxeof(struct vr_softc *sc)
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m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp,
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NULL);
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vr_newbuf(sc, cur_rx, m);
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vr_newbuf(cur_rx, m);
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if (m0 == NULL) {
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ifp->if_ierrors++;
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continue;
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@ -1458,6 +1453,7 @@ vr_start_locked(struct ifnet *ifp)
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("vr_next not 16 byte aligned 0x%x", f->vr_next));
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}
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KASSERT(f != NULL, ("if_vr: no packet processed"));
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f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT;
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cur_tx->vr_mbuf = m_head;
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atomic_set_acq_32(&VR_TXOWN(cur_tx), VR_TXSTAT_OWN);
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@ -462,44 +462,6 @@ struct vr_mii_frame {
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#define VR_FLAG_SCHEDDELAY 2
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#define VR_FLAG_DELAYTIMEO 3
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struct vr_softc {
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struct ifnet *vr_ifp; /* interface info */
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device_t vr_dev;
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struct resource *vr_res;
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struct resource *vr_irq;
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void *vr_intrhand;
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device_t vr_miibus;
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struct vr_type *vr_info; /* Rhine adapter info */
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u_int8_t vr_type;
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u_int8_t vr_revid; /* Rhine chip revision */
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u_int8_t vr_flags; /* See VR_F_* below */
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struct vr_list_data *vr_ldata;
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struct vr_chain_data vr_cdata;
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struct callout vr_stat_callout;
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struct mtx vr_mtx;
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int suspended; /* if 1, sleeping/detaching */
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int vr_quirks;
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#ifdef DEVICE_POLLING
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int rxcycles;
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#endif
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};
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#define VR_F_RESTART 0x01 /* Restart unit on next tick */
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#define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx)
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#define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx)
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#define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED)
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/*
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* register space access macros
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*/
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#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val)
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#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val)
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#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val)
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#define CSR_READ_4(sc, reg) bus_read_4(sc->vr_res, reg)
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#define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg)
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#define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg)
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#define VR_TIMEOUT 1000
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#define ETHER_ALIGN 2
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124
sys/pci/if_vr.c
124
sys/pci/if_vr.c
@ -74,7 +74,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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@ -89,10 +88,8 @@ __FBSDID("$FreeBSD$");
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#define VR_USEIOSPACE
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@ -136,12 +133,32 @@ static struct vr_type vr_devs[] = {
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{ 0, 0, 0, NULL }
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};
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struct vr_softc {
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struct ifnet *vr_ifp; /* interface info */
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device_t vr_dev;
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struct resource *vr_res;
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struct resource *vr_irq;
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void *vr_intrhand;
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device_t vr_miibus;
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u_int8_t vr_revid; /* Rhine chip revision */
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u_int8_t vr_flags; /* See VR_F_* below */
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struct vr_list_data *vr_ldata;
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struct vr_chain_data vr_cdata;
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struct callout vr_stat_callout;
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struct mtx vr_mtx;
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int suspended; /* if 1, sleeping/detaching */
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int vr_quirks;
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#ifdef DEVICE_POLLING
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int rxcycles;
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#endif
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};
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static int vr_probe(device_t);
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static int vr_attach(device_t);
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static int vr_detach(device_t);
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static int vr_newbuf(struct vr_softc *, struct vr_chain_onefrag *,
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struct mbuf *);
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static int vr_newbuf(struct vr_chain_onefrag *, struct mbuf *);
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static void vr_rxeof(struct vr_softc *);
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static void vr_rxeoc(struct vr_softc *);
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@ -163,15 +180,15 @@ static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static void vr_mii_sync(struct vr_softc *);
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static void vr_mii_send(struct vr_softc *, uint32_t, int);
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#endif
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static int vr_mii_readreg(struct vr_softc *, struct vr_mii_frame *);
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static int vr_mii_writereg(struct vr_softc *, struct vr_mii_frame *);
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static int vr_mii_readreg(const struct vr_softc *, struct vr_mii_frame *);
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static int vr_mii_writereg(const struct vr_softc *, const struct vr_mii_frame *);
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static int vr_miibus_readreg(device_t, uint16_t, uint16_t);
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static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t);
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static void vr_miibus_statchg(device_t);
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static void vr_setcfg(struct vr_softc *, int);
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static void vr_setmulti(struct vr_softc *);
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static void vr_reset(struct vr_softc *);
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static void vr_reset(const struct vr_softc *);
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static int vr_list_rx_init(struct vr_softc *);
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static int vr_list_tx_init(struct vr_softc *);
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@ -212,40 +229,34 @@ static devclass_t vr_devclass;
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|
||||
DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0);
|
||||
DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
|
||||
#define VR_F_RESTART 0x01 /* Restart unit on next tick */
|
||||
|
||||
#define VR_SETBIT(sc, reg, x) \
|
||||
CSR_WRITE_1(sc, reg, \
|
||||
CSR_READ_1(sc, reg) | (x))
|
||||
#define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx)
|
||||
#define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx)
|
||||
#define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED)
|
||||
|
||||
#define VR_CLRBIT(sc, reg, x) \
|
||||
CSR_WRITE_1(sc, reg, \
|
||||
CSR_READ_1(sc, reg) & ~(x))
|
||||
/*
|
||||
* register space access macros
|
||||
*/
|
||||
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val)
|
||||
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val)
|
||||
#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val)
|
||||
|
||||
#define VR_SETBIT16(sc, reg, x) \
|
||||
CSR_WRITE_2(sc, reg, \
|
||||
CSR_READ_2(sc, reg) | (x))
|
||||
#define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg)
|
||||
#define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg)
|
||||
|
||||
#define VR_CLRBIT16(sc, reg, x) \
|
||||
CSR_WRITE_2(sc, reg, \
|
||||
CSR_READ_2(sc, reg) & ~(x))
|
||||
#define VR_SETBIT(sc, reg, x) CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x))
|
||||
#define VR_CLRBIT(sc, reg, x) CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x))
|
||||
|
||||
#define VR_SETBIT32(sc, reg, x) \
|
||||
CSR_WRITE_4(sc, reg, \
|
||||
CSR_READ_4(sc, reg) | (x))
|
||||
|
||||
#define VR_CLRBIT32(sc, reg, x) \
|
||||
CSR_WRITE_4(sc, reg, \
|
||||
CSR_READ_4(sc, reg) & ~(x))
|
||||
|
||||
#define SIO_SET(x) \
|
||||
CSR_WRITE_1(sc, VR_MIICMD, \
|
||||
CSR_READ_1(sc, VR_MIICMD) | (x))
|
||||
|
||||
#define SIO_CLR(x) \
|
||||
CSR_WRITE_1(sc, VR_MIICMD, \
|
||||
CSR_READ_1(sc, VR_MIICMD) & ~(x))
|
||||
#define VR_SETBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))
|
||||
#define VR_CLRBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
|
||||
|
||||
#ifdef VR_USESWSHIFT
|
||||
|
||||
#define CSR_READ_4(sc, reg) bus_read_4(sc->vr_res, reg)
|
||||
#define SIO_SET(x) CSR_WRITE_1(sc, VR_MIICMD, CSR_READ_1(sc, VR_MIICMD) | (x))
|
||||
#define SIO_CLR(x) CSR_WRITE_1(sc, VR_MIICMD, CSR_READ_1(sc, VR_MIICMD) & ~(x))
|
||||
|
||||
/*
|
||||
* Sync the PHYs by setting data bit and strobing the clock 32 times.
|
||||
*/
|
||||
@ -292,7 +303,7 @@ vr_mii_send(struct vr_softc *sc, uint32_t bits, int cnt)
|
||||
* Read an PHY register through the MII.
|
||||
*/
|
||||
static int
|
||||
vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
|
||||
vr_mii_readreg(const struct vr_softc *sc, struct vr_mii_frame *frame)
|
||||
#ifdef VR_USESWSHIFT
|
||||
{
|
||||
int i, ack;
|
||||
@ -397,7 +408,7 @@ vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
|
||||
* Write to a PHY register through the MII.
|
||||
*/
|
||||
static int
|
||||
vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame)
|
||||
vr_mii_writereg(const struct vr_softc *sc, const struct vr_mii_frame *frame)
|
||||
#ifdef VR_USESWSHIFT
|
||||
{
|
||||
CSR_WRITE_1(sc, VR_MIICMD, 0);
|
||||
@ -461,22 +472,13 @@ vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg)
|
||||
struct vr_mii_frame frame;
|
||||
struct vr_softc *sc = device_get_softc(dev);
|
||||
|
||||
switch (sc->vr_revid) {
|
||||
case REV_ID_VT6102_APOLLO:
|
||||
if (phy != 1) {
|
||||
frame.mii_data = 0;
|
||||
goto out;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if (sc->vr_revid == REV_ID_VT6102_APOLLO && phy != 1)
|
||||
return (0);
|
||||
|
||||
bzero((char *)&frame, sizeof(frame));
|
||||
frame.mii_phyaddr = phy;
|
||||
frame.mii_regaddr = reg;
|
||||
vr_mii_readreg(sc, &frame);
|
||||
|
||||
out:
|
||||
return (frame.mii_data);
|
||||
}
|
||||
|
||||
@ -486,13 +488,8 @@ vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data)
|
||||
struct vr_mii_frame frame;
|
||||
struct vr_softc *sc = device_get_softc(dev);
|
||||
|
||||
switch (sc->vr_revid) {
|
||||
case REV_ID_VT6102_APOLLO:
|
||||
if (phy != 1)
|
||||
return (0);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if (sc->vr_revid == REV_ID_VT6102_APOLLO && phy != 1)
|
||||
return (0);
|
||||
|
||||
bzero((char *)&frame, sizeof(frame));
|
||||
frame.mii_phyaddr = phy;
|
||||
@ -594,7 +591,7 @@ vr_setcfg(struct vr_softc *sc, int media)
|
||||
}
|
||||
|
||||
static void
|
||||
vr_reset(struct vr_softc *sc)
|
||||
vr_reset(const struct vr_softc *sc)
|
||||
{
|
||||
register int i;
|
||||
|
||||
@ -659,19 +656,17 @@ vr_probe(device_t dev)
|
||||
* setup and ethernet/BPF attach.
|
||||
*/
|
||||
static int
|
||||
vr_attach(dev)
|
||||
device_t dev;
|
||||
vr_attach(device_t dev)
|
||||
{
|
||||
int i;
|
||||
u_char eaddr[ETHER_ADDR_LEN];
|
||||
struct vr_softc *sc;
|
||||
struct ifnet *ifp;
|
||||
int unit, error = 0, rid;
|
||||
int error = 0, rid;
|
||||
struct vr_type *t;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
sc->vr_dev = dev;
|
||||
unit = device_get_unit(dev);
|
||||
t = vr_match(dev);
|
||||
KASSERT(t != NULL, ("Lost if_vr device match"));
|
||||
sc->vr_quirks = t->vr_quirks;
|
||||
@ -908,7 +903,7 @@ vr_list_rx_init(struct vr_softc *sc)
|
||||
for (i = 0; i < VR_RX_LIST_CNT; i++) {
|
||||
cd->vr_rx_chain[i].vr_ptr =
|
||||
(struct vr_desc *)&ld->vr_rx_list[i];
|
||||
if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS)
|
||||
if (vr_newbuf(&cd->vr_rx_chain[i], NULL) == ENOBUFS)
|
||||
return (ENOBUFS);
|
||||
if (i == (VR_RX_LIST_CNT - 1)) {
|
||||
cd->vr_rx_chain[i].vr_nextdesc =
|
||||
@ -936,7 +931,7 @@ vr_list_rx_init(struct vr_softc *sc)
|
||||
* overflow the field and make a mess.
|
||||
*/
|
||||
static int
|
||||
vr_newbuf(struct vr_softc *sc, struct vr_chain_onefrag *c, struct mbuf *m)
|
||||
vr_newbuf(struct vr_chain_onefrag *c, struct mbuf *m)
|
||||
{
|
||||
struct mbuf *m_new = NULL;
|
||||
|
||||
@ -1022,7 +1017,7 @@ vr_rxeof(struct vr_softc *sc)
|
||||
if (rxstat & VR_RXSTAT_BUFFERR)
|
||||
printf("rx buffer error");
|
||||
printf("\n");
|
||||
vr_newbuf(sc, cur_rx, m);
|
||||
vr_newbuf(cur_rx, m);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -1051,7 +1046,7 @@ vr_rxeof(struct vr_softc *sc)
|
||||
|
||||
m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp,
|
||||
NULL);
|
||||
vr_newbuf(sc, cur_rx, m);
|
||||
vr_newbuf(cur_rx, m);
|
||||
if (m0 == NULL) {
|
||||
ifp->if_ierrors++;
|
||||
continue;
|
||||
@ -1458,6 +1453,7 @@ vr_start_locked(struct ifnet *ifp)
|
||||
("vr_next not 16 byte aligned 0x%x", f->vr_next));
|
||||
}
|
||||
|
||||
KASSERT(f != NULL, ("if_vr: no packet processed"));
|
||||
f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT;
|
||||
cur_tx->vr_mbuf = m_head;
|
||||
atomic_set_acq_32(&VR_TXOWN(cur_tx), VR_TXSTAT_OWN);
|
||||
|
||||
@ -462,44 +462,6 @@ struct vr_mii_frame {
|
||||
#define VR_FLAG_SCHEDDELAY 2
|
||||
#define VR_FLAG_DELAYTIMEO 3
|
||||
|
||||
struct vr_softc {
|
||||
struct ifnet *vr_ifp; /* interface info */
|
||||
device_t vr_dev;
|
||||
struct resource *vr_res;
|
||||
struct resource *vr_irq;
|
||||
void *vr_intrhand;
|
||||
device_t vr_miibus;
|
||||
struct vr_type *vr_info; /* Rhine adapter info */
|
||||
u_int8_t vr_type;
|
||||
u_int8_t vr_revid; /* Rhine chip revision */
|
||||
u_int8_t vr_flags; /* See VR_F_* below */
|
||||
struct vr_list_data *vr_ldata;
|
||||
struct vr_chain_data vr_cdata;
|
||||
struct callout vr_stat_callout;
|
||||
struct mtx vr_mtx;
|
||||
int suspended; /* if 1, sleeping/detaching */
|
||||
int vr_quirks;
|
||||
#ifdef DEVICE_POLLING
|
||||
int rxcycles;
|
||||
#endif
|
||||
};
|
||||
|
||||
#define VR_F_RESTART 0x01 /* Restart unit on next tick */
|
||||
|
||||
#define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx)
|
||||
#define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx)
|
||||
#define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED)
|
||||
|
||||
/*
|
||||
* register space access macros
|
||||
*/
|
||||
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val)
|
||||
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val)
|
||||
#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val)
|
||||
|
||||
#define CSR_READ_4(sc, reg) bus_read_4(sc->vr_res, reg)
|
||||
#define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg)
|
||||
#define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg)
|
||||
|
||||
#define VR_TIMEOUT 1000
|
||||
#define ETHER_ALIGN 2
|
||||
|
||||
Loading…
Reference in New Issue
Block a user