Redefine bus_space_tag_t on PowerPC from a 32-bit integral to
a pointer to struct bus_space. The structure contains function pointers that do the actual bus space access. The reason for this change is that previously all bus space accesses were little endian (i.e. had an explicit byte-swap for multi-byte accesses), because all busses on Macs are little endian. The upcoming support for Book E, and in particular the E500 core, requires support for big-endian busses because all embedded peripherals are in the native byte-order. With this change, there's no distinction between I/O port space and memory mapped I/O. PowerPC doesn't have I/O port space. Busses assign tags based on the byte-order only. For that purpose, two global structures exist (bs_be_tag and bs_le_tag), of which the address can be taken to get a valid tag. Obtained from: Juniper, Semihalf
This commit is contained in:
parent
93ea7f3594
commit
c932130a31
@ -85,6 +85,7 @@ powerpc/powermac/uninorth.c optional powermac pci
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powerpc/powerpc/atomic.S standard
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powerpc/powerpc/autoconf.c standard
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powerpc/powerpc/bcopy.c standard
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powerpc/powerpc/bus_machdep.c standard
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powerpc/powerpc/busdma_machdep.c standard
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powerpc/powerpc/copystr.c standard
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powerpc/powerpc/cpu.c standard
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@ -40,6 +40,7 @@
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/nexusvar.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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@ -38,8 +38,8 @@ __FBSDID("$FreeBSD$");
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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bus_space_tag_t uart_bus_space_io = PPC_BUS_SPACE_IO;
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bus_space_tag_t uart_bus_space_mem = PPC_BUS_SPACE_MEM;
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bus_space_tag_t uart_bus_space_io = &bs_le_tag;
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bus_space_tag_t uart_bus_space_mem = &bs_le_tag;
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int
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uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
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@ -415,10 +415,7 @@ OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
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OF_get_addr_props(bridge, &naddr, &nsize, &pci);
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}
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/* Default to memory mapped I/O. */
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*tag = PPC_BUS_SPACE_MEM;
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if (spc == OFW_PCI_PHYS_HI_SPACE_IO)
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*tag = PPC_BUS_SPACE_IO;
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*tag = &bs_le_tag;
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return (bus_space_map(*tag, addr, size, 0, handle));
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}
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@ -47,6 +47,8 @@ nodevice snake_saver
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# isa
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nodevice pcii
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nodevice tnt4882
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# sound
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nodevice snd_cmi
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# wants gdb_cur
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nodevice dcons
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nodevice dcons_crom
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@ -40,7 +40,7 @@ typedef u_int32_t bus_size_t;
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/*
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* Access methods for bus resources and address space.
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*/
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typedef u_int32_t bus_space_tag_t;
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typedef struct bus_space *bus_space_tag_t;
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typedef u_int32_t bus_space_handle_t;
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#endif /* POWERPC_INCLUDE__BUS_H */
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File diff suppressed because it is too large
Load Diff
@ -43,6 +43,7 @@
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/nexusvar.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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@ -363,7 +364,6 @@ grackle_alloc_resource(device_t bus, device_t child, int type, int *rid,
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struct grackle_softc *sc;
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struct resource *rv;
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struct rman *rm;
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bus_space_tag_t bt;
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int needactivate;
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needactivate = flags & RF_ACTIVE;
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@ -374,18 +374,15 @@ grackle_alloc_resource(device_t bus, device_t child, int type, int *rid,
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switch (type) {
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case SYS_RES_MEMORY:
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rm = &sc->sc_mem_rman;
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bt = PPC_BUS_SPACE_MEM;
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break;
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case SYS_RES_IOPORT:
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rm = &sc->sc_io_rman;
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bt = PPC_BUS_SPACE_IO;
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break;
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case SYS_RES_IRQ:
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return (bus_alloc_resource(bus, type, rid, start, end, count,
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flags));
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break;
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default:
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device_printf(bus, "unknown resource request from %s\n",
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@ -401,7 +398,7 @@ grackle_alloc_resource(device_t bus, device_t child, int type, int *rid,
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}
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rman_set_rid(rv, *rid);
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rman_set_bustag(rv, bt);
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rman_set_bustag(rv, &bs_le_tag);
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rman_set_bushandle(rv, rman_get_start(rv));
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if (needactivate) {
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@ -369,7 +369,6 @@ macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
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int needactivate;
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struct resource *rv;
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struct rman *rm;
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bus_space_tag_t tagval;
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u_long adjstart, adjend, adjcount;
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struct macio_devinfo *dinfo;
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struct resource_list_entry *rle;
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@ -408,8 +407,6 @@ macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
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adjcount = adjend - adjstart;
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rm = &sc->sc_mem_rman;
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tagval = PPC_BUS_SPACE_MEM;
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break;
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case SYS_RES_IRQ:
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@ -431,7 +428,6 @@ macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
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return (resource_list_alloc(&dinfo->mdi_resources, bus, child,
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type, rid, start, end, count, flags));
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break;
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default:
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device_printf(bus, "unknown resource request from %s\n",
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@ -449,7 +445,7 @@ macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
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}
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rman_set_rid(rv, *rid);
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rman_set_bustag(rv, tagval);
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rman_set_bustag(rv, &bs_le_tag);
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rman_set_bushandle(rv, rman_get_start(rv));
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if (needactivate) {
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@ -41,6 +41,7 @@
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/nexusvar.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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@ -347,7 +348,6 @@ uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
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struct uninorth_softc *sc;
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struct resource *rv;
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struct rman *rm;
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bus_space_tag_t bt;
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int needactivate;
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needactivate = flags & RF_ACTIVE;
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@ -358,18 +358,16 @@ uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
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switch (type) {
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case SYS_RES_MEMORY:
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rm = &sc->sc_mem_rman;
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bt = PPC_BUS_SPACE_MEM;
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break;
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case SYS_RES_IOPORT:
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rm = &sc->sc_io_rman;
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bt = PPC_BUS_SPACE_IO;
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break;
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case SYS_RES_IRQ:
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return (bus_alloc_resource(bus, type, rid, start, end, count,
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flags));
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break;
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default:
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device_printf(bus, "unknown resource request from %s\n",
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device_get_nameunit(child));
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@ -384,7 +382,7 @@ uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
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}
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rman_set_rid(rv, *rid);
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rman_set_bustag(rv, bt);
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rman_set_bustag(rv, &bs_le_tag);
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rman_set_bushandle(rv, rman_get_start(rv));
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if (needactivate) {
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788
sys/powerpc/powerpc/bus_machdep.c
Normal file
788
sys/powerpc/powerpc/bus_machdep.c
Normal file
@ -0,0 +1,788 @@
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/*-
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* Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
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* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/pio.h>
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#define TODO panic("%s: not implemented", __func__)
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static __inline void *
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__ppc_ba(bus_space_handle_t bsh, bus_size_t ofs)
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{
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return ((void *)(bsh + ofs));
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}
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static int
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bs_gen_map(bus_addr_t addr, bus_size_t size __unused, int flags __unused,
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bus_space_handle_t *bshp)
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{
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*bshp = addr;
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return (0);
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}
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static void
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bs_gen_unmap(bus_size_t size __unused)
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{
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}
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static int
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bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs,
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bus_size_t size __unused, bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + ofs;
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return (0);
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}
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static int
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bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused,
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bus_size_t size __unused, bus_size_t alignment __unused,
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bus_size_t boundary __unused, int flags __unused,
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bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused)
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{
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TODO;
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}
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static void
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bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused)
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{
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TODO;
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}
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static void
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bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused,
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bus_size_t size __unused, int flags __unused)
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{
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__asm __volatile("" : : : "memory");
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}
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/*
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* Big-endian access functions
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*/
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static uint8_t
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bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
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{
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return (in8(__ppc_ba(bsh, ofs)));
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}
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static uint16_t
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bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
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{
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return (in16(__ppc_ba(bsh, ofs)));
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}
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static uint32_t
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bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
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{
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return (in32(__ppc_ba(bsh, ofs)));
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}
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static uint64_t
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bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
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{
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TODO;
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}
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static void
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bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
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{
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ins8(__ppc_ba(bsh, ofs), addr, cnt);
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}
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static void
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bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
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{
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ins16(__ppc_ba(bsh, ofs), addr, cnt);
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}
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static void
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bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
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{
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ins32(__ppc_ba(bsh, ofs), addr, cnt);
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}
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static void
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bs_be_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
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{
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TODO;
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}
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static void
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bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
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{
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volatile uint8_t *s = __ppc_ba(bsh, ofs);
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while (cnt--)
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*addr++ = *s++;
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__asm __volatile("eieio; sync");
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}
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static void
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bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
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{
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volatile uint16_t *s = __ppc_ba(bsh, ofs);
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while (cnt--)
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*addr++ = *s++;
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__asm __volatile("eieio; sync");
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}
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static void
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bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
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{
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volatile uint32_t *s = __ppc_ba(bsh, ofs);
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while (cnt--)
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*addr++ = *s++;
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__asm __volatile("eieio; sync");
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}
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static void
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bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
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{
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TODO;
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}
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static void
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bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
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{
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out8(__ppc_ba(bsh, ofs), val);
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}
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static void
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bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
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{
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out16(__ppc_ba(bsh, ofs), val);
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}
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static void
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bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
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{
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out32(__ppc_ba(bsh, ofs), val);
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}
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static void
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bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
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{
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TODO;
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}
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static void
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bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
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bus_size_t cnt)
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{
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outsb(__ppc_ba(bsh, ofs), addr, cnt);
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}
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static void
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bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
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bus_size_t cnt)
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{
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outsw(__ppc_ba(bsh, ofs), addr, cnt);
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}
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static void
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bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
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bus_size_t cnt)
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{
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outsl(__ppc_ba(bsh, ofs), addr, cnt);
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}
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static void
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bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
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bus_size_t cnt)
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{
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TODO;
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}
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static void
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bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
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size_t cnt)
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{
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volatile uint8_t *d = __ppc_ba(bsh, ofs);
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while (cnt--)
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*d++ = *addr++;
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__asm __volatile("eieio; sync");
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}
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static void
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bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
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size_t cnt)
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{
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||||
volatile uint16_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = *addr++;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
|
||||
size_t cnt)
|
||||
{
|
||||
volatile uint32_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = *addr++;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
|
||||
size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
|
||||
{
|
||||
volatile uint8_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
|
||||
{
|
||||
volatile uint16_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
|
||||
{
|
||||
volatile uint32_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
|
||||
{
|
||||
volatile uint8_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
|
||||
{
|
||||
volatile uint16_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
|
||||
{
|
||||
volatile uint32_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
/*
|
||||
* Little-endian access functions
|
||||
*/
|
||||
static uint8_t
|
||||
bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
|
||||
{
|
||||
return (in8(__ppc_ba(bsh, ofs)));
|
||||
}
|
||||
|
||||
static uint16_t
|
||||
bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
|
||||
{
|
||||
return (in16rb(__ppc_ba(bsh, ofs)));
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
|
||||
{
|
||||
return (in32rb(__ppc_ba(bsh, ofs)));
|
||||
}
|
||||
|
||||
static uint64_t
|
||||
bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
|
||||
{
|
||||
ins8(__ppc_ba(bsh, ofs), addr, cnt);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
|
||||
{
|
||||
ins16rb(__ppc_ba(bsh, ofs), addr, cnt);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
|
||||
{
|
||||
ins32rb(__ppc_ba(bsh, ofs), addr, cnt);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
|
||||
{
|
||||
volatile uint8_t *s = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*addr++ = *s++;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
|
||||
{
|
||||
volatile uint16_t *s = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*addr++ = in16rb(s++);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
|
||||
{
|
||||
volatile uint32_t *s = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*addr++ = in32rb(s++);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
|
||||
{
|
||||
out8(__ppc_ba(bsh, ofs), val);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
|
||||
{
|
||||
out16rb(__ppc_ba(bsh, ofs), val);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
|
||||
{
|
||||
out32rb(__ppc_ba(bsh, ofs), val);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
|
||||
bus_size_t cnt)
|
||||
{
|
||||
outs8(__ppc_ba(bsh, ofs), addr, cnt);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
|
||||
bus_size_t cnt)
|
||||
{
|
||||
outs16rb(__ppc_ba(bsh, ofs), addr, cnt);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
|
||||
bus_size_t cnt)
|
||||
{
|
||||
outs32rb(__ppc_ba(bsh, ofs), addr, cnt);
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
|
||||
bus_size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
|
||||
size_t cnt)
|
||||
{
|
||||
volatile uint8_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = *addr++;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
|
||||
size_t cnt)
|
||||
{
|
||||
volatile uint16_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
out16rb(d++, *addr++);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
|
||||
size_t cnt)
|
||||
{
|
||||
volatile uint32_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
out32rb(d++, *addr++);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
|
||||
size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
|
||||
{
|
||||
volatile uint8_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
|
||||
{
|
||||
volatile uint16_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
out16rb(d, val);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
|
||||
{
|
||||
volatile uint32_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
out32rb(d, val);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
|
||||
{
|
||||
volatile uint8_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
*d++ = val;
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
|
||||
{
|
||||
volatile uint16_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
out16rb(d++, val);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
|
||||
{
|
||||
volatile uint32_t *d = __ppc_ba(bsh, ofs);
|
||||
|
||||
while (cnt--)
|
||||
out32rb(d++, val);
|
||||
__asm __volatile("eieio; sync");
|
||||
}
|
||||
|
||||
static void
|
||||
bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
|
||||
{
|
||||
TODO;
|
||||
}
|
||||
|
||||
struct bus_space bs_be_tag = {
|
||||
/* mapping/unmapping */
|
||||
bs_gen_map,
|
||||
bs_gen_unmap,
|
||||
bs_gen_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
bs_gen_alloc,
|
||||
bs_gen_free,
|
||||
|
||||
/* barrier */
|
||||
bs_gen_barrier,
|
||||
|
||||
/* read (single) */
|
||||
bs_be_rs_1,
|
||||
bs_be_rs_2,
|
||||
bs_be_rs_4,
|
||||
bs_be_rs_8,
|
||||
|
||||
bs_be_rs_2,
|
||||
bs_be_rs_4,
|
||||
bs_be_rs_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_be_rm_1,
|
||||
bs_be_rm_2,
|
||||
bs_be_rm_4,
|
||||
bs_be_rm_8,
|
||||
|
||||
bs_be_rm_2,
|
||||
bs_be_rm_4,
|
||||
bs_be_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_be_rr_1,
|
||||
bs_be_rr_2,
|
||||
bs_be_rr_4,
|
||||
bs_be_rr_8,
|
||||
|
||||
bs_be_rr_2,
|
||||
bs_be_rr_4,
|
||||
bs_be_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
bs_be_ws_1,
|
||||
bs_be_ws_2,
|
||||
bs_be_ws_4,
|
||||
bs_be_ws_8,
|
||||
|
||||
bs_be_ws_2,
|
||||
bs_be_ws_4,
|
||||
bs_be_ws_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_be_wm_1,
|
||||
bs_be_wm_2,
|
||||
bs_be_wm_4,
|
||||
bs_be_wm_8,
|
||||
|
||||
bs_be_wm_2,
|
||||
bs_be_wm_4,
|
||||
bs_be_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_be_wr_1,
|
||||
bs_be_wr_2,
|
||||
bs_be_wr_4,
|
||||
bs_be_wr_8,
|
||||
|
||||
bs_be_wr_2,
|
||||
bs_be_wr_4,
|
||||
bs_be_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_be_sm_1,
|
||||
bs_be_sm_2,
|
||||
bs_be_sm_4,
|
||||
bs_be_sm_8,
|
||||
|
||||
bs_be_sm_2,
|
||||
bs_be_sm_4,
|
||||
bs_be_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_be_sr_1,
|
||||
bs_be_sr_2,
|
||||
bs_be_sr_4,
|
||||
bs_be_sr_8,
|
||||
|
||||
bs_be_sr_2,
|
||||
bs_be_sr_4,
|
||||
bs_be_sr_8,
|
||||
};
|
||||
|
||||
struct bus_space bs_le_tag = {
|
||||
/* mapping/unmapping */
|
||||
bs_gen_map,
|
||||
bs_gen_unmap,
|
||||
bs_gen_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
bs_gen_alloc,
|
||||
bs_gen_free,
|
||||
|
||||
/* barrier */
|
||||
bs_gen_barrier,
|
||||
|
||||
/* read (single) */
|
||||
bs_le_rs_1,
|
||||
bs_le_rs_2,
|
||||
bs_le_rs_4,
|
||||
bs_le_rs_8,
|
||||
|
||||
bs_be_rs_2,
|
||||
bs_be_rs_4,
|
||||
bs_be_rs_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_le_rm_1,
|
||||
bs_le_rm_2,
|
||||
bs_le_rm_4,
|
||||
bs_le_rm_8,
|
||||
|
||||
bs_be_rm_2,
|
||||
bs_be_rm_4,
|
||||
bs_be_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_le_rr_1,
|
||||
bs_le_rr_2,
|
||||
bs_le_rr_4,
|
||||
bs_le_rr_8,
|
||||
|
||||
bs_be_rr_2,
|
||||
bs_be_rr_4,
|
||||
bs_be_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
bs_le_ws_1,
|
||||
bs_le_ws_2,
|
||||
bs_le_ws_4,
|
||||
bs_le_ws_8,
|
||||
|
||||
bs_be_ws_2,
|
||||
bs_be_ws_4,
|
||||
bs_be_ws_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_le_wm_1,
|
||||
bs_le_wm_2,
|
||||
bs_le_wm_4,
|
||||
bs_le_wm_8,
|
||||
|
||||
bs_be_wm_2,
|
||||
bs_be_wm_4,
|
||||
bs_be_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_le_wr_1,
|
||||
bs_le_wr_2,
|
||||
bs_le_wr_4,
|
||||
bs_le_wr_8,
|
||||
|
||||
bs_be_wr_2,
|
||||
bs_be_wr_4,
|
||||
bs_be_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_le_sm_1,
|
||||
bs_le_sm_2,
|
||||
bs_le_sm_4,
|
||||
bs_le_sm_8,
|
||||
|
||||
bs_be_sm_2,
|
||||
bs_be_sm_4,
|
||||
bs_be_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_le_sr_1,
|
||||
bs_le_sr_2,
|
||||
bs_le_sr_4,
|
||||
bs_le_sr_8,
|
||||
|
||||
bs_be_sr_2,
|
||||
bs_be_sr_4,
|
||||
bs_be_sr_8,
|
||||
};
|
@ -311,7 +311,6 @@ iobus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
||||
int needactivate;
|
||||
struct resource *rv;
|
||||
struct rman *rm;
|
||||
bus_space_tag_t tagval;
|
||||
|
||||
sc = device_get_softc(bus);
|
||||
|
||||
@ -322,15 +321,13 @@ iobus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
||||
case SYS_RES_MEMORY:
|
||||
case SYS_RES_IOPORT:
|
||||
rm = &sc->sc_mem_rman;
|
||||
tagval = PPC_BUS_SPACE_MEM;
|
||||
break;
|
||||
case SYS_RES_IRQ:
|
||||
return (bus_alloc_resource(bus, type, rid, start, end, count,
|
||||
flags));
|
||||
break;
|
||||
flags));
|
||||
default:
|
||||
device_printf(bus, "unknown resource request from %s\n",
|
||||
device_get_nameunit(child));
|
||||
device_get_nameunit(child));
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
@ -342,7 +339,7 @@ iobus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
||||
}
|
||||
|
||||
rman_set_rid(rv, *rid);
|
||||
rman_set_bustag(rv, tagval);
|
||||
rman_set_bustag(rv, &bs_le_tag);
|
||||
rman_set_bushandle(rv, rman_get_start(rv));
|
||||
|
||||
if (needactivate) {
|
||||
|
Loading…
x
Reference in New Issue
Block a user