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arm64: remove exception instruction length assertion

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From the (now removed) comment:

 * It is unclear in some cases if the bit is implementation defined.
 * The Foundation Model and QEMU disagree on if the IL bit should
 * be set when we are in a data fault from the same EL and the ISV
 * bit (bit 24) is also set.

Instead of adding even more special cases just remove the assertion.

Approved by:	andrew
Sponsored by:	The FreeBSD Foundation
This commit is contained in:
emaste 2015-10-23 15:24:00 +00:00
parent f317ccd8a1
commit c9a1277fcf
1 changed files with 0 additions and 14 deletions
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14
sys/arm64/arm64/trap.c
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@ -263,20 +263,6 @@ do_el1h_sync(struct trapframe *frame)
return;
#endif
/*
* Sanity check we are in an exception er can handle. The IL bit
* is used to indicate the instruction length, except in a few
* exceptions described in the ARMv8 ARM.
*
* It is unclear in some cases if the bit is implementation defined.
* The Foundation Model and QEMU disagree on if the IL bit should
* be set when we are in a data fault from the same EL and the ISV
* bit (bit 24) is also set.
*/
KASSERT((esr & ESR_ELx_IL) == ESR_ELx_IL ||
(exception == EXCP_DATA_ABORT && ((esr & ISS_DATA_ISV) == 0)),
("Invalid instruction length in exception, esr %lx", esr));
CTR4(KTR_TRAP,
"do_el1_sync: curthread: %p, esr %lx, elr: %lx, frame: %p",
curthread, esr, frame->tf_elr, frame);