diff --git a/sys/dev/ath/ath_hal/ah_internal.h b/sys/dev/ath/ath_hal/ah_internal.h
index c4ffe745f850..1dd8dcdce52f 100644
--- a/sys/dev/ath/ath_hal/ah_internal.h
+++ b/sys/dev/ath/ath_hal/ah_internal.h
@@ -205,7 +205,8 @@ typedef struct {
 			halMbssidAggrSupport		: 1,
 			halBssidMatchSupport		: 1,
 			hal4kbSplitTransSupport		: 1,
-			halHasRxSelfLinkedTail		: 1;
+			halHasRxSelfLinkedTail		: 1,
+			halSupportsFastClock5GHz	: 1;	/* Hardware supports 5ghz fast clock; check eeprom/channel before using */
 	uint32_t	halWirelessModes;
 	uint16_t	halTotalQueues;
 	uint16_t	halKeyCacheSize;
@@ -807,10 +808,21 @@ extern	HAL_BOOL ath_ee_FillVpdTable(uint8_t pwrMin, uint8_t pwrMax,
 extern	int16_t ath_ee_interpolate(uint16_t target, uint16_t srcLeft,
 	uint16_t srcRight, int16_t targetLeft, int16_t targetRight);
 
-/* Whether 5ghz fast clock is needed for Merlin and later */
+/* Whether 5ghz fast clock is needed */
+/*
+ * The chipset (Merlin, AR9300/later) should set the capability flag below;
+ * this flag simply says that the hardware can do it, not that the EEPROM
+ * says it can.
+ *
+ * Merlin 2.0/2.1 chips with an EEPROM version > 16 do 5ghz fast clock
+ *   if the relevant eeprom flag is set.
+ * Merlin 2.0/2.1 chips with an EEPROM version <= 16 do 5ghz fast clock
+ *   by default.
+ */
 #define	IS_5GHZ_FAST_CLOCK_EN(_ah, _c) \
 	(IEEE80211_IS_CHAN_5GHZ(_c) && \
-	ath_hal_eepromGetFlag(ah, AR_EEP_FSTCLK_5G))
+	 AH_PRIVATE((_ah))->ah_caps.halSupportsFastClock5GHz && \
+	ath_hal_eepromGetFlag((_ah), AR_EEP_FSTCLK_5G))
 
 
 #endif /* _ATH_AH_INTERAL_H_ */
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
index 5e44cc573e11..b4aaa7b60e42 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
@@ -787,8 +787,14 @@ ar9280FillCapabilityInfo(struct ath_hal *ah)
 	pCap->halMbssidAggrSupport = AH_TRUE;
 	pCap->hal4AddrAggrSupport = AH_TRUE;
 
-	if (AR_SREV_MERLIN_20_OR_LATER(ah))
+	if (AR_SREV_MERLIN_20(ah)) {
 		pCap->halPSPollBroken = AH_FALSE;
+		/*
+		 * This just enables the support; it doesn't
+		 * state 5ghz fast clock will always be used.
+		 */
+		pCap->halSupportsFastClock5GHz = AH_TRUE;
+	}
 	pCap->halRxStbcSupport = 1;
 	pCap->halTxStbcSupport = 1;