MFC: r258051, r258052
r258052: Following the approach with ACPI DMAR on x86, split IOMMU handling into a variant PCI bus instead of trying to shoehorn it into the PCI host bridge adapter. Besides matching better the architecture on other platforms, this also allows systems with multiple partitionable endpoints per PCI host bridge to work correctly. r258051: Actually add IOMMU domain to the list of known mappings. This fixes a bug where multiple devices in the same IOMMU domain would be allocated conflicting mappings unless they also shared a DMA tag.
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14be275758
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@ -232,6 +232,7 @@ powerpc/pseries/phyp_llan.c optional llan
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powerpc/pseries/phyp_vscsi.c optional pseries powerpc64 scbus
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powerpc/pseries/platform_chrp.c optional pseries
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powerpc/pseries/plpar_iommu.c optional pseries powerpc64
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powerpc/pseries/plpar_pcibus.c optional pseries powerpc64 pci
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powerpc/pseries/rtas_dev.c optional pseries
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powerpc/pseries/rtas_pci.c optional pseries pci
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powerpc/pseries/vdevice.c optional pseries powerpc64
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@ -50,6 +50,7 @@ __FBSDID("$FreeBSD$");
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_private.h>
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#include "ofw_pcibus.h"
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#include "pcib_if.h"
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#include "pci_if.h"
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@ -85,12 +86,7 @@ static device_method_t ofw_pcibus_methods[] = {
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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struct ofw_pcibus_devinfo {
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struct pci_devinfo opd_dinfo;
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struct ofw_bus_devinfo opd_obdinfo;
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DEVMETHOD_END
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};
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static devclass_t pci_devclass;
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@ -195,6 +191,7 @@ ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
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pci_freecfg((struct pci_devinfo *)dinfo);
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continue;
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}
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dinfo->opd_dma_tag = NULL;
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pci_add_child(dev, (struct pci_devinfo *)dinfo);
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/*
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@ -274,6 +271,7 @@ ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
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if (dinfo == NULL)
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continue;
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dinfo->opd_dma_tag = NULL;
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dinfo->opd_obdinfo.obd_node = -1;
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dinfo->opd_obdinfo.obd_name = NULL;
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51
sys/powerpc/ofw/ofw_pcibus.h
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51
sys/powerpc/ofw/ofw_pcibus.h
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@ -0,0 +1,51 @@
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/*-
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* Copyright (c) 2011 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef POWERPC_OFW_OFW_PCIBUS_H
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#define POWERPC_OFW_OFW_PCIBUS_H
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#include <sys/bus.h>
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#include <sys/pciio.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/pci/pcivar.h>
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/*
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* Export class definition for inheritance purposes
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*/
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DECLARE_CLASS(ofw_pcibus_driver); /* PCI Bus Enumerators */
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struct ofw_pcibus_devinfo {
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struct pci_devinfo opd_dinfo;
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struct ofw_bus_devinfo opd_obdinfo;
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bus_dma_tag_t opd_dma_tag;
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};
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#endif // POWERPC_OFW_OFW_PCIBUS_H
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@ -115,6 +115,8 @@ phyp_iommu_set_dma_tag(device_t dev, device_t child, bus_dma_tag_t tag)
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(((uint64_t)(dmawindow[dma_acells + 1]) << 32) |
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dmawindow[dma_acells + 2]);
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if (bootverbose)
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device_printf(dev, "Mapping IOMMU domain %#x\n", dmawindow[0]);
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window->map = NULL;
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SLIST_FOREACH(i, &iommu_map_head, entries) {
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if (i->iobn == dmawindow[0]) {
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@ -134,6 +136,7 @@ phyp_iommu_set_dma_tag(device_t dev, device_t child, bus_dma_tag_t tag)
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window->map->vmem = vmem_create("IOMMU mappings", PAGE_SIZE,
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trunc_page(VMEM_ADDR_MAX) - PAGE_SIZE, PAGE_SIZE, 0,
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M_BESTFIT | M_NOWAIT);
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SLIST_INSERT_HEAD(&iommu_map_head, window->map, entries);
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}
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/*
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113
sys/powerpc/pseries/plpar_pcibus.c
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113
sys/powerpc/pseries/plpar_pcibus.c
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@ -0,0 +1,113 @@
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/*-
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* Copyright (c) 2011 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/libkern.h>
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#include <sys/module.h>
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#include <sys/pciio.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pci_private.h>
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#include <machine/bus.h>
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#include <machine/rtas.h>
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#include <powerpc/ofw/ofw_pcibus.h>
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#include <powerpc/pseries/plpar_iommu.h>
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#include "pci_if.h"
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#include "iommu_if.h"
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static int plpar_pcibus_probe(device_t);
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static bus_dma_tag_t plpar_pcibus_get_dma_tag(device_t dev, device_t child);
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/*
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* Driver methods.
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*/
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static device_method_t plpar_pcibus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, plpar_pcibus_probe),
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/* IOMMU functions */
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DEVMETHOD(bus_get_dma_tag, plpar_pcibus_get_dma_tag),
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DEVMETHOD(iommu_map, phyp_iommu_map),
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DEVMETHOD(iommu_unmap, phyp_iommu_unmap),
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DEVMETHOD_END
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};
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static devclass_t pci_devclass;
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DEFINE_CLASS_1(pci, plpar_pcibus_driver, plpar_pcibus_methods,
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sizeof(struct pci_softc), ofw_pcibus_driver);
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DRIVER_MODULE(plpar_pcibus, pcib, plpar_pcibus_driver, pci_devclass, 0, 0);
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static int
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plpar_pcibus_probe(device_t dev)
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{
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phandle_t rtas;
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if (ofw_bus_get_node(dev) == -1 || !rtas_exists())
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return (ENXIO);
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rtas = OF_finddevice("/rtas");
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if (!OF_hasprop(rtas, "ibm,hypertas-functions"))
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return (ENXIO);
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device_set_desc(dev, "POWER Hypervisor PCI bus");
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return (BUS_PROBE_SPECIFIC);
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}
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static bus_dma_tag_t
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plpar_pcibus_get_dma_tag(device_t dev, device_t child)
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{
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struct ofw_pcibus_devinfo *dinfo;
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while (device_get_parent(child) != dev)
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child = device_get_parent(child);
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dinfo = device_get_ivars(child);
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if (dinfo->opd_dma_tag != NULL)
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return (dinfo->opd_dma_tag);
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bus_dma_tag_create(bus_get_dma_tag(dev),
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1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
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NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED,
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BUS_SPACE_MAXSIZE, 0, NULL, NULL, &dinfo->opd_dma_tag);
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phyp_iommu_set_dma_tag(dev, child, dinfo->opd_dma_tag);
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return (dinfo->opd_dma_tag);
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}
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@ -73,11 +73,6 @@ static u_int32_t rtaspci_read_config(device_t, u_int, u_int, u_int,
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static void rtaspci_write_config(device_t, u_int, u_int, u_int,
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u_int, u_int32_t, int);
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/*
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* IOMMU LPAR interface
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*/
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static bus_dma_tag_t rtaspci_get_dma_tag(device_t dev, device_t child);
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/*
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* Driver methods.
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*/
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@ -90,19 +85,11 @@ static device_method_t rtaspci_methods[] = {
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DEVMETHOD(pcib_read_config, rtaspci_read_config),
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DEVMETHOD(pcib_write_config, rtaspci_write_config),
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/* IOMMU functions */
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DEVMETHOD(bus_get_dma_tag, rtaspci_get_dma_tag),
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#ifdef __powerpc64__
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DEVMETHOD(iommu_map, phyp_iommu_map),
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DEVMETHOD(iommu_unmap, phyp_iommu_unmap),
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#endif
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DEVMETHOD_END
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};
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struct rtaspci_softc {
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struct ofw_pci_softc pci_sc;
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bus_dma_tag_t dma_tag;
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cell_t read_pci_config, write_pci_config;
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cell_t ex_read_pci_config, ex_write_pci_config;
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@ -149,15 +136,6 @@ rtaspci_attach(device_t dev)
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OF_getprop(ofw_bus_get_node(dev), "ibm,pci-config-space-type",
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&sc->sc_extended_config, sizeof(sc->sc_extended_config));
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bus_dma_tag_create(bus_get_dma_tag(dev),
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1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
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NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED,
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BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->dma_tag);
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#ifdef __powerpc64__
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if (!(mfmsr() & PSL_HV))
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phyp_iommu_set_dma_tag(dev, dev, sc->dma_tag);
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#endif
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return (ofw_pci_attach(dev));
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}
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@ -225,12 +203,3 @@ rtaspci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
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width, val, &pcierror);
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}
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static bus_dma_tag_t
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rtaspci_get_dma_tag(device_t dev, device_t child)
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{
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struct rtaspci_softc *sc;
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sc = device_get_softc(dev);
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return (sc->dma_tag);
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}
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