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This fix allows cards inserted in one of the bottem-most slots on an xp1000

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(behind the built-in ppb on hose 1) to be found:

When testing the adaptec controller on alpha, I realized I misread the xp1000
documentation and the way I'm calculating the bus number for PCI
config space accesses on the tsunami is wrong.  I had thought that a bus
behind a ppb should be numbered as the nth bus in that hose, but it
actually needs to be the nth global bus within the system.  The bus number
for the primary bus on a hose must always remain 0 when calculating config
space addresses.
This commit is contained in:
gallatin 1999-09-30 19:09:22 +00:00
parent 8764dc6a38
commit caea2233d5
1 changed files with 2 additions and 2 deletions
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4
sys/alpha/pci/tsunami.c
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@ -275,7 +275,7 @@ tsunami_check_abort(void)
KV(TSUNAMI_CONF(h) | ((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
#define CFGREAD(h, b, s, f, r, op, width, type) \
int bus = tsunami_bus_within_hose(h, b); \
int bus = tsunami_bus_within_hose(h, b) ? b : 0; \
vm_offset_t va = TSUNAMI_CFGADDR(bus, s, f, r, h); \
type data; \
tsunami_clear_abort(); \
@ -289,7 +289,7 @@ tsunami_check_abort(void)
return data;
#define CFWRITE(h, b, s, f, r, data, op, width) \
int bus = tsunami_bus_within_hose(h, b); \
int bus = tsunami_bus_within_hose(h, b) ? b : 0; \
vm_offset_t va = TSUNAMI_CFGADDR(bus, s, f, r, h); \
tsunami_clear_abort(); \
if (badaddr((caddr_t)va, width)) \