From cce05f8584ad483828c11403451dd1c463a48755 Mon Sep 17 00:00:00 2001 From: rstone Date: Tue, 10 Mar 2015 01:24:08 +0000 Subject: [PATCH] Fix Ivy Bridge+ MEM_UOPS_RETIRED counters The MEM_UOPS_RETIRED actually work the same way as the Sandy Bridge counters, but the counters were documented in a different way and that seemed to cause the Ivy Bridge counters to be implemented incorrectly. Use the same counter definitions as Sandy Bridge. While I'm here, rename the counters to match what's documented in the datasheet. Differential Revision: https://reviews.freebsd.org/D1590 MFC after: 1 month Sponsored by: Sandvine Inc. --- lib/libpmc/pmc.haswell.3 | 42 +++++++++++------------- lib/libpmc/pmc.haswellxeon.3 | 42 +++++++++++------------- lib/libpmc/pmc.ivybridge.3 | 43 +++++++++++-------------- lib/libpmc/pmc.ivybridgexeon.3 | 43 +++++++++++-------------- sys/dev/hwpmc/hwpmc_core.c | 36 ++++++++------------- sys/dev/hwpmc/pmc_events.h | 58 ++++++++++++++-------------------- 6 files changed, 110 insertions(+), 154 deletions(-) diff --git a/lib/libpmc/pmc.haswell.3 b/lib/libpmc/pmc.haswell.3 index ab3dd8e0160c..a85f7609c9df 100644 --- a/lib/libpmc/pmc.haswell.3 +++ b/lib/libpmc/pmc.haswell.3 @@ -808,30 +808,24 @@ Count cases of saving new LBR records by hardware. Randomly sampled loads whose latency is above a user defined threshold. A small fraction of the overall loads are sampled due to randomization. -.It Li MEM_UOP_RETIRED.LOADS -.Pq Event D0H , Umask 01H -Qualify retired memory uops that are loads. Combine Supports PEBS and -with umask 10H, 20H, 40H, 80H. -.It Li MEM_UOP_RETIRED.STORES -.Pq Event D0H , Umask 02H -Qualify retired memory uops that are stores. -Combine with umask 10H, 20H, 40H, 80H. -.It Li MEM_UOP_RETIRED.STLB_MISS -.Pq Event D0H , Umask 10H -Qualify retired memory uops with STLB miss. Must -combine with umask 01H, 02H, to produce counts. -.It Li MEM_UOP_RETIRED.LOCK -.Pq Event D0H , Umask 20H -Qualify retired memory uops with lock. Must combine Supports PEBS and -with umask 01H, 02H, to produce counts. -.It Li MEM_UOP_RETIRED.SPLIT -.Pq Event D0H , Umask 40H -Qualify retired memory uops with line split. Must -combine with umask 01H, 02H, to produce counts. -.It Li MEM_UOP_RETIRED.ALL -.Pq Event D0H , Umask 80H -Qualify any retired memory uops. Must combine with Supports PEBS and -umask 01H, 02H, to produce counts. +.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS +.Pq Event D0H , Umask 11H +Count retired load uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES +.Pq Event D0H , Umask 12H +Count retired store uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.SPLIT_LOADS +.Pq Event D0H , Umask 41H +Count retired load uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.SPLIT_STORES +.Pq Event D0H , Umask 42H +Count retired store uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.ALL_LOADS +.Pq Event D0H , Umask 81H +Count all retired load uops. +.It Li MEM_UOPS_RETIRED.ALL_STORES +.Pq Event D0H , Umask 82H +Count all retired store uops. .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT .Pq Event D1H , Umask 01H Retired load uops with L1 cache hits as data sources. diff --git a/lib/libpmc/pmc.haswellxeon.3 b/lib/libpmc/pmc.haswellxeon.3 index 1a4f052634dd..8eb5b7e8018f 100644 --- a/lib/libpmc/pmc.haswellxeon.3 +++ b/lib/libpmc/pmc.haswellxeon.3 @@ -809,30 +809,24 @@ Count cases of saving new LBR records by hardware. Randomly sampled loads whose latency is above a user defined threshold. A small fraction of the overall loads are sampled due to randomization. -.It Li MEM_UOP_RETIRED.LOADS -.Pq Event D0H , Umask 01H -Qualify retired memory uops that are loads. Combine Supports PEBS and -with umask 10H, 20H, 40H, 80H. -.It Li MEM_UOP_RETIRED.STORES -.Pq Event D0H , Umask 02H -Qualify retired memory uops that are stores. -Combine with umask 10H, 20H, 40H, 80H. -.It Li MEM_UOP_RETIRED.STLB_MISS -.Pq Event D0H , Umask 10H -Qualify retired memory uops with STLB miss. Must -combine with umask 01H, 02H, to produce counts. -.It Li MEM_UOP_RETIRED.LOCK -.Pq Event D0H , Umask 20H -Qualify retired memory uops with lock. Must combine Supports PEBS and -with umask 01H, 02H, to produce counts. -.It Li MEM_UOP_RETIRED.SPLIT -.Pq Event D0H , Umask 40H -Qualify retired memory uops with line split. Must -combine with umask 01H, 02H, to produce counts. -.It Li MEM_UOP_RETIRED.ALL -.Pq Event D0H , Umask 80H -Qualify any retired memory uops. Must combine with Supports PEBS and -umask 01H, 02H, to produce counts. +.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS +.Pq Event D0H , Umask 11H +Count retired load uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES +.Pq Event D0H , Umask 12H +Count retired store uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.SPLIT_LOADS +.Pq Event D0H , Umask 41H +Count retired load uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.SPLIT_STORES +.Pq Event D0H , Umask 42H +Count retired store uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.ALL_LOADS +.Pq Event D0H , Umask 81H +Count all retired load uops. +.It Li MEM_UOPS_RETIRED.ALL_STORES +.Pq Event D0H , Umask 82H +Count all retired store uops. .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT .Pq Event D1H , Umask 01H Retired load uops with L1 cache hits as data sources. diff --git a/lib/libpmc/pmc.ivybridge.3 b/lib/libpmc/pmc.ivybridge.3 index 58effaa4fd49..b693b30ca73b 100644 --- a/lib/libpmc/pmc.ivybridge.3 +++ b/lib/libpmc/pmc.ivybridge.3 @@ -706,31 +706,24 @@ Specify threshold in MSR 0x3F6. .Pq Event CDH , Umask 02H Sample stores and collect precise store operation via PEBS record. PMC3 only. -.It Li MEM_UOP_RETIRED.LOADS -.Pq Event D0H , Umask 01H -Qualify retired memory uops that are loads. Combine with umask 10H, 20H, -40H, 80H. -Supports PEBS. -.It Li MEM_UOP_RETIRED.STORES -.Pq Event D0H , Umask 02H -Qualify retired memory uops that are stores. Combine with umask 10H, 20H, -40H, 80H. -.It Li MEM_UOP_RETIRED.STLB_MISS -.Pq Event D0H , Umask 10H -Qualify retired memory uops with STLB miss. Must combine with umask 01H, -02H, to produce counts. -.It Li MEM_UOP_RETIRED.LOCK -.Pq Event D0H , Umask 20H -Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to -produce counts. -.It Li MEM_UOP_RETIRED.SPLIT -.Pq Event D0H , Umask 40H -Qualify retired memory uops with line split. Must combine with umask 01H, -02H, to produce counts. -.It Li MEM_UOP_RETIRED.ALL -.Pq Event D0H , Umask 80H -Qualify any retired memory uops. Must combine with umask 01H, 02H, to -produce counts. +.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS +.Pq Event D0H , Umask 11H +Count retired load uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES +.Pq Event D0H , Umask 12H +Count retired store uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.SPLIT_LOADS +.Pq Event D0H , Umask 41H +Count retired load uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.SPLIT_STORES +.Pq Event D0H , Umask 42H +Count retired store uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.ALL_LOADS +.Pq Event D0H , Umask 81H +Count all retired load uops. +.It Li MEM_UOPS_RETIRED.ALL_STORES +.Pq Event D0H , Umask 82H +Count all retired store uops. .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT .Pq Event D1H , Umask 01H Retired load uops with L1 cache hits as data sources. diff --git a/lib/libpmc/pmc.ivybridgexeon.3 b/lib/libpmc/pmc.ivybridgexeon.3 index 4fe2a4e4864f..2ee5b782cc42 100644 --- a/lib/libpmc/pmc.ivybridgexeon.3 +++ b/lib/libpmc/pmc.ivybridgexeon.3 @@ -718,31 +718,24 @@ Specify threshold in MSR 0x3F6. .Pq Event CDH , Umask 02H Sample stores and collect precise store operation via PEBS record. PMC3 only. -.It Li MEM_UOP_RETIRED.LOADS -.Pq Event D0H , Umask 01H -Qualify retired memory uops that are loads. Combine with umask 10H, 20H, -40H, 80H. -Supports PEBS. -.It Li MEM_UOP_RETIRED.STORES -.Pq Event D0H , Umask 02H -Qualify retired memory uops that are stores. Combine with umask 10H, 20H, -40H, 80H. -.It Li MEM_UOP_RETIRED.STLB_MISS -.Pq Event D0H , Umask 10H -Qualify retired memory uops with STLB miss. Must combine with umask 01H, -02H, to produce counts. -.It Li MEM_UOP_RETIRED.LOCK -.Pq Event D0H , Umask 20H -Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to -produce counts. -.It Li MEM_UOP_RETIRED.SPLIT -.Pq Event D0H , Umask 40H -Qualify retired memory uops with line split. Must combine with umask 01H, -02H, to produce counts. -.It Li MEM_UOP_RETIRED.ALL -.Pq Event D0H , Umask 80H -Qualify any retired memory uops. Must combine with umask 01H, 02H, to -produce counts. +.It Li MEM_UOPS_RETIRED.STLB_MISS_LOADS +.Pq Event D0H , Umask 11H +Count retired load uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.STLB_MISS_STORES +.Pq Event D0H , Umask 12H +Count retired store uops that missed the STLB. +.It Li MEM_UOPS_RETIRED.SPLIT_LOADS +.Pq Event D0H , Umask 41H +Count retired load uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.SPLIT_STORES +.Pq Event D0H , Umask 42H +Count retired store uops that were split across a cache line. +.It Li MEM_UOPS_RETIRED.ALL_LOADS +.Pq Event D0H , Umask 81H +Count all retired load uops. +.It Li MEM_UOPS_RETIRED.ALL_STORES +.Pq Event D0H , Umask 82H +Count all retired store uops. .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT .Pq Event D1H , Umask 01H Retired load uops with L1 cache hits as data sources. diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index b1e7c60d5fcd..9c24f7ef667b 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -1597,29 +1597,21 @@ static struct iap_event_descr iap_events[] = { /* Sandy Bridge / Sandy Bridge Xeon - 11, 12, 21, 41, 42, 81, 82 */ IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB | - IAP_F_IBX | IAP_F_HW | IAP_F_HWX), - IAPDESCR(D0H_02H, 0xD0, 0x02, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW | - IAP_F_HWX), - IAPDESCR(D0H_10H, 0xD0, 0x10, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW | - IAP_F_HWX), - IAPDESCR(D0H_11H, 0xD0, 0x11, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(D0H_12H, 0xD0, 0x12, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(D0H_20H, 0xD0, 0x20, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW | - IAP_F_HWX), + IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(D0H_11H, 0xD0, 0x11, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | + IAP_F_IBX | IAP_F_HW | IAP_F_HWX), + IAPDESCR(D0H_12H, 0xD0, 0x12, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | + IAP_F_IBX | IAP_F_HW | IAP_F_HWX), IAPDESCR(D0H_21H, 0xD0, 0x21, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(D0H_40H, 0xD0, 0x40, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW | - IAP_F_HWX), - IAPDESCR(D0H_41H, 0xD0, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_SBX | - IAP_F_IB | IAP_F_IBX | IAP_F_HW | IAP_F_HWX), /* Not in spec but in linux and Vtune guide */ - IAPDESCR(D0H_42H, 0xD0, 0x42, IAP_F_FM | IAP_F_SB | IAP_F_SBX | - IAP_F_IB | IAP_F_IBX | IAP_F_HW | IAP_F_HWX), /* Not in spec but in linux and Vtune guide */ - IAPDESCR(D0H_80H, 0xD0, 0x80, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW | - IAP_F_HWX), - IAPDESCR(D0H_81H, 0xD0, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_SBX | - IAP_F_IB | IAP_F_IBX), /* Not in spec but in linux and Vtune guide */ - IAPDESCR(D0H_82H, 0xD0, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_SBX | - IAP_F_IB | IAP_F_IBX), /* Not in spec but in linux and Vtune guide */ + IAPDESCR(D0H_41H, 0xD0, 0x41, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | + IAP_F_IBX | IAP_F_HW | IAP_F_HWX), + IAPDESCR(D0H_42H, 0xD0, 0x42, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | + IAP_F_IBX | IAP_F_HW | IAP_F_HWX), + IAPDESCR(D0H_81H, 0xD0, 0x81, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | + IAP_F_IBX | IAP_F_HW | IAP_F_HWX), + IAPDESCR(D0H_82H, 0xD0, 0x82, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_IB | + IAP_F_IBX | IAP_F_HW | IAP_F_HWX), + IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_HWX), IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h index 996f1bf7a8cc..400a39401fab 100644 --- a/sys/dev/hwpmc/pmc_events.h +++ b/sys/dev/hwpmc/pmc_events.h @@ -2775,14 +2775,12 @@ __PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ @@ -3003,14 +3001,12 @@ __PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ @@ -3229,15 +3225,12 @@ __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ __PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ @@ -3459,15 +3452,12 @@ __PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ __PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ __PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ __PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ __PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \