add support DM9601(DAVICOM USB to Ethernet MAC Controller with Integrated 10/100 PHY)
- Corega FEther USB-TXC PR: kern/62932 Submitted by: HASHI Hiroaki <hashiz@tomba.cskk-sv.co.jp> Obtained from: NetBSD
This commit is contained in:
MIHIRA Sanpei Yoshiro
parent
c9b510efc9
commit
cdd40f3bd6
@ -2193,6 +2193,10 @@ device kue
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# RealTek RTL8150 USB to fast ethernet. Supports the Melco LUA-KTX
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# and the GREEN HOUSE GH-USB100B.
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device rue
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#
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# Davicom DM9601E USB to fast ethernet. Supports the Corega FEther USB-TXC.
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device udav
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# debugging options for the USB subsystem
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#
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@ -814,6 +814,7 @@ dev/usb/hid.c optional usb
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dev/usb/if_aue.c optional aue
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dev/usb/if_axe.c optional axe
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dev/usb/if_cue.c optional cue
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dev/usb/if_udav.c optional udav
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dev/usb/if_kue.c optional kue
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dev/usb/if_rue.c optional rue
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dev/usb/ehci.c optional ehci
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2042
sys/dev/usb/if_udav.c
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2042
sys/dev/usb/if_udav.c
Normal file
File diff suppressed because it is too large
Load Diff
233
sys/dev/usb/if_udavreg.h
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233
sys/dev/usb/if_udavreg.h
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@ -0,0 +1,233 @@
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/* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */
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/* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */
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/* $FreeBSD$ */
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/*
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* Copyright (c) 2003
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* Shingo WATANABE <nabe@nabechan.org>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#define UDAV_IFACE_INDEX 0
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#define UDAV_CONFIG_NO 1
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#define UDAV_TX_LIST_CNT 1
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#define UDAV_RX_LIST_CNT 1
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#define UDAV_TX_TIMEOUT 1000
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#define UDAV_TIMEOUT 10000
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#define ETHER_ALIGN 2
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/* Packet length */
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#define UDAV_MAX_MTU 1536 /* XXX: max frame size is unknown */
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#define UDAV_MIN_FRAME_LEN 60
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#define UDAV_BUFSZ UDAV_MAX_MTU
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/* Request */
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#define UDAV_REQ_REG_READ 0x00 /* Read from register(s) */
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#define UDAV_REQ_REG_WRITE 0x01 /* Write to register(s) */
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#define UDAV_REQ_REG_WRITE1 0x03 /* Write to a register */
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#define UDAV_REQ_MEM_READ 0x02 /* Read from memory */
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#define UDAV_REQ_MEM_WRITE 0x05 /* Write to memory */
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#define UDAV_REQ_MEM_WRITE1 0x07 /* Write a byte to memory */
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/* Registers */
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#define UDAV_NCR 0x00 /* Network Control Register */
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#define UDAV_NCR_EXT_PHY (1<<7) /* Select External PHY */
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#define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */
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#define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */
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#define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */
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#define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */
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#define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */
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#define UDAV_NCR_RST (1<<0) /* Software reset */
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#define UDAV_RCR 0x05 /* RX Control Register */
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#define UDAV_RCR_WTDIS (1<<6) /* Watchdog Timer Disable */
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#define UDAV_RCR_DIS_LONG (1<<5) /* Discard Long Packet(over 1522Byte) */
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#define UDAV_RCR_DIS_CRC (1<<4) /* Discard CRC Error Packet */
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#define UDAV_RCR_ALL (1<<3) /* Pass All Multicast */
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#define UDAV_RCR_RUNT (1<<2) /* Pass Runt Packet */
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#define UDAV_RCR_PRMSC (1<<1) /* Promiscuous Mode */
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#define UDAV_RCR_RXEN (1<<0) /* RX Enable */
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#define UDAV_RSR 0x06 /* RX Status Register */
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#define UDAV_RSR_RF (1<<7) /* Runt Frame */
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#define UDAV_RSR_MF (1<<6) /* Multicast Frame */
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#define UDAV_RSR_LCS (1<<5) /* Late Collision Seen */
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#define UDAV_RSR_RWTO (1<<4) /* Receive Watchdog Time-Out */
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#define UDAV_RSR_PLE (1<<3) /* Physical Layer Error */
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#define UDAV_RSR_AE (1<<2) /* Alignment Error */
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#define UDAV_RSR_CE (1<<1) /* CRC Error */
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#define UDAV_RSR_FOE (1<<0) /* FIFO Overflow Error */
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#define UDAV_RSR_ERR (UDAV_RSR_RF | UDAV_RSR_LCS | UDAV_RSR_RWTO |\
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UDAV_RSR_PLE | UDAV_RSR_AE | UDAV_RSR_CE |\
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UDAV_RSR_FOE)
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#define UDAV_EPCR 0x0b /* EEPROM & PHY Control Register */
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#define UDAV_EPCR_REEP (1<<5) /* Reload EEPROM */
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#define UDAV_EPCR_WEP (1<<4) /* Write EEPROM enable */
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#define UDAV_EPCR_EPOS (1<<3) /* EEPROM or PHY Operation Select */
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#define UDAV_EPCR_ERPRR (1<<2) /* EEPROM/PHY Register Read Command */
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#define UDAV_EPCR_ERPRW (1<<1) /* EEPROM/PHY Register Write Command */
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#define UDAV_EPCR_ERRE (1<<0) /* EEPROM/PHY Access Status */
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#define UDAV_EPAR 0x0c /* EEPROM & PHY Control Register */
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#define UDAV_EPAR_PHY_ADR1 (1<<7) /* PHY Address bit 1 */
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#define UDAV_EPAR_PHY_ADR0 (1<<6) /* PHY Address bit 0 */
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#define UDAV_EPAR_EROA (1<<0) /* EEPROM Word/PHY Register Address */
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#define UDAV_EPAR_EROA_MASK (0x1f) /* [5:0] */
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#define UDAV_EPDRL 0x0d /* EEPROM & PHY Data Register */
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#define UDAV_EPDRH 0x0e /* EEPROM & PHY Data Register */
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#define UDAV_PAR0 0x10 /* Ethernet Address, load from EEPROM */
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#define UDAV_PAR1 0x11 /* Ethernet Address, load from EEPROM */
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#define UDAV_PAR2 0x12 /* Ethernet Address, load from EEPROM */
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#define UDAV_PAR3 0x13 /* Ethernet Address, load from EEPROM */
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#define UDAV_PAR4 0x14 /* Ethernet Address, load from EEPROM */
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#define UDAV_PAR5 0x15 /* Ethernet Address, load from EEPROM */
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#define UDAV_PAR UDAV_PAR0
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#define UDAV_MAR0 0x16 /* Multicast Register */
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#define UDAV_MAR1 0x17 /* Multicast Register */
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#define UDAV_MAR2 0x18 /* Multicast Register */
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#define UDAV_MAR3 0x19 /* Multicast Register */
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#define UDAV_MAR4 0x1a /* Multicast Register */
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#define UDAV_MAR5 0x1b /* Multicast Register */
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#define UDAV_MAR6 0x1c /* Multicast Register */
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#define UDAV_MAR7 0x1d /* Multicast Register */
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#define UDAV_MAR UDAV_MAR0
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#define UDAV_GPCR 0x1e /* General purpose control register */
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#define UDAV_GPCR_GEP_CNTL6 (1<<6) /* General purpose control 6 */
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#define UDAV_GPCR_GEP_CNTL5 (1<<5) /* General purpose control 5 */
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#define UDAV_GPCR_GEP_CNTL4 (1<<4) /* General purpose control 4 */
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#define UDAV_GPCR_GEP_CNTL3 (1<<3) /* General purpose control 3 */
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#define UDAV_GPCR_GEP_CNTL2 (1<<2) /* General purpose control 2 */
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#define UDAV_GPCR_GEP_CNTL1 (1<<1) /* General purpose control 1 */
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#define UDAV_GPCR_GEP_CNTL0 (1<<0) /* General purpose control 0 */
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#define UDAV_GPR 0x1f /* General purpose register */
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#define UDAV_GPR_GEPIO6 (1<<6) /* General purpose 6 */
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#define UDAV_GPR_GEPIO5 (1<<5) /* General purpose 5 */
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#define UDAV_GPR_GEPIO4 (1<<4) /* General purpose 4 */
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#define UDAV_GPR_GEPIO3 (1<<3) /* General purpose 3 */
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#define UDAV_GPR_GEPIO2 (1<<2) /* General purpose 2 */
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#define UDAV_GPR_GEPIO1 (1<<1) /* General purpose 1 */
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#define UDAV_GPR_GEPIO0 (1<<0) /* General purpose 0 */
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#if defined(__FreeBSD__) || defined(__OpenBSD__)
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#define GET_IFP(sc) (&(sc)->sc_ac.ac_if)
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#elif defined(__NetBSD__)
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#define GET_IFP(sc) (&(sc)->sc_ec.ec_if)
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#endif
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#if defined(__FreeBSD__)
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#define GET_MII(sc) (device_get_softc((sc)->sc_miibus))
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#else
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#define GET_MII(sc) (&(sc)->sc_mii)
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#endif
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#if defined(__FreeBSD__)
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#if 0
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#define UDAV_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define UDAV_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#else
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#define UDAV_LOCK(_sc)
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#define UDAV_UNLOCK(_sc)
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#endif
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#endif
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struct udav_chain {
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struct udav_softc *udav_sc;
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usbd_xfer_handle udav_xfer;
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char *udav_buf;
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struct mbuf *udav_mbuf;
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int udav_idx;
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};
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struct udav_cdata {
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struct udav_chain udav_tx_chain[UDAV_TX_LIST_CNT];
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struct udav_chain udav_rx_chain[UDAV_TX_LIST_CNT];
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#if 0
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/* XXX: Intrrupt Endpoint is not yet supported! */
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struct udav_intrpkg udav_ibuf;
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#endif
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int udav_tx_prod;
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int udav_tx_cons;
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int udav_tx_cnt;
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int udav_rx_prod;
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};
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struct udav_softc {
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#if defined(__FreeBSD__)
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struct arpcom sc_ac ; /* struct ifnet must be top of softc */
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#endif
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USBBASEDEVICE sc_dev; /* base device */
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usbd_device_handle sc_udev;
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/* USB */
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usbd_interface_handle sc_ctl_iface;
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/* int sc_ctl_iface_no; */
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int sc_bulkin_no; /* bulk in endpoint */
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int sc_bulkout_no; /* bulk out endpoint */
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int sc_intrin_no; /* intr in endpoint */
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usbd_pipe_handle sc_pipe_rx;
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usbd_pipe_handle sc_pipe_tx;
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usbd_pipe_handle sc_pipe_intr;
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usb_callout_t sc_stat_ch;
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u_int sc_rx_errs;
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/* u_int sc_intr_errs; */
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struct timeval sc_rx_notice;
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/* Ethernet */
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#if defined(__FreeBSD__)
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device_t sc_miibus ;
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struct mtx sc_mtx ;
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#elif defined(__NetBSD__)
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struct ethercom sc_ec; /* ethernet common */
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struct mii_data sc_mii;
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#endif
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struct lock sc_mii_lock;
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int sc_link;
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#define sc_media udav_mii.mii_media
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#if NRND > 0
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rndsource_element_t rnd_source;
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#endif
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struct udav_cdata sc_cdata;
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int sc_attached;
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int sc_dying;
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int sc_refcnt;
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struct usb_task sc_tick_task;
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struct usb_task sc_stop_task;
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u_int16_t sc_flags;
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};
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@ -559,6 +559,7 @@ product CONNECTIX QUICKCAM 0x0001 QuickCam
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product COREGA ETHER_USB_T 0x0001 Ether USB-T
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product COREGA FETHER_USB_TX 0x0004 FEther USB-TX
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product COREGA FETHER_USB_TXS 0x000d FEther USB-TXS
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product COREGA FETHER_USB_TXC 0x9601 FEther USB-TXC
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/* Creative products */
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product CREATIVE NOMAD_II 0x1002 Nomad II MP3 player
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@ -206,6 +206,7 @@ SUBDIR= ${_3dfx} \
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ubsa \
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ubsec \
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ucom \
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udav \
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udbp \
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udf \
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udf_iconv \
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9
sys/modules/udav/Makefile
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9
sys/modules/udav/Makefile
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@ -0,0 +1,9 @@
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# $FreeBSD$
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S= ${.CURDIR}/../..
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.PATH: $S/dev/usb
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KMOD= if_udav
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SRCS= if_udav.c opt_bdg.h opt_usb.h device_if.h bus_if.h opt_inet.h
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SRCS+= miibus_if.h
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.include <bsd.kmod.mk>
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