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Ensure the bss is aligned to a 4-byte address as we use 4-byte aligned

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stores to clear it.

While here reduce the alignment of the data from 4k to 16 byte aligned.
This should be more than enough, without wasting too much space.

Sponsored by:	ABT Systems Ltd
This commit is contained in:
andrew 2016-02-09 00:01:43 +00:00
parent f6d0271729
commit cf9bbb5d8a
1 changed files with 3 additions and 1 deletions
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4
sys/boot/efi/loader/arch/arm/ldscript.arm
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@ -15,7 +15,7 @@ SECTIONS
} =0
_etext = .;
PROVIDE (etext = .);
. = ALIGN(4096);
. = ALIGN(16);
.data :
{
*(.data *.data.*)
@ -24,6 +24,7 @@ SECTIONS
*(.rodata.*)
CONSTRUCTORS
. = ALIGN(4);
PROVIDE (__bss_start = .);
*(.sbss)
*(.scommon)
@ -31,6 +32,7 @@ SECTIONS
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
}
/* We want the small data sections together, so single-instruction offsets