diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S
index 1b9933bb4374..8490b1b14ca5 100644
--- a/sys/amd64/amd64/apic_vector.S
+++ b/sys/amd64/amd64/apic_vector.S
@@ -275,7 +275,7 @@ Xinvltlb:
 	movl	PCPU(CPUID), %eax
 	popl	%fs
 	ss
-	incl	_xhits(,%eax,4)
+	incl	xhits(,%eax,4)
 #endif /* COUNT_XINVLTLB_HITS */
 
 	movl	%cr3, %eax		/* invalidate the TLB */
@@ -570,12 +570,6 @@ Xrendezvous:
 	
 	.data
 
-#ifdef COUNT_XINVLTLB_HITS
-	.globl	_xhits
-_xhits:
-	.space	(MAXCPU * 4), 0
-#endif /* COUNT_XINVLTLB_HITS */
-
 	.globl	apic_pin_trigger
 apic_pin_trigger:
 	.long	0
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c
index cedf0d6600cd..63fec0e9e9c9 100644
--- a/sys/amd64/amd64/mp_machdep.c
+++ b/sys/amd64/amd64/mp_machdep.c
@@ -2190,6 +2190,12 @@ start_ap(int logical_cpu, u_int boot_addr)
 	return 0;		/* return FAILURE */
 }
 
+#if defined(APIC_IO) && defined(COUNT_XINVLTLB_HITS)
+u_int xhits[MAXCPU];
+SYSCTL_OPAQUE(_debug, OID_AUTO, xhits, CTLFLAG_RW, &xhits, sizeof(xhits),
+    "IU", "");
+#endif
+
 /*
  * Flush the TLB on all other CPU's
  *
diff --git a/sys/amd64/amd64/mptable.c b/sys/amd64/amd64/mptable.c
index cedf0d6600cd..63fec0e9e9c9 100644
--- a/sys/amd64/amd64/mptable.c
+++ b/sys/amd64/amd64/mptable.c
@@ -2190,6 +2190,12 @@ start_ap(int logical_cpu, u_int boot_addr)
 	return 0;		/* return FAILURE */
 }
 
+#if defined(APIC_IO) && defined(COUNT_XINVLTLB_HITS)
+u_int xhits[MAXCPU];
+SYSCTL_OPAQUE(_debug, OID_AUTO, xhits, CTLFLAG_RW, &xhits, sizeof(xhits),
+    "IU", "");
+#endif
+
 /*
  * Flush the TLB on all other CPU's
  *
diff --git a/sys/amd64/include/mptable.h b/sys/amd64/include/mptable.h
index cedf0d6600cd..63fec0e9e9c9 100644
--- a/sys/amd64/include/mptable.h
+++ b/sys/amd64/include/mptable.h
@@ -2190,6 +2190,12 @@ start_ap(int logical_cpu, u_int boot_addr)
 	return 0;		/* return FAILURE */
 }
 
+#if defined(APIC_IO) && defined(COUNT_XINVLTLB_HITS)
+u_int xhits[MAXCPU];
+SYSCTL_OPAQUE(_debug, OID_AUTO, xhits, CTLFLAG_RW, &xhits, sizeof(xhits),
+    "IU", "");
+#endif
+
 /*
  * Flush the TLB on all other CPU's
  *
diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s
index 1b9933bb4374..8490b1b14ca5 100644
--- a/sys/i386/i386/apic_vector.s
+++ b/sys/i386/i386/apic_vector.s
@@ -275,7 +275,7 @@ Xinvltlb:
 	movl	PCPU(CPUID), %eax
 	popl	%fs
 	ss
-	incl	_xhits(,%eax,4)
+	incl	xhits(,%eax,4)
 #endif /* COUNT_XINVLTLB_HITS */
 
 	movl	%cr3, %eax		/* invalidate the TLB */
@@ -570,12 +570,6 @@ Xrendezvous:
 	
 	.data
 
-#ifdef COUNT_XINVLTLB_HITS
-	.globl	_xhits
-_xhits:
-	.space	(MAXCPU * 4), 0
-#endif /* COUNT_XINVLTLB_HITS */
-
 	.globl	apic_pin_trigger
 apic_pin_trigger:
 	.long	0
diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c
index cedf0d6600cd..63fec0e9e9c9 100644
--- a/sys/i386/i386/mp_machdep.c
+++ b/sys/i386/i386/mp_machdep.c
@@ -2190,6 +2190,12 @@ start_ap(int logical_cpu, u_int boot_addr)
 	return 0;		/* return FAILURE */
 }
 
+#if defined(APIC_IO) && defined(COUNT_XINVLTLB_HITS)
+u_int xhits[MAXCPU];
+SYSCTL_OPAQUE(_debug, OID_AUTO, xhits, CTLFLAG_RW, &xhits, sizeof(xhits),
+    "IU", "");
+#endif
+
 /*
  * Flush the TLB on all other CPU's
  *
diff --git a/sys/i386/i386/mptable.c b/sys/i386/i386/mptable.c
index cedf0d6600cd..63fec0e9e9c9 100644
--- a/sys/i386/i386/mptable.c
+++ b/sys/i386/i386/mptable.c
@@ -2190,6 +2190,12 @@ start_ap(int logical_cpu, u_int boot_addr)
 	return 0;		/* return FAILURE */
 }
 
+#if defined(APIC_IO) && defined(COUNT_XINVLTLB_HITS)
+u_int xhits[MAXCPU];
+SYSCTL_OPAQUE(_debug, OID_AUTO, xhits, CTLFLAG_RW, &xhits, sizeof(xhits),
+    "IU", "");
+#endif
+
 /*
  * Flush the TLB on all other CPU's
  *
diff --git a/sys/i386/include/mptable.h b/sys/i386/include/mptable.h
index cedf0d6600cd..63fec0e9e9c9 100644
--- a/sys/i386/include/mptable.h
+++ b/sys/i386/include/mptable.h
@@ -2190,6 +2190,12 @@ start_ap(int logical_cpu, u_int boot_addr)
 	return 0;		/* return FAILURE */
 }
 
+#if defined(APIC_IO) && defined(COUNT_XINVLTLB_HITS)
+u_int xhits[MAXCPU];
+SYSCTL_OPAQUE(_debug, OID_AUTO, xhits, CTLFLAG_RW, &xhits, sizeof(xhits),
+    "IU", "");
+#endif
+
 /*
  * Flush the TLB on all other CPU's
  *
diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s
index 1b9933bb4374..8490b1b14ca5 100644
--- a/sys/i386/isa/apic_vector.s
+++ b/sys/i386/isa/apic_vector.s
@@ -275,7 +275,7 @@ Xinvltlb:
 	movl	PCPU(CPUID), %eax
 	popl	%fs
 	ss
-	incl	_xhits(,%eax,4)
+	incl	xhits(,%eax,4)
 #endif /* COUNT_XINVLTLB_HITS */
 
 	movl	%cr3, %eax		/* invalidate the TLB */
@@ -570,12 +570,6 @@ Xrendezvous:
 	
 	.data
 
-#ifdef COUNT_XINVLTLB_HITS
-	.globl	_xhits
-_xhits:
-	.space	(MAXCPU * 4), 0
-#endif /* COUNT_XINVLTLB_HITS */
-
 	.globl	apic_pin_trigger
 apic_pin_trigger:
 	.long	0