From d08a8bf72b1ca12bc84007b1b5c5f9dd2c18e5fe Mon Sep 17 00:00:00 2001 From: imp Date: Wed, 20 Dec 2006 18:18:24 +0000 Subject: [PATCH] MFp4: bwct memory size and PLL parameters --- sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h b/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h index c6810f02f7a7..13edbecd7bc7 100644 --- a/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h +++ b/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.h @@ -39,6 +39,14 @@ typedef unsigned short sdram_size_t; #define OSC_MAIN_MULT 90 #endif +#ifdef BOOT_BWCT +/* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */ +#define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */ +#define SDRAM_WIDTH AT91C_SDRC_DBW_32_BITS +typedef unsigned int sdram_size_t; +#define OSC_MAIN_MULT 45 +#endif + #ifdef BOOT_TSC /* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */ #define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */