Merge lld release_80 branch r351543, and resolve conflicts.
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@ -264,15 +264,6 @@ void X86_64<ELFT>::relaxTlsIeToLe(uint8_t *Loc, RelType Type,
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template <class ELFT>
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void X86_64<ELFT>::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
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uint64_t Val) const {
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// Convert
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// leaq bar@tlsld(%rip), %rdi
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// callq __tls_get_addr@PLT
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// leaq bar@dtpoff(%rax), %rcx
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// to
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// .word 0x6666
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// .byte 0x66
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// mov %fs:0,%rax
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// leaq bar@tpoff(%rax), %rcx
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if (Type == R_X86_64_DTPOFF64) {
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write64le(Loc, Val);
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return;
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@ -287,7 +278,37 @@ void X86_64<ELFT>::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
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0x66, // .byte 0x66
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0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0,%rax
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};
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memcpy(Loc - 3, Inst, sizeof(Inst));
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if (Loc[4] == 0xe8) {
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// Convert
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// leaq bar@tlsld(%rip), %rdi # 48 8d 3d <Loc>
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// callq __tls_get_addr@PLT # e8 <disp32>
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// leaq bar@dtpoff(%rax), %rcx
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// to
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// .word 0x6666
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// .byte 0x66
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// mov %fs:0,%rax
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// leaq bar@tpoff(%rax), %rcx
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memcpy(Loc - 3, Inst, sizeof(Inst));
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return;
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}
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if (Loc[4] == 0xff && Loc[5] == 0x15) {
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// Convert
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// leaq x@tlsld(%rip),%rdi # 48 8d 3d <Loc>
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// call *__tls_get_addr@GOTPCREL(%rip) # ff 15 <disp32>
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// to
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// .long 0x66666666
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// movq %fs:0,%rax
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// See "Table 11.9: LD -> LE Code Transition (LP64)" in
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// https://raw.githubusercontent.com/wiki/hjl-tools/x86-psABI/x86-64-psABI-1.0.pdf
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Loc[-3] = 0x66;
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memcpy(Loc - 2, Inst, sizeof(Inst));
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return;
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}
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error(getErrorLocation(Loc - 3) +
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"expected R_X86_64_PLT32 or R_X86_64_GOTPCRELX after R_X86_64_TLSLD");
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}
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template <class ELFT>
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@ -159,6 +159,7 @@ struct Configuration {
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bool OFormatBinary;
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bool Omagic;
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bool OptRemarksWithHotness;
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bool PicThunk;
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bool Pie;
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bool PrintGcSections;
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bool PrintIcfSections;
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@ -1008,6 +1008,7 @@ static void setConfigs(opt::InputArgList &Args) {
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Config->Endianness = Config->IsLE ? endianness::little : endianness::big;
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Config->IsMips64EL = (K == ELF64LEKind && M == EM_MIPS);
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Config->Pic = Config->Pie || Config->Shared;
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Config->PicThunk = Args.hasArg(OPT_pic_veneer, Config->Pic);
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Config->Wordsize = Config->Is64 ? 8 : 4;
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// ELF defines two different ways to store relocation addends as shown below:
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@ -255,6 +255,9 @@ defm use_android_relr_tags: B<"use-android-relr-tags",
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"Use SHT_ANDROID_RELR / DT_ANDROID_RELR* tags instead of SHT_RELR / DT_RELR*",
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"Use SHT_RELR / DT_RELR* tags (default)">;
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def pic_veneer: F<"pic-veneer">,
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HelpText<"Always generate position independent thunks (veneers)">;
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defm pie: B<"pie",
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"Create a position independent executable",
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"Do not create a position independent executable (default)">;
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@ -356,7 +356,7 @@ static bool needsGot(RelExpr Expr) {
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static bool isRelExpr(RelExpr Expr) {
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return isRelExprOneOf<R_PC, R_GOTREL, R_GOTREL_FROM_END, R_MIPS_GOTREL,
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R_PPC_CALL, R_PPC_CALL_PLT, R_AARCH64_PAGE_PC,
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R_RELAX_GOT_PC>(Expr);
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R_AARCH64_PLT_PAGE_PC, R_RELAX_GOT_PC>(Expr);
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}
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// Returns true if a given relocation can be computed at link-time.
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@ -722,7 +722,7 @@ Thunk::~Thunk() = default;
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static Thunk *addThunkAArch64(RelType Type, Symbol &S) {
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if (Type != R_AARCH64_CALL26 && Type != R_AARCH64_JUMP26)
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fatal("unrecognized relocation type");
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if (Config->Pic)
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if (Config->PicThunk)
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return make<AArch64ADRPThunk>(S);
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return make<AArch64ABSLongThunk>(S);
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}
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@ -739,7 +739,7 @@ static Thunk *addThunkPreArmv7(RelType Reloc, Symbol &S) {
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case R_ARM_JUMP24:
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case R_ARM_CALL:
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case R_ARM_THM_CALL:
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if (Config->Pic)
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if (Config->PicThunk)
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return make<ARMV5PILongThunk>(S);
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return make<ARMV5ABSLongThunk>(S);
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}
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@ -794,13 +794,13 @@ static Thunk *addThunkArm(RelType Reloc, Symbol &S) {
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case R_ARM_PLT32:
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case R_ARM_JUMP24:
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case R_ARM_CALL:
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if (Config->Pic)
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if (Config->PicThunk)
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return make<ARMV7PILongThunk>(S);
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return make<ARMV7ABSLongThunk>(S);
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case R_ARM_THM_JUMP19:
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case R_ARM_THM_JUMP24:
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case R_ARM_THM_CALL:
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if (Config->Pic)
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if (Config->PicThunk)
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return make<ThumbV7PILongThunk>(S);
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return make<ThumbV7ABSLongThunk>(S);
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}
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@ -820,7 +820,7 @@ static Thunk *addThunkPPC64(RelType Type, Symbol &S) {
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if (S.isInPlt())
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return make<PPC64PltCallStub>(S);
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if (Config->Pic)
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if (Config->PicThunk)
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return make<PPC64PILongBranchThunk>(S);
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return make<PPC64PDLongBranchThunk>(S);
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@ -322,6 +322,8 @@ Write optimization remarks in YAML format to
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.Ar file .
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.It Fl -opt-remarks-with-hotness
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Include hotness information in the optimization remarks file.
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.It Fl -pic-veneer
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Always generate position independent thunks.
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.It Fl -pie
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Create a position independent executable.
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.It Fl -print-gc-sections
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