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ARM pmap fixes.

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a)  nocache-remap problem

   When a page is remapped into a non-cacheable virtual memory region there
   was no associated write-back invalidate operation performed. We remove
   writeback of the original buffer size from bus_dmamem_alloc() and add
   appropriate L1/L2 flush operation.

b) missing write-back invalidate operation

   In pmap_kremove a page is removed so we must do a write-back
   invalidate operation aligned to the page virtual address.

Submitted by:	Michal Hajduk
Reviewed by:	Mark Tinguely, rpaulo, stas
Approved by:	re (kib)
Obtained from:	Semihalf
This commit is contained in:
raj 2009-07-20 07:53:07 +00:00
parent fb3be5ae64
commit d1ac98198b
3 changed files with 7 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
sys/arm/arm/busdma_machdep.c
View File

@ -630,10 +630,6 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
((vm_offset_t)*vaddr & PAGE_MASK));
newmap->origbuffer = *vaddr;
newmap->allocbuffer = tmpaddr;
cpu_idcache_wbinv_range((vm_offset_t)*vaddr,
dmat->maxsize);
cpu_l2cache_wbinv_range((vm_offset_t)*vaddr,
dmat->maxsize);
*vaddr = tmpaddr;
} else
newmap->origbuffer = newmap->allocbuffer = NULL;

1
sys/arm/arm/pmap.c
View File

@ -2984,6 +2984,7 @@ pmap_kremove(vm_offset_t va)
pmap_free_pv_entry(pve);
PMAP_UNLOCK(pmap_kernel());
vm_page_unlock_queues();
va = va & ~PAGE_MASK;
cpu_dcache_wbinv_range(va, PAGE_SIZE);
cpu_l2cache_wbinv_range(va, PAGE_SIZE);
cpu_tlb_flushD_SE(va);

7
sys/arm/arm/vm_machdep.c
View File

@ -426,10 +426,15 @@ arm_remap_nocache(void *addr, vm_size_t size)
vm_offset_t tomap = arm_nocache_startaddr + i * PAGE_SIZE;
void *ret = (void *)tomap;
vm_paddr_t physaddr = vtophys((vm_offset_t)addr);
vm_offset_t vaddr = (vm_offset_t) addr;
vaddr = vaddr & ~PAGE_MASK;
for (; tomap < (vm_offset_t)ret + size; tomap += PAGE_SIZE,
physaddr += PAGE_SIZE, i++) {
vaddr += PAGE_SIZE, physaddr += PAGE_SIZE, i++) {
cpu_idcache_wbinv_range(vaddr, PAGE_SIZE);
cpu_l2cache_wbinv_range(vaddr, PAGE_SIZE);
pmap_kenter_nocache(tomap, physaddr);
cpu_tlb_flushID_SE(vaddr);
arm_nocache_allocated[i / BITS_PER_INT] |= 1 << (i %
BITS_PER_INT);
}