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Correct the comments in am7990_intr() and am79900_intr(); it's not

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possible to end up in the interrupt handler again while processing the
previous RX interrupt in ifp->if_input() because the MD interrupt code
disables the delivery of the respective interrupt until all associated
handlers were called (in the INTR_FILTER case the MI code supposedly
does the same). Toggling the NIC interrupt enable bit in these handlers
still is necessary though as some chips (f.e. the VMware emulated one)
require this to be done in order to keep issuing interrupts.

MFC after:	1 month
This commit is contained in:
Marius Strobl 2007-12-30 00:23:38 +00:00
parent 9336e0699b
commit d2d9ab366b
2 changed files with 6 additions and 8 deletions
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7
sys/dev/le/am7990.c
View File

@ -421,10 +421,9 @@ am7990_intr(void *arg)
* Clear interrupt source flags and turn off interrupts. If we
* don't clear these flags before processing their sources we
* could completely miss some interrupt events as the NIC can
* change these flags while we're in this handler. We turn off
* interrupts so we don't get another RX interrupt while still
* processing the previous one in ifp->if_input() with the
* driver lock dropped.
* change these flags while we're in this handler. We toggle
* the interrupt enable bit in order to keep receiving them
* (some chips work without this, some don't).
*/
(*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~(LE_C0_INEA | LE_C0_TDMD |
LE_C0_STOP | LE_C0_STRT | LE_C0_INIT));

7
sys/dev/le/am79900.c
View File

@ -459,10 +459,9 @@ am79900_intr(void *arg)
* Clear interrupt source flags and turn off interrupts. If we
* don't clear these flags before processing their sources we
* could completely miss some interrupt events as the NIC can
* change these flags while we're in this handler. We turn off
* interrupts so we don't get another RX interrupt while still
* processing the previous one in ifp->if_input() with the
* driver lock dropped.
* change these flags while we're in this handler. We toggle
* the interrupt enable bit in order to keep receiving them
* (some chips work without this, some don't).
*/
(*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~(LE_C0_INEA | LE_C0_TDMD |
LE_C0_STOP | LE_C0_STRT | LE_C0_INIT));