Split TEST_CPUSTOP code into CPUSTOP_ON_DDBBREAK and mainline code.
This commit is contained in:
Steve Passe
parent
506a9d513c
commit
d2ecb616f2
@ -1,10 +1,11 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.7 1997/07/15 02:49:21 fsmp Exp $
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* $Id: apic_vector.s,v 1.12 1997/07/18 19:47:13 smp Exp smp $
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*/
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#include <machine/smptests.h> /** TEST_CPUSTOP */
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#include <machine/smptests.h> /** various counters */
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#include "i386/isa/intr_machdep.h"
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/* convert an absolute IRQ# into a bitmask */
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#define IRQ_BIT(irq_num) (1 << (irq_num))
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@ -212,10 +213,6 @@ _Xinvltlb:
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iret
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#ifdef TEST_CPUSTOP
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#include "i386/isa/intr_machdep.h"
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -263,8 +260,6 @@ _Xcpustop:
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popl %eax
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iret
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#endif /* TEST_CPUSTOP */
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MCOUNT_LABEL(bintr)
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FAST_INTR(0,fastintr0)
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@ -359,33 +354,22 @@ _sihits:
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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_xhits:
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.long 0
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.long 0
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.long 0
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.long 0
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.space (NCPU * 4), 0
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#endif /* COUNT_XINVLTLB_HITS */
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#ifdef TEST_CPUSTOP
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.globl _stopped_cpus
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/* variables used by stop_cpus()/restart_cpus()/Xcpustop */
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.globl _stopped_cpus, _started_cpus
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_stopped_cpus:
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.long 0
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.globl _started_cpus
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_started_cpus:
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.long 0
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#ifdef COUNT_CSHITS
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.globl _cshits
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_cshits:
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.long 0
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.long 0
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.long 0
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.long 0
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.space (NCPU * 4), 0
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#endif /* COUNT_CSHITS */
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#endif /* TEST_CPUSTOP */
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/*
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* Interrupt counters and names. The format of these and the label names
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@ -23,7 +23,7 @@
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*
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* $Id: db_interface.c,v 1.9 1997/07/13 00:48:28 smp Exp smp $
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* $Id: db_interface.c,v 1.10 1997/07/18 19:45:41 smp Exp smp $
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*/
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/*
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@ -40,7 +40,7 @@
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#include <machine/segments.h>
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#ifdef SMP
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#include <machine/smp.h>
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#include <machine/smptests.h> /** TEST_CPUSTOP */
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#include <machine/smptests.h> /** CPUSTOP_ON_DDBBREAK */
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#endif
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#include <vm/vm.h>
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@ -138,10 +138,22 @@ kdb_trap(type, code, regs)
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cnpollc(TRUE);
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#if defined(SMP) && defined(TEST_CPUSTOP)
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/* XXX FIXME: we stop all CPUs except ourselves (obviously) */
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#ifdef SMP
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#ifdef CPUSTOP_ON_DDBBREAK
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#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
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db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, other_cpus);
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#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
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/* We stop all CPUs except ourselves (obviously) */
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stop_cpus(other_cpus);
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#endif /** SMP && TEST_CPUSTOP */
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#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
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db_printf(" stopped\n");
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#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
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#endif /* CPUSTOP_ON_DDBBREAK */
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#endif /* SMP */
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(void) setjmp(db_global_jmpbuf);
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db_global_jmpbuf_valid = TRUE;
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@ -151,15 +163,27 @@ kdb_trap(type, code, regs)
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gdb_handle_exception(&ddb_regs, type, code);
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db_global_jmpbuf_valid = FALSE;
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#if defined(SMP) && defined(TEST_CPUSTOP)
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/* XXX FIXME: restart all the CPUs we previously stopped */
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#ifdef SMP
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#ifdef CPUSTOP_ON_DDBBREAK
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#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
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db_printf("\nCPU%d restarting CPUs: 0x%08x\n", cpuid, stopped_cpus);
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#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
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/* Restart all the CPUs we previously stopped */
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if (stopped_cpus != other_cpus) {
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db_printf("whoa, other_cpus: 0x%08x, stopped_cpus: 0x%08x\n",
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other_cpus, stopped_cpus);
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cngetc();
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other_cpus, stopped_cpus);
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panic("stop_cpus() failed");
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}
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restart_cpus(stopped_cpus);
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#endif /** SMP && TEST_CPUSTOP */
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#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
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db_printf(" restarted\n");
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#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
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#endif /* CPUSTOP_ON_DDBBREAK */
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#endif /* SMP */
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cnpollc(FALSE);
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@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
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* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
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*/
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#include "opt_smp.h"
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@ -45,7 +45,7 @@
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#include <machine/mpapic.h>
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#include <machine/cpufunc.h>
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#include <machine/segments.h>
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#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
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#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
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#include <machine/tss.h>
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#include <machine/specialreg.h>
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@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
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setidt(XINVLTLB_OFFSET, Xinvltlb,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#if defined(TEST_CPUSTOP)
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/* install an inter-CPU IPI for CPU stop/restart */
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setidt(XCPUSTOP_OFFSET, Xcpustop,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#endif /** TEST_CPUSTOP */
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#if defined(TEST_TEST1)
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/* install a 'Spurious INTerrupt' vector */
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/* install a "fake hardware INTerrupt" vector */
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setidt(XTEST1_OFFSET, Xtest1,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#endif /** TEST_TEST1 */
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@ -1741,12 +1739,6 @@ invltlb(void)
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}
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#if defined(TEST_CPUSTOP)
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#if defined(DEBUG_CPUSTOP)
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void db_printf __P((const char *fmt, ...));
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#endif /* DEBUG_CPUSTOP */
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/*
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* When called the executing CPU will send an IPI to all other CPUs
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* requesting that they halt execution.
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@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
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return 0;
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/* send IPI to all CPUs in map */
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#if defined(DEBUG_CPUSTOP)
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db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
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#endif /* DEBUG_CPUSTOP */
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stopped_cpus = 0;
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/* send the Xcpustop IPI to all CPUs in map */
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selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
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#if defined(DEBUG_CPUSTOP)
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db_printf(" spin\n");
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#endif /* DEBUG_CPUSTOP */
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while (stopped_cpus != map)
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/* spin */ ;
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#if defined(DEBUG_CPUSTOP)
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db_printf(" spun\nstopped\n");
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#endif /* DEBUG_CPUSTOP */
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return 1;
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}
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@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
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if (!smp_active)
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return 0;
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#if defined(DEBUG_CPUSTOP)
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db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
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cpuid, map, stopped_cpus);
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#endif /* DEBUG_CPUSTOP */
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started_cpus = map; /* signal other cpus to restart */
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while (started_cpus) /* wait for each to clear its bit */
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/* spin */ ;
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#if defined(DEBUG_CPUSTOP)
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db_printf(" restarted\n");
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#endif /* DEBUG_CPUSTOP */
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return 1;
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}
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#endif /** TEST_CPUSTOP */
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@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
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* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
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*/
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#include "opt_smp.h"
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@ -45,7 +45,7 @@
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#include <machine/mpapic.h>
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#include <machine/cpufunc.h>
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#include <machine/segments.h>
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#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
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#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
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#include <machine/tss.h>
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#include <machine/specialreg.h>
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@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
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setidt(XINVLTLB_OFFSET, Xinvltlb,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#if defined(TEST_CPUSTOP)
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/* install an inter-CPU IPI for CPU stop/restart */
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setidt(XCPUSTOP_OFFSET, Xcpustop,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#endif /** TEST_CPUSTOP */
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#if defined(TEST_TEST1)
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/* install a 'Spurious INTerrupt' vector */
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/* install a "fake hardware INTerrupt" vector */
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setidt(XTEST1_OFFSET, Xtest1,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#endif /** TEST_TEST1 */
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@ -1741,12 +1739,6 @@ invltlb(void)
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}
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#if defined(TEST_CPUSTOP)
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#if defined(DEBUG_CPUSTOP)
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void db_printf __P((const char *fmt, ...));
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#endif /* DEBUG_CPUSTOP */
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/*
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* When called the executing CPU will send an IPI to all other CPUs
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* requesting that they halt execution.
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@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
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return 0;
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/* send IPI to all CPUs in map */
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#if defined(DEBUG_CPUSTOP)
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db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
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#endif /* DEBUG_CPUSTOP */
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stopped_cpus = 0;
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/* send the Xcpustop IPI to all CPUs in map */
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selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
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#if defined(DEBUG_CPUSTOP)
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db_printf(" spin\n");
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#endif /* DEBUG_CPUSTOP */
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while (stopped_cpus != map)
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/* spin */ ;
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#if defined(DEBUG_CPUSTOP)
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db_printf(" spun\nstopped\n");
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#endif /* DEBUG_CPUSTOP */
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return 1;
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}
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@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
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if (!smp_active)
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return 0;
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#if defined(DEBUG_CPUSTOP)
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db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
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cpuid, map, stopped_cpus);
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#endif /* DEBUG_CPUSTOP */
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started_cpus = map; /* signal other cpus to restart */
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while (started_cpus) /* wait for each to clear its bit */
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/* spin */ ;
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#if defined(DEBUG_CPUSTOP)
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db_printf(" restarted\n");
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#endif /* DEBUG_CPUSTOP */
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return 1;
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}
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#endif /** TEST_CPUSTOP */
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@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: apic.h,v 1.7 1997/07/15 02:47:52 fsmp Exp $
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* $Id: apic.h,v 1.5 1997/07/18 19:47:48 smp Exp smp $
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*/
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#ifndef _MACHINE_APIC_H_
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@ -220,7 +220,10 @@ typedef struct IOAPIC ioapic_t;
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* various code 'logical' values
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*/
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#ifdef TEST_LOPRIO
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#define LOPRIO_LEVEL 0x00000010 /* TPR of CPUs accepting INT */
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#define ALLHWI_LEVEL 0x00000000 /* TPR of CPU grabbing INTs */
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#endif /** TEST_LOPRIO */
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/* XXX these 2 don't really belong here... */
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#define COUNT_FIELD 0x00ffffff /* count portion of the lock */
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@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
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* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
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*/
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#include "opt_smp.h"
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@ -45,7 +45,7 @@
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#include <machine/mpapic.h>
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#include <machine/cpufunc.h>
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#include <machine/segments.h>
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#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
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#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
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#include <machine/tss.h>
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#include <machine/specialreg.h>
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@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
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setidt(XINVLTLB_OFFSET, Xinvltlb,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#if defined(TEST_CPUSTOP)
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/* install an inter-CPU IPI for CPU stop/restart */
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setidt(XCPUSTOP_OFFSET, Xcpustop,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#endif /** TEST_CPUSTOP */
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#if defined(TEST_TEST1)
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/* install a 'Spurious INTerrupt' vector */
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/* install a "fake hardware INTerrupt" vector */
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setidt(XTEST1_OFFSET, Xtest1,
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SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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#endif /** TEST_TEST1 */
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@ -1741,12 +1739,6 @@ invltlb(void)
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}
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#if defined(TEST_CPUSTOP)
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#if defined(DEBUG_CPUSTOP)
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void db_printf __P((const char *fmt, ...));
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#endif /* DEBUG_CPUSTOP */
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/*
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* When called the executing CPU will send an IPI to all other CPUs
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* requesting that they halt execution.
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@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
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return 0;
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/* send IPI to all CPUs in map */
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#if defined(DEBUG_CPUSTOP)
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db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
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#endif /* DEBUG_CPUSTOP */
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stopped_cpus = 0;
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/* send the Xcpustop IPI to all CPUs in map */
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selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
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#if defined(DEBUG_CPUSTOP)
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db_printf(" spin\n");
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#endif /* DEBUG_CPUSTOP */
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while (stopped_cpus != map)
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/* spin */ ;
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#if defined(DEBUG_CPUSTOP)
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db_printf(" spun\nstopped\n");
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#endif /* DEBUG_CPUSTOP */
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return 1;
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}
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@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
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if (!smp_active)
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return 0;
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#if defined(DEBUG_CPUSTOP)
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db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
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cpuid, map, stopped_cpus);
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#endif /* DEBUG_CPUSTOP */
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started_cpus = map; /* signal other cpus to restart */
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while (started_cpus) /* wait for each to clear its bit */
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/* spin */ ;
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#if defined(DEBUG_CPUSTOP)
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db_printf(" restarted\n");
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#endif /* DEBUG_CPUSTOP */
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return 1;
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}
|
||||
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)isa_device.h 7.1 (Berkeley) 5/9/91
|
||||
* $Id: intr_machdep.h,v 1.6 1997/07/13 00:18:33 smp Exp smp $
|
||||
* $Id: intr_machdep.h,v 1.7 1997/07/18 19:47:13 smp Exp smp $
|
||||
*/
|
||||
|
||||
#ifndef _I386_ISA_INTR_MACHDEP_H_
|
||||
@ -99,15 +99,13 @@
|
||||
/* TLB shootdowns */
|
||||
#define XINVLTLB_OFFSET (ICU_OFFSET + 32)
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
/* IPI to signal CPUs to stop and wait for another CPU to restart them */
|
||||
#define XCPUSTOP_OFFSET (ICU_OFFSET + 48)
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_TEST1)
|
||||
#ifdef TEST_TEST1
|
||||
/* put a 'fake' HWI in top of APIC prio 0x3x, 32 + 31 = 63 = 0x3f */
|
||||
#define XTEST1_OFFSET (ICU_OFFSET + 31)
|
||||
#endif /** TEST_TEST1 */
|
||||
#endif /** TEST_TEST1 */
|
||||
|
||||
#ifndef LOCORE
|
||||
|
||||
@ -152,18 +150,14 @@ inthand_t
|
||||
IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23);
|
||||
|
||||
inthand_t
|
||||
Xinvltlb,
|
||||
Xspuriousint;
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
inthand_t
|
||||
Xinvltlb, /* TLB shootdowns */
|
||||
Xspuriousint, /* handle APIC "spurious INTs" */
|
||||
Xcpustop; /* stop & wait for another CPU to restart it */
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
#ifdef TEST_TEST1
|
||||
inthand_t
|
||||
Xtest1; /* 'fake' HWI in top of APIC prio 0x3x, 32+31 = 0x3f */
|
||||
#endif /** TEST_TEST1 */
|
||||
#endif /** TEST_TEST1 */
|
||||
|
||||
struct isa_device;
|
||||
|
||||
|
||||
@ -1,10 +1,11 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $Id: apic_vector.s,v 1.7 1997/07/15 02:49:21 fsmp Exp $
|
||||
* $Id: apic_vector.s,v 1.12 1997/07/18 19:47:13 smp Exp smp $
|
||||
*/
|
||||
|
||||
|
||||
#include <machine/smptests.h> /** TEST_CPUSTOP */
|
||||
#include <machine/smptests.h> /** various counters */
|
||||
#include "i386/isa/intr_machdep.h"
|
||||
|
||||
/* convert an absolute IRQ# into a bitmask */
|
||||
#define IRQ_BIT(irq_num) (1 << (irq_num))
|
||||
@ -212,10 +213,6 @@ _Xinvltlb:
|
||||
iret
|
||||
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
|
||||
#include "i386/isa/intr_machdep.h"
|
||||
|
||||
/*
|
||||
* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
|
||||
*
|
||||
@ -263,8 +260,6 @@ _Xcpustop:
|
||||
popl %eax
|
||||
iret
|
||||
|
||||
#endif /* TEST_CPUSTOP */
|
||||
|
||||
|
||||
MCOUNT_LABEL(bintr)
|
||||
FAST_INTR(0,fastintr0)
|
||||
@ -359,33 +354,22 @@ _sihits:
|
||||
#ifdef COUNT_XINVLTLB_HITS
|
||||
.globl _xhits
|
||||
_xhits:
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.space (NCPU * 4), 0
|
||||
#endif /* COUNT_XINVLTLB_HITS */
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
|
||||
.globl _stopped_cpus
|
||||
/* variables used by stop_cpus()/restart_cpus()/Xcpustop */
|
||||
.globl _stopped_cpus, _started_cpus
|
||||
_stopped_cpus:
|
||||
.long 0
|
||||
|
||||
.globl _started_cpus
|
||||
_started_cpus:
|
||||
.long 0
|
||||
|
||||
#ifdef COUNT_CSHITS
|
||||
.globl _cshits
|
||||
_cshits:
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.space (NCPU * 4), 0
|
||||
#endif /* COUNT_CSHITS */
|
||||
|
||||
#endif /* TEST_CPUSTOP */
|
||||
|
||||
|
||||
/*
|
||||
* Interrupt counters and names. The format of these and the label names
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
* any improvements or extensions that they make and grant Carnegie the
|
||||
* rights to redistribute these changes.
|
||||
*
|
||||
* $Id: db_interface.c,v 1.9 1997/07/13 00:48:28 smp Exp smp $
|
||||
* $Id: db_interface.c,v 1.10 1997/07/18 19:45:41 smp Exp smp $
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -40,7 +40,7 @@
|
||||
#include <machine/segments.h>
|
||||
#ifdef SMP
|
||||
#include <machine/smp.h>
|
||||
#include <machine/smptests.h> /** TEST_CPUSTOP */
|
||||
#include <machine/smptests.h> /** CPUSTOP_ON_DDBBREAK */
|
||||
#endif
|
||||
|
||||
#include <vm/vm.h>
|
||||
@ -138,10 +138,22 @@ kdb_trap(type, code, regs)
|
||||
|
||||
cnpollc(TRUE);
|
||||
|
||||
#if defined(SMP) && defined(TEST_CPUSTOP)
|
||||
/* XXX FIXME: we stop all CPUs except ourselves (obviously) */
|
||||
#ifdef SMP
|
||||
#ifdef CPUSTOP_ON_DDBBREAK
|
||||
|
||||
#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
|
||||
db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, other_cpus);
|
||||
#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
|
||||
|
||||
/* We stop all CPUs except ourselves (obviously) */
|
||||
stop_cpus(other_cpus);
|
||||
#endif /** SMP && TEST_CPUSTOP */
|
||||
|
||||
#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
|
||||
db_printf(" stopped\n");
|
||||
#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
|
||||
|
||||
#endif /* CPUSTOP_ON_DDBBREAK */
|
||||
#endif /* SMP */
|
||||
|
||||
(void) setjmp(db_global_jmpbuf);
|
||||
db_global_jmpbuf_valid = TRUE;
|
||||
@ -151,15 +163,27 @@ kdb_trap(type, code, regs)
|
||||
gdb_handle_exception(&ddb_regs, type, code);
|
||||
db_global_jmpbuf_valid = FALSE;
|
||||
|
||||
#if defined(SMP) && defined(TEST_CPUSTOP)
|
||||
/* XXX FIXME: restart all the CPUs we previously stopped */
|
||||
#ifdef SMP
|
||||
#ifdef CPUSTOP_ON_DDBBREAK
|
||||
|
||||
#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
|
||||
db_printf("\nCPU%d restarting CPUs: 0x%08x\n", cpuid, stopped_cpus);
|
||||
#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
|
||||
|
||||
/* Restart all the CPUs we previously stopped */
|
||||
if (stopped_cpus != other_cpus) {
|
||||
db_printf("whoa, other_cpus: 0x%08x, stopped_cpus: 0x%08x\n",
|
||||
other_cpus, stopped_cpus);
|
||||
cngetc();
|
||||
other_cpus, stopped_cpus);
|
||||
panic("stop_cpus() failed");
|
||||
}
|
||||
restart_cpus(stopped_cpus);
|
||||
#endif /** SMP && TEST_CPUSTOP */
|
||||
|
||||
#if defined(VERBOSE_CPUSTOP_ON_DDBBREAK)
|
||||
db_printf(" restarted\n");
|
||||
#endif /* VERBOSE_CPUSTOP_ON_DDBBREAK */
|
||||
|
||||
#endif /* CPUSTOP_ON_DDBBREAK */
|
||||
#endif /* SMP */
|
||||
|
||||
cnpollc(FALSE);
|
||||
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
|
||||
* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
|
||||
*/
|
||||
|
||||
#include "opt_smp.h"
|
||||
@ -45,7 +45,7 @@
|
||||
#include <machine/mpapic.h>
|
||||
#include <machine/cpufunc.h>
|
||||
#include <machine/segments.h>
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
|
||||
#include <machine/tss.h>
|
||||
#include <machine/specialreg.h>
|
||||
|
||||
@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
|
||||
setidt(XINVLTLB_OFFSET, Xinvltlb,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
/* install an inter-CPU IPI for CPU stop/restart */
|
||||
setidt(XCPUSTOP_OFFSET, Xcpustop,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_TEST1)
|
||||
/* install a 'Spurious INTerrupt' vector */
|
||||
/* install a "fake hardware INTerrupt" vector */
|
||||
setidt(XTEST1_OFFSET, Xtest1,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_TEST1 */
|
||||
@ -1741,12 +1739,6 @@ invltlb(void)
|
||||
}
|
||||
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
void db_printf __P((const char *fmt, ...));
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
/*
|
||||
* When called the executing CPU will send an IPI to all other CPUs
|
||||
* requesting that they halt execution.
|
||||
@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
|
||||
return 0;
|
||||
|
||||
/* send IPI to all CPUs in map */
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
stopped_cpus = 0;
|
||||
|
||||
/* send the Xcpustop IPI to all CPUs in map */
|
||||
selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spin\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
while (stopped_cpus != map)
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spun\nstopped\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
|
||||
if (!smp_active)
|
||||
return 0;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
|
||||
cpuid, map, stopped_cpus);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
started_cpus = map; /* signal other cpus to restart */
|
||||
|
||||
while (started_cpus) /* wait for each to clear its bit */
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" restarted\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: mpapic.c,v 1.12 1997/07/15 02:51:19 fsmp Exp $
|
||||
* $Id: mpapic.c,v 1.13 1997/07/18 19:45:41 smp Exp smp $
|
||||
*/
|
||||
|
||||
#include "opt_smp.h"
|
||||
@ -31,9 +31,9 @@
|
||||
#include <sys/sysproto.h>
|
||||
#include <sys/systm.h>
|
||||
|
||||
#include <machine/smptests.h> /** TEST_LOPRIO, TEST_IPI, TEST_ALTTIMER */
|
||||
#include <machine/smp.h>
|
||||
#include <machine/mpapic.h>
|
||||
#include <machine/smptests.h> /** TEST_LOPRIO, TEST_IPI, TEST_CPUSTOP, TEST_ALTTIMER */
|
||||
#include <machine/cpufunc.h>
|
||||
#include <machine/segments.h>
|
||||
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
|
||||
* ----------------------------------------------------------------------------
|
||||
*
|
||||
* $Id: mplock.s,v 1.8 1997/07/15 00:09:53 smp Exp smp $
|
||||
* $Id: mplock.s,v 1.9 1997/07/18 19:45:41 smp Exp smp $
|
||||
*
|
||||
* Functions for locking between CPUs in a SMP system.
|
||||
*
|
||||
@ -26,37 +26,53 @@
|
||||
#include "assym.s" /* system definitions */
|
||||
#include <machine/specialreg.h> /* x86 special registers */
|
||||
#include <machine/asmacros.h> /* miscellaneous asm macros */
|
||||
#include <machine/smptests.h> /** TEST_LOPRIO, TEST_CPUSTOP */
|
||||
#ifdef TEST_CPUSTOP
|
||||
#include <i386/isa/intr_machdep.h>
|
||||
#endif
|
||||
#include <machine/smptests.h> /** TEST_LOPRIO */
|
||||
#include <machine/apic.h>
|
||||
|
||||
#include <i386/isa/intr_machdep.h>
|
||||
|
||||
|
||||
/*
|
||||
* claim LOW PRIO, ie. accept ALL INTerrupts
|
||||
*/
|
||||
#ifdef TEST_LOPRIO
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
/* location of saved TPR on stack */
|
||||
#define TPR_TARGET 20(%esp)
|
||||
#else
|
||||
#define TPR_TARGET lapic_tpr
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
/* we assumme that the 'reserved bits' can be written with zeros */
|
||||
#ifdef CHEAP_TPR
|
||||
#define ACCEPT_INTS \
|
||||
movl $0, TPR_TARGET /* clear TPR */
|
||||
#else
|
||||
#define ACCEPT_INTS \
|
||||
andl $~APIC_TPR_PRIO, TPR_TARGET /* clear TPR */
|
||||
|
||||
/* after 1st acquire of lock we attempt to grab all hardware INTs */
|
||||
#define GRAB_HWI \
|
||||
movl $ALLHWI_LEVEL, TPR_TARGET /* task prio to 'all HWI' */
|
||||
|
||||
/* after last release of lock give up LOW PRIO (ie, arbitrate INTerrupts) */
|
||||
#define ARB_HWI \
|
||||
movl $LOPRIO_LEVEL, lapic_tpr /* task prio to 'arbitrate' */
|
||||
|
||||
#else /** CHEAP_TPR */
|
||||
|
||||
#define GRAB_HWI \
|
||||
andl $~APIC_TPR_PRIO, TPR_TARGET /* task prio to 'all HWI' */
|
||||
|
||||
#define ARB_HWI \
|
||||
movl lapic_tpr, %eax ; /* TPR */ \
|
||||
andl $~APIC_TPR_PRIO, %eax ; /* clear TPR field */ \
|
||||
orl $LOPRIO_LEVEL, %eax ; /* prio to arbitrate */ \
|
||||
movl %eax, lapic_tpr ; /* set it */ \
|
||||
movl (%edx), %eax /* reload %eax with lock */
|
||||
|
||||
#endif /** CHEAP_TPR */
|
||||
|
||||
#else
|
||||
#else /** TEST_LOPRIO */
|
||||
|
||||
#define ACCEPT_INTS
|
||||
#define GRAB_HWI /* nop */
|
||||
#define ARB_HWI /* nop */
|
||||
|
||||
#endif /** TEST_LOPRIO */
|
||||
|
||||
|
||||
.text
|
||||
/***********************************************************************
|
||||
* void MPgetlock(unsigned int *lock)
|
||||
@ -82,7 +98,7 @@ NON_GPROF_ENTRY(MPgetlock)
|
||||
lock
|
||||
cmpxchg %ecx, (%edx) /* - try it atomically */
|
||||
jne 3f /* ...do not collect $200 */
|
||||
ACCEPT_INTS /* 1st acquire, accept INTs */
|
||||
GRAB_HWI /* 1st acquire, grab hw INTs */
|
||||
ret
|
||||
3: cmpl $FREE_LOCK, (%edx) /* Wait for it to become free */
|
||||
jne 3b
|
||||
@ -114,7 +130,7 @@ NON_GPROF_ENTRY(MPtrylock)
|
||||
lock
|
||||
cmpxchg %ecx, (%edx) /* - try it atomically */
|
||||
jne 3f /* ...do not collect $200 */
|
||||
ACCEPT_INTS /* 1st acquire, accept INTs */
|
||||
GRAB_HWI /* 1st acquire, grab hw INTs */
|
||||
movl $1, %eax
|
||||
ret
|
||||
3: movl $0, %eax
|
||||
@ -133,18 +149,7 @@ NON_GPROF_ENTRY(MPrellock)
|
||||
decl %ecx /* - new count is one less */
|
||||
testl $COUNT_FIELD, %ecx /* - Unless it's zero... */
|
||||
jnz 2f
|
||||
#if defined(TEST_LOPRIO)
|
||||
/* last release, give up LOW PRIO (ie, arbitrate INTerrupts) */
|
||||
#ifdef CHEAP_TPR
|
||||
movl $LOPRIO_LEVEL, lapic_tpr /* task prio to 'arbitrate' */
|
||||
#else
|
||||
movl lapic_tpr, %eax /* Task Priority Register */
|
||||
andl $~APIC_TPR_PRIO, %eax /* clear task priority field */
|
||||
orl $LOPRIO_LEVEL, %eax /* set task priority to 'arbitrate' */
|
||||
movl %eax, lapic_tpr /* set it */
|
||||
movl (%edx), %eax /* - get the value AGAIN */
|
||||
#endif /* CHEAP_TPR */
|
||||
#endif /** TEST_LOPRIO */
|
||||
ARB_HWI /* last release, arbitrate hw INTs */
|
||||
movl $FREE_LOCK, %ecx /* - In which case we release it */
|
||||
2: lock
|
||||
cmpxchg %ecx, (%edx) /* - try it atomically */
|
||||
@ -169,13 +174,13 @@ NON_GPROF_ENTRY(MPrellock)
|
||||
NON_GPROF_ENTRY(get_mplock)
|
||||
pushl %eax
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
/* block all HW INTs via Task Priority Register */
|
||||
#ifdef CHEAP_TPR
|
||||
pushl lapic_tpr /* save current TPR */
|
||||
pushfl /* save current EFLAGS */
|
||||
btl $9, (%esp) /* test EI bit */
|
||||
jc 1f /* INTs currently enabled */
|
||||
movl $TPR_BLOCK_HWI, lapic_tpr /* set it */
|
||||
movl $TPR_BLOCK_HWI, lapic_tpr
|
||||
#else
|
||||
movl lapic_tpr, %eax /* get current TPR */
|
||||
pushl %eax /* save current TPR */
|
||||
@ -183,12 +188,11 @@ NON_GPROF_ENTRY(get_mplock)
|
||||
btl $9, (%esp) /* test EI bit */
|
||||
jc 1f /* INTs currently enabled */
|
||||
andl $~APIC_TPR_PRIO, %eax /* clear task priority field */
|
||||
orl $TPR_BLOCK_HWI, %eax /* only allow IPIs
|
||||
movl %eax, lapic_tpr /* set it */
|
||||
#endif /* CHEAP_TPR */
|
||||
sti /* allow IPI (and only IPI) INTS */
|
||||
orl $TPR_BLOCK_HWI, %eax /* only allow IPIs */
|
||||
movl %eax, lapic_tpr
|
||||
#endif /** CHEAP_TPR */
|
||||
sti /* allow (IPI and only IPI) INTs */
|
||||
1:
|
||||
#endif /* TEST_CPUSTOP */
|
||||
|
||||
pushl %ecx
|
||||
pushl %edx
|
||||
@ -198,11 +202,8 @@ NON_GPROF_ENTRY(get_mplock)
|
||||
popl %edx
|
||||
popl %ecx
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
popfl /* restore original EFLAGS */
|
||||
popl lapic_tpr /* restore TPR */
|
||||
#endif /* TEST_CPUSTOP */
|
||||
|
||||
popl %eax /* restore scratch */
|
||||
ret
|
||||
|
||||
@ -245,5 +246,5 @@ NON_GPROF_ENTRY(rel_mplock)
|
||||
|
||||
.data
|
||||
.globl _mp_lock
|
||||
.align 2 /* mp_lock SHALL be aligned on i386 */
|
||||
.align 4 /* mp_lock aligned on int boundary */
|
||||
_mp_lock: .long 0
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
|
||||
* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
|
||||
*/
|
||||
|
||||
#include "opt_smp.h"
|
||||
@ -45,7 +45,7 @@
|
||||
#include <machine/mpapic.h>
|
||||
#include <machine/cpufunc.h>
|
||||
#include <machine/segments.h>
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
|
||||
#include <machine/tss.h>
|
||||
#include <machine/specialreg.h>
|
||||
|
||||
@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
|
||||
setidt(XINVLTLB_OFFSET, Xinvltlb,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
/* install an inter-CPU IPI for CPU stop/restart */
|
||||
setidt(XCPUSTOP_OFFSET, Xcpustop,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_TEST1)
|
||||
/* install a 'Spurious INTerrupt' vector */
|
||||
/* install a "fake hardware INTerrupt" vector */
|
||||
setidt(XTEST1_OFFSET, Xtest1,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_TEST1 */
|
||||
@ -1741,12 +1739,6 @@ invltlb(void)
|
||||
}
|
||||
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
void db_printf __P((const char *fmt, ...));
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
/*
|
||||
* When called the executing CPU will send an IPI to all other CPUs
|
||||
* requesting that they halt execution.
|
||||
@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
|
||||
return 0;
|
||||
|
||||
/* send IPI to all CPUs in map */
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
stopped_cpus = 0;
|
||||
|
||||
/* send the Xcpustop IPI to all CPUs in map */
|
||||
selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spin\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
while (stopped_cpus != map)
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spun\nstopped\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
|
||||
if (!smp_active)
|
||||
return 0;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
|
||||
cpuid, map, stopped_cpus);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
started_cpus = map; /* signal other cpus to restart */
|
||||
|
||||
while (started_cpus) /* wait for each to clear its bit */
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" restarted\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: apic.h,v 1.7 1997/07/15 02:47:52 fsmp Exp $
|
||||
* $Id: apic.h,v 1.5 1997/07/18 19:47:48 smp Exp smp $
|
||||
*/
|
||||
|
||||
#ifndef _MACHINE_APIC_H_
|
||||
@ -220,7 +220,10 @@ typedef struct IOAPIC ioapic_t;
|
||||
* various code 'logical' values
|
||||
*/
|
||||
|
||||
#ifdef TEST_LOPRIO
|
||||
#define LOPRIO_LEVEL 0x00000010 /* TPR of CPUs accepting INT */
|
||||
#define ALLHWI_LEVEL 0x00000000 /* TPR of CPU grabbing INTs */
|
||||
#endif /** TEST_LOPRIO */
|
||||
|
||||
/* XXX these 2 don't really belong here... */
|
||||
#define COUNT_FIELD 0x00ffffff /* count portion of the lock */
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: apic.h,v 1.7 1997/07/15 02:47:52 fsmp Exp $
|
||||
* $Id: apic.h,v 1.5 1997/07/18 19:47:48 smp Exp smp $
|
||||
*/
|
||||
|
||||
#ifndef _MACHINE_APIC_H_
|
||||
@ -220,7 +220,10 @@ typedef struct IOAPIC ioapic_t;
|
||||
* various code 'logical' values
|
||||
*/
|
||||
|
||||
#ifdef TEST_LOPRIO
|
||||
#define LOPRIO_LEVEL 0x00000010 /* TPR of CPUs accepting INT */
|
||||
#define ALLHWI_LEVEL 0x00000000 /* TPR of CPU grabbing INTs */
|
||||
#endif /** TEST_LOPRIO */
|
||||
|
||||
/* XXX these 2 don't really belong here... */
|
||||
#define COUNT_FIELD 0x00ffffff /* count portion of the lock */
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
|
||||
* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
|
||||
*/
|
||||
|
||||
#include "opt_smp.h"
|
||||
@ -45,7 +45,7 @@
|
||||
#include <machine/mpapic.h>
|
||||
#include <machine/cpufunc.h>
|
||||
#include <machine/segments.h>
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
|
||||
#include <machine/tss.h>
|
||||
#include <machine/specialreg.h>
|
||||
|
||||
@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
|
||||
setidt(XINVLTLB_OFFSET, Xinvltlb,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
/* install an inter-CPU IPI for CPU stop/restart */
|
||||
setidt(XCPUSTOP_OFFSET, Xcpustop,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_TEST1)
|
||||
/* install a 'Spurious INTerrupt' vector */
|
||||
/* install a "fake hardware INTerrupt" vector */
|
||||
setidt(XTEST1_OFFSET, Xtest1,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_TEST1 */
|
||||
@ -1741,12 +1739,6 @@ invltlb(void)
|
||||
}
|
||||
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
void db_printf __P((const char *fmt, ...));
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
/*
|
||||
* When called the executing CPU will send an IPI to all other CPUs
|
||||
* requesting that they halt execution.
|
||||
@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
|
||||
return 0;
|
||||
|
||||
/* send IPI to all CPUs in map */
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
stopped_cpus = 0;
|
||||
|
||||
/* send the Xcpustop IPI to all CPUs in map */
|
||||
selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spin\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
while (stopped_cpus != map)
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spun\nstopped\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
|
||||
if (!smp_active)
|
||||
return 0;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
|
||||
cpuid, map, stopped_cpus);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
started_cpus = map; /* signal other cpus to restart */
|
||||
|
||||
while (started_cpus) /* wait for each to clear its bit */
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" restarted\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: smptests.h,v 1.10 1997/07/15 03:27:12 fsmp Exp $
|
||||
* $Id: smptests.h,v 1.15 1997/07/18 19:47:48 smp Exp smp $
|
||||
*/
|
||||
|
||||
#ifndef _MACHINE_SMPTESTS_H_
|
||||
@ -35,7 +35,8 @@
|
||||
|
||||
|
||||
/*
|
||||
* address of POST hardware port
|
||||
* Address of POST hardware port.
|
||||
* Defining this enables POSTCODE macros.
|
||||
*
|
||||
#define POST_ADDR 0x80
|
||||
*/
|
||||
@ -50,19 +51,18 @@
|
||||
#define TEST_ALTTIMER
|
||||
|
||||
/*
|
||||
* send 8254 timer INTs to all CPUs in LOPRIO mode
|
||||
* Send 8254 timer INTs to all CPUs in LOPRIO mode.
|
||||
*
|
||||
*/
|
||||
#define TIMER_ALL
|
||||
|
||||
|
||||
/*
|
||||
* IPI for stop/restart of other CPUs
|
||||
* Send CPUSTOP IPI for stop/restart of other CPUs on DDB break.
|
||||
*
|
||||
#define COUNT_CSHITS
|
||||
#define DEBUG_CPUSTOP
|
||||
*/
|
||||
#define TEST_CPUSTOP
|
||||
#define CPUSTOP_ON_DDBBREAK
|
||||
#define VERBOSE_CPUSTOP_ON_DDBBREAK
|
||||
|
||||
|
||||
/*
|
||||
@ -93,6 +93,7 @@
|
||||
*
|
||||
#define COUNT_XINVLTLB_HITS
|
||||
#define COUNT_SPURIOUS_INTS
|
||||
#define COUNT_CSHITS
|
||||
*/
|
||||
|
||||
|
||||
@ -167,12 +168,14 @@
|
||||
|
||||
|
||||
/*
|
||||
* these are all temps for debugging CPUSTOP code in mplock.s
|
||||
* they will (hopefully) go away soon...
|
||||
* these are all temps for debugging...
|
||||
*
|
||||
#define GUARD_INTS
|
||||
*/
|
||||
|
||||
/*
|
||||
* This macro traps unexpected INTs to a specific CPU, eg. GUARD_CPU.
|
||||
*/
|
||||
#ifdef GUARD_INTS
|
||||
#define GUARD_CPU 1
|
||||
#define MAYBE_PANIC(irq_num) \
|
||||
|
||||
@ -1,10 +1,11 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $Id: apic_vector.s,v 1.7 1997/07/15 02:49:21 fsmp Exp $
|
||||
* $Id: apic_vector.s,v 1.12 1997/07/18 19:47:13 smp Exp smp $
|
||||
*/
|
||||
|
||||
|
||||
#include <machine/smptests.h> /** TEST_CPUSTOP */
|
||||
#include <machine/smptests.h> /** various counters */
|
||||
#include "i386/isa/intr_machdep.h"
|
||||
|
||||
/* convert an absolute IRQ# into a bitmask */
|
||||
#define IRQ_BIT(irq_num) (1 << (irq_num))
|
||||
@ -212,10 +213,6 @@ _Xinvltlb:
|
||||
iret
|
||||
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
|
||||
#include "i386/isa/intr_machdep.h"
|
||||
|
||||
/*
|
||||
* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
|
||||
*
|
||||
@ -263,8 +260,6 @@ _Xcpustop:
|
||||
popl %eax
|
||||
iret
|
||||
|
||||
#endif /* TEST_CPUSTOP */
|
||||
|
||||
|
||||
MCOUNT_LABEL(bintr)
|
||||
FAST_INTR(0,fastintr0)
|
||||
@ -359,33 +354,22 @@ _sihits:
|
||||
#ifdef COUNT_XINVLTLB_HITS
|
||||
.globl _xhits
|
||||
_xhits:
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.space (NCPU * 4), 0
|
||||
#endif /* COUNT_XINVLTLB_HITS */
|
||||
|
||||
#ifdef TEST_CPUSTOP
|
||||
|
||||
.globl _stopped_cpus
|
||||
/* variables used by stop_cpus()/restart_cpus()/Xcpustop */
|
||||
.globl _stopped_cpus, _started_cpus
|
||||
_stopped_cpus:
|
||||
.long 0
|
||||
|
||||
.globl _started_cpus
|
||||
_started_cpus:
|
||||
.long 0
|
||||
|
||||
#ifdef COUNT_CSHITS
|
||||
.globl _cshits
|
||||
_cshits:
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.space (NCPU * 4), 0
|
||||
#endif /* COUNT_CSHITS */
|
||||
|
||||
#endif /* TEST_CPUSTOP */
|
||||
|
||||
|
||||
/*
|
||||
* Interrupt counters and names. The format of these and the label names
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)isa_device.h 7.1 (Berkeley) 5/9/91
|
||||
* $Id: intr_machdep.h,v 1.6 1997/07/13 00:18:33 smp Exp smp $
|
||||
* $Id: intr_machdep.h,v 1.7 1997/07/18 19:47:13 smp Exp smp $
|
||||
*/
|
||||
|
||||
#ifndef _I386_ISA_INTR_MACHDEP_H_
|
||||
@ -99,15 +99,13 @@
|
||||
/* TLB shootdowns */
|
||||
#define XINVLTLB_OFFSET (ICU_OFFSET + 32)
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
/* IPI to signal CPUs to stop and wait for another CPU to restart them */
|
||||
#define XCPUSTOP_OFFSET (ICU_OFFSET + 48)
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_TEST1)
|
||||
#ifdef TEST_TEST1
|
||||
/* put a 'fake' HWI in top of APIC prio 0x3x, 32 + 31 = 63 = 0x3f */
|
||||
#define XTEST1_OFFSET (ICU_OFFSET + 31)
|
||||
#endif /** TEST_TEST1 */
|
||||
#endif /** TEST_TEST1 */
|
||||
|
||||
#ifndef LOCORE
|
||||
|
||||
@ -152,18 +150,14 @@ inthand_t
|
||||
IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23);
|
||||
|
||||
inthand_t
|
||||
Xinvltlb,
|
||||
Xspuriousint;
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
inthand_t
|
||||
Xinvltlb, /* TLB shootdowns */
|
||||
Xspuriousint, /* handle APIC "spurious INTs" */
|
||||
Xcpustop; /* stop & wait for another CPU to restart it */
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
#ifdef TEST_TEST1
|
||||
inthand_t
|
||||
Xtest1; /* 'fake' HWI in top of APIC prio 0x3x, 32+31 = 0x3f */
|
||||
#endif /** TEST_TEST1 */
|
||||
#endif /** TEST_TEST1 */
|
||||
|
||||
struct isa_device;
|
||||
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: mp_machdep.c,v 1.28 1997/07/17 19:44:56 dyson Exp $
|
||||
* $Id: mp_machdep.c,v 1.16 1997/07/18 19:45:41 smp Exp smp $
|
||||
*/
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||||
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||||
#include "opt_smp.h"
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||||
@ -45,7 +45,7 @@
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||||
#include <machine/mpapic.h>
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||||
#include <machine/cpufunc.h>
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||||
#include <machine/segments.h>
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||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_CPUSTOP _TEST1 */
|
||||
#include <machine/smptests.h> /** TEST_DEFAULT_CONFIG, TEST_TEST1 */
|
||||
#include <machine/tss.h>
|
||||
#include <machine/specialreg.h>
|
||||
|
||||
@ -491,14 +491,12 @@ mp_enable(u_int boot_addr)
|
||||
setidt(XINVLTLB_OFFSET, Xinvltlb,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
/* install an inter-CPU IPI for CPU stop/restart */
|
||||
setidt(XCPUSTOP_OFFSET, Xcpustop,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
#if defined(TEST_TEST1)
|
||||
/* install a 'Spurious INTerrupt' vector */
|
||||
/* install a "fake hardware INTerrupt" vector */
|
||||
setidt(XTEST1_OFFSET, Xtest1,
|
||||
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
#endif /** TEST_TEST1 */
|
||||
@ -1741,12 +1739,6 @@ invltlb(void)
|
||||
}
|
||||
|
||||
|
||||
#if defined(TEST_CPUSTOP)
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
void db_printf __P((const char *fmt, ...));
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
/*
|
||||
* When called the executing CPU will send an IPI to all other CPUs
|
||||
* requesting that they halt execution.
|
||||
@ -1771,26 +1763,14 @@ stop_cpus( u_int map )
|
||||
return 0;
|
||||
|
||||
/* send IPI to all CPUs in map */
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d stopping CPUs: 0x%08x\n", cpuid, map);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
stopped_cpus = 0;
|
||||
|
||||
/* send the Xcpustop IPI to all CPUs in map */
|
||||
selected_apic_ipi(map, XCPUSTOP_OFFSET, APIC_DELMODE_FIXED);
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spin\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
while (stopped_cpus != map)
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" spun\nstopped\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1814,21 +1794,10 @@ restart_cpus( u_int map )
|
||||
if (!smp_active)
|
||||
return 0;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf("\nCPU%d restarting CPUs: 0x%08x (0x%08x)\n",
|
||||
cpuid, map, stopped_cpus);
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
started_cpus = map; /* signal other cpus to restart */
|
||||
|
||||
while (started_cpus) /* wait for each to clear its bit */
|
||||
/* spin */ ;
|
||||
|
||||
#if defined(DEBUG_CPUSTOP)
|
||||
db_printf(" restarted\n");
|
||||
#endif /* DEBUG_CPUSTOP */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif /** TEST_CPUSTOP */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user