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Modify the radar API a little to be easier to "change" via run-time

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tools.

* introduce pe_enabled, which (will) indicate whether the radar
  detection stuff is enabled or not. Right now it's incorrectly
  set, based on something previously written. I'll sort it out
  later.

* Don't set HAL_PHYERR_PARAM_ENABLE in pe_relstep to say whether
  radar detection is on.

* Return whether blockradar, fir128 and enmaxrssi is enabled.

* Change some of the phyerr params to be integers rather than
  HAL_BOOL so they can be set to the NOPARAM value when the
  setup function is called. This is in line with other radar
  parameters.

* Add new configuration parameters for fir128, blockradar and
  enmaxrssi, rather than defaulting to off, on and on respectively.

Approved by:	re (kib)
This commit is contained in:
adrian 2011-07-21 14:16:42 +00:00
parent 062c2f0752
commit d54d0f83bc
2 changed files with 32 additions and 9 deletions
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9
sys/dev/ath/ath_hal/ah.h
View File

@ -718,17 +718,18 @@ typedef struct {
u_int32_t pe_relpwr; /* Relative power threshold in 0.5dB steps */
u_int32_t pe_relstep; /* Pulse Relative step threshold in 0.5dB steps */
u_int32_t pe_maxlen; /* Max length of radar sign in 0.8us units */
HAL_BOOL pe_usefir128; /* Use the average in-band power measured over 128 cycles */
HAL_BOOL pe_blockradar; /*
int32_t pe_usefir128; /* Use the average in-band power measured over 128 cycles */
int32_t pe_blockradar; /*
* Enable to block radar check if pkt detect is done via OFDM
* weak signal detect or pkt is detected immediately after tx
* to rx transition
*/
HAL_BOOL pe_enmaxrssi; /*
int32_t pe_enmaxrssi; /*
* Enable to use the max rssi instead of the last rssi during
* fine gain changes for radar detection
*/
HAL_BOOL pe_extchannel; /* Enable DFS on ext channel */
int32_t pe_extchannel; /* Enable DFS on ext channel */
int32_t pe_enabled; /* Whether radar detection is enabled */
} HAL_PHYERR_PARAM;
#define HAL_PHYERR_PARAM_NOVAL 65535

32
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
View File

@ -617,10 +617,20 @@ ar5416GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
temp = val & AR_PHY_RADAR_1_RELSTEP_CHECK;
pe->pe_relstep = MS(val, AR_PHY_RADAR_1_RELSTEP_THRESH);
if (temp)
pe->pe_relstep |= HAL_PHYERR_PARAM_ENABLE;
pe->pe_enabled = 1;
else
pe->pe_enabled = 0;
pe->pe_maxlen = MS(val, AR_PHY_RADAR_1_MAXLEN);
pe->pe_extchannel = !! (OS_REG_READ(ah, AR_PHY_RADAR_EXT) &
AR_PHY_RADAR_EXT_ENA);
pe->pe_usefir128 = !! (OS_REG_READ(ah, AR_PHY_RADAR_1) &
AR_PHY_RADAR_1_USE_FIR128);
pe->pe_blockradar = !! (OS_REG_READ(ah, AR_PHY_RADAR_1) &
AR_PHY_RADAR_1_BLOCK_CHECK);
pe->pe_enmaxrssi = !! (OS_REG_READ(ah, AR_PHY_RADAR_1) &
AR_PHY_RADAR_1_MAX_RRSSI);
}
/*
@ -660,8 +670,20 @@ ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val | AR_PHY_RADAR_0_ENA);
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val |= (AR_PHY_RADAR_1_MAX_RRSSI | AR_PHY_RADAR_1_BLOCK_CHECK);
if (pe->pe_usefir128 == 0)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128);
else if (pe->pe_usefir128 == 1)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128);
if (pe->pe_enmaxrssi == 0)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_MAX_RRSSI);
else if (pe->pe_enmaxrssi == 1)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_MAX_RRSSI);
if (pe->pe_blockradar == 0)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_BLOCK_CHECK);
else if (pe->pe_blockradar == 1)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_BLOCK_CHECK);
if (pe->pe_maxlen != HAL_PHYERR_PARAM_NOVAL) {
val &= ~AR_PHY_RADAR_1_MAXLEN;
@ -674,9 +696,9 @@ ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
* it should check the channel is HT/40 and HAL_CAP_EXT_CHAN_DFS
* is available.
*/
if (pe->pe_extchannel)
if (pe->pe_extchannel == 1)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
else
else if (pe->pe_extchannel == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
if (pe->pe_relstep != HAL_PHYERR_PARAM_NOVAL) {