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Split /dev/nvram driver out of isa/clock.c for i386 and amd64. I have not

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refactored it to be a generic device.
Instead of being part of the standard kernel, there is now a 'nvram' device
for i386/amd64.  It is in DEFAULTS like io and mem, and can be turned off
with 'nodevice nvram'.  This matches the previous behavior when it was
first committed.
This commit is contained in:
Peter Wemm 2007-10-26 03:23:54 +00:00
parent 47e87d5ad0
commit d556638404
12 changed files with 182 additions and 292 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
sys/amd64/conf/DEFAULTS
View File

@ -11,6 +11,7 @@ device isa
# Pseudo devices.
device mem # Memory and kernel memory devices
device io # I/O device
device nvram # Access to rtc cmos via /dev/nvram
# UART chips on this platform
device uart_ns8250

3
sys/amd64/include/clock.h
View File

@ -31,7 +31,8 @@ void i8254_init(void);
int acquire_timer2(int mode);
int release_timer2(void);
int rtcin(int val);
int rtcin(int reg);
void writertc(int reg, unsigned char val);
int sysbeep(int pitch, int period);
void init_TSC(void);
void init_TSC_tc(void);

97
sys/amd64/isa/clock.c
View File

@ -433,7 +433,7 @@ rtcin(reg)
return (val);
}
static void
void
writertc(int reg, u_char val)
{
@ -934,99 +934,4 @@ static devclass_t attimer_devclass;
DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
/*
* Linux-style /dev/nvram driver
*
* cmos ram starts at bytes 14 through 128, for a total of 114 bytes.
* bytes 16 through 31 are checksummed at byte 32.
* Unlike Linux, you have to take care of the checksums yourself.
* The driver exposes byte 14 as file offset 0.
*/
#define NVRAM_FIRST RTC_DIAG /* 14 */
#define NVRAM_LAST 128
static d_open_t nvram_open;
static d_read_t nvram_read;
static d_write_t nvram_write;
static struct cdev *nvram_dev;
static struct cdevsw nvram_cdevsw = {
.d_version = D_VERSION,
.d_flags = D_NEEDGIANT,
.d_open = nvram_open,
.d_read = nvram_read,
.d_write = nvram_write,
.d_name = "nvram",
};
static int
nvram_open(struct cdev *dev __unused, int flags, int fmt __unused,
struct thread *td)
{
int error = 0;
if (flags & FWRITE)
error = securelevel_gt(td->td_ucred, 0);
return (error);
}
static int
nvram_read(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
v = rtcin(nv_off);
error = uiomove(&v, 1, uio);
}
return (error);
}
static int
nvram_write(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
error = uiomove(&v, 1, uio);
writertc(nv_off, v);
}
return (error);
}
static int
nvram_modevent(module_t mod __unused, int type, void *data __unused)
{
switch (type) {
case MOD_LOAD:
nvram_dev = make_dev(&nvram_cdevsw, 0,
UID_ROOT, GID_KMEM, 0640, "nvram");
break;
case MOD_UNLOAD:
case MOD_SHUTDOWN:
destroy_dev(nvram_dev);
break;
default:
return (EOPNOTSUPP);
}
return (0);
}
DEV_MODULE(nvram, nvram_modevent, NULL);
#endif /* DEV_ISA */

1
sys/conf/files.amd64
View File

@ -185,6 +185,7 @@ dev/kbd/kbd.c optional atkbd | sc | ukbd
dev/mem/memutil.c optional mem
dev/nfe/if_nfe.c optional nfe pci
dev/nve/if_nve.c optional nve pci
dev/nvram/nvram.c optional nvram isa
dev/rr232x/os_bsd.c optional rr232x
dev/rr232x/osm_bsd.c optional rr232x
dev/rr232x/rr232x_config.c optional rr232x

1
sys/conf/files.i386
View File

@ -211,6 +211,7 @@ dev/mse/mse.c optional mse
dev/mse/mse_isa.c optional mse isa
dev/nfe/if_nfe.c optional nfe pci
dev/nve/if_nve.c optional nve pci
dev/nvram/nvram.c optional nvram isa
dev/pcf/pcf_isa.c optional pcf
dev/random/nehemiah.c optional random
dev/rr232x/os_bsd.c optional rr232x

159
sys/dev/nvram/nvram.c Normal file
View File

@ -0,0 +1,159 @@
/*-
* Copyright (c) 2007 Peter Wemm
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/conf.h>
#include <sys/fcntl.h>
#include <sys/proc.h>
#include <sys/uio.h>
#include <sys/module.h>
#include <machine/clock.h>
#include <isa/rtc.h>
/*
* Linux-style /dev/nvram driver
*
* cmos ram starts at bytes 14 through 128, for a total of 114 bytes.
* The driver exposes byte 14 as file offset 0.
*
* Offsets 2 through 31 are checksummed at offset 32, 33.
* In order to avoid the possibility of making the machine unbootable at the
* bios level (press F1 to continue!), we refuse to allow writes if we do
* not see a pre-existing valid checksum. If the existing sum is invalid,
* then presumably we do not know how to make a sum that the bios will accept.
*/
#define NVRAM_FIRST RTC_DIAG /* 14 */
#define NVRAM_LAST 128
#define CKSUM_FIRST 2
#define CKSUM_LAST 31
#define CKSUM_MSB 32
#define CKSUM_LSB 33
static d_open_t nvram_open;
static d_read_t nvram_read;
static d_write_t nvram_write;
static struct cdev *nvram_dev;
static struct cdevsw nvram_cdevsw = {
.d_version = D_VERSION,
.d_flags = D_NEEDGIANT,
.d_open = nvram_open,
.d_read = nvram_read,
.d_write = nvram_write,
.d_name = "nvram",
};
static int
nvram_open(struct cdev *dev __unused, int flags, int fmt __unused,
struct thread *td)
{
int error = 0;
if (flags & FWRITE)
error = securelevel_gt(td->td_ucred, 0);
return (error);
}
static int
nvram_read(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
v = rtcin(nv_off);
error = uiomove(&v, 1, uio);
}
return (error);
}
static int
nvram_write(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
int i;
uint16_t sum;
/* Assert that we understand the existing checksum first! */
sum = rtcin(NVRAM_FIRST + CKSUM_MSB) << 8 |
rtcin(NVRAM_FIRST + CKSUM_LSB);
for (i = CKSUM_FIRST; i <= CKSUM_LAST; i++)
sum -= rtcin(NVRAM_FIRST + i);
if (sum != 0)
return (EIO);
/* Bring in user data and write */
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
error = uiomove(&v, 1, uio);
writertc(nv_off, v);
}
/* Recalculate checksum afterwards */
sum = 0;
for (i = CKSUM_FIRST; i <= CKSUM_LAST; i++)
sum += rtcin(NVRAM_FIRST + i);
writertc(NVRAM_FIRST + CKSUM_MSB, sum >> 8);
writertc(NVRAM_FIRST + CKSUM_LSB, sum);
return (error);
}
static int
nvram_modevent(module_t mod __unused, int type, void *data __unused)
{
switch (type) {
case MOD_LOAD:
nvram_dev = make_dev(&nvram_cdevsw, 0,
UID_ROOT, GID_KMEM, 0640, "nvram");
break;
case MOD_UNLOAD:
case MOD_SHUTDOWN:
destroy_dev(nvram_dev);
break;
default:
return (EOPNOTSUPP);
}
return (0);
}
DEV_MODULE(nvram, nvram_modevent, NULL);

1
sys/i386/conf/DEFAULTS
View File

@ -15,6 +15,7 @@ device npx
# Pseudo devices.
device mem # Memory and kernel memory devices
device io # I/O device
device nvram # Access to rtc cmos via /dev/nvram
# UART chips on this platform
device uart_ns8250

3
sys/i386/include/clock.h
View File

@ -31,7 +31,8 @@ void i8254_init(void);
int acquire_timer2(int mode);
int release_timer2(void);
int rtcin(int val);
int rtcin(int reg);
void writertc(int reg, unsigned char val);
int sysbeep(int pitch, int period);
void timer_restore(void);
void init_TSC(void);

97
sys/i386/isa/clock.c
View File

@ -438,7 +438,7 @@ rtcin(reg)
return (val);
}
static void
void
writertc(int reg, u_char val)
{
@ -938,99 +938,4 @@ static devclass_t attimer_devclass;
DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
/*
* Linux-style /dev/nvram driver
*
* cmos ram starts at bytes 14 through 128, for a total of 114 bytes.
* bytes 16 through 31 are checksummed at byte 32.
* Unlike Linux, you have to take care of the checksums yourself.
* The driver exposes byte 14 as file offset 0.
*/
#define NVRAM_FIRST RTC_DIAG /* 14 */
#define NVRAM_LAST 128
static d_open_t nvram_open;
static d_read_t nvram_read;
static d_write_t nvram_write;
static struct cdev *nvram_dev;
static struct cdevsw nvram_cdevsw = {
.d_version = D_VERSION,
.d_flags = D_NEEDGIANT,
.d_open = nvram_open,
.d_read = nvram_read,
.d_write = nvram_write,
.d_name = "nvram",
};
static int
nvram_open(struct cdev *dev __unused, int flags, int fmt __unused,
struct thread *td)
{
int error = 0;
if (flags & FWRITE)
error = securelevel_gt(td->td_ucred, 0);
return (error);
}
static int
nvram_read(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
v = rtcin(nv_off);
error = uiomove(&v, 1, uio);
}
return (error);
}
static int
nvram_write(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
error = uiomove(&v, 1, uio);
writertc(nv_off, v);
}
return (error);
}
static int
nvram_modevent(module_t mod __unused, int type, void *data __unused)
{
switch (type) {
case MOD_LOAD:
nvram_dev = make_dev(&nvram_cdevsw, 0,
UID_ROOT, GID_KMEM, 0640, "nvram");
break;
case MOD_UNLOAD:
case MOD_SHUTDOWN:
destroy_dev(nvram_dev);
break;
default:
return (EOPNOTSUPP);
}
return (0);
}
DEV_MODULE(nvram, nvram_modevent, NULL);
#endif /* DEV_ISA */

97
sys/isa/atrtc.c
View File

@ -438,7 +438,7 @@ rtcin(reg)
return (val);
}
static void
void
writertc(int reg, u_char val)
{
@ -938,99 +938,4 @@ static devclass_t attimer_devclass;
DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
/*
* Linux-style /dev/nvram driver
*
* cmos ram starts at bytes 14 through 128, for a total of 114 bytes.
* bytes 16 through 31 are checksummed at byte 32.
* Unlike Linux, you have to take care of the checksums yourself.
* The driver exposes byte 14 as file offset 0.
*/
#define NVRAM_FIRST RTC_DIAG /* 14 */
#define NVRAM_LAST 128
static d_open_t nvram_open;
static d_read_t nvram_read;
static d_write_t nvram_write;
static struct cdev *nvram_dev;
static struct cdevsw nvram_cdevsw = {
.d_version = D_VERSION,
.d_flags = D_NEEDGIANT,
.d_open = nvram_open,
.d_read = nvram_read,
.d_write = nvram_write,
.d_name = "nvram",
};
static int
nvram_open(struct cdev *dev __unused, int flags, int fmt __unused,
struct thread *td)
{
int error = 0;
if (flags & FWRITE)
error = securelevel_gt(td->td_ucred, 0);
return (error);
}
static int
nvram_read(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
v = rtcin(nv_off);
error = uiomove(&v, 1, uio);
}
return (error);
}
static int
nvram_write(struct cdev *dev, struct uio *uio, int flags)
{
int nv_off;
u_char v;
int error = 0;
while (uio->uio_resid > 0 && error == 0) {
nv_off = uio->uio_offset + NVRAM_FIRST;
if (nv_off < NVRAM_FIRST || nv_off >= NVRAM_LAST)
return (0); /* Signal EOF */
/* Single byte at a time */
error = uiomove(&v, 1, uio);
writertc(nv_off, v);
}
return (error);
}
static int
nvram_modevent(module_t mod __unused, int type, void *data __unused)
{
switch (type) {
case MOD_LOAD:
nvram_dev = make_dev(&nvram_cdevsw, 0,
UID_ROOT, GID_KMEM, 0640, "nvram");
break;
case MOD_UNLOAD:
case MOD_SHUTDOWN:
destroy_dev(nvram_dev);
break;
default:
return (EOPNOTSUPP);
}
return (0);
}
DEV_MODULE(nvram, nvram_modevent, NULL);
#endif /* DEV_ISA */

6
sys/modules/Makefile
View File

@ -188,6 +188,7 @@ SUBDIR= ${_3dfx} \
ntfs_iconv \
nullfs \
${_nve} \
${_nvram} \
${_nwfs} \
${_nxge} \
${_oltr} \
@ -202,7 +203,6 @@ SUBDIR= ${_3dfx} \
plip \
${_pmc} \
portalfs \
${_powermac_nvram} \
ppbus \
ppc \
ppi \
@ -399,6 +399,7 @@ _mse= mse
_ncp= ncp
.endif
_ncv= ncv
_nvram= nvram
_ndis= ndis
_nsp= nsp
.if ${MK_NCP} != "no"
@ -519,6 +520,7 @@ _mly= mly
_ndis= ndis
_nfe= nfe
_nve= nve
_nvram= nvram
_nxge= nxge
_pccard= pccard
_rr232x= rr232x
@ -579,7 +581,7 @@ _ath_hal= ath_hal
_ath_rate_amrr= ath_rate_amrr
_ath_rate_onoe= ath_rate_onoe
_ath_rate_sample=ath_rate_sample
_powermac_nvram= powermac_nvram
_nvram= powermac_nvram
_smbfs= smbfs
.endif

8
sys/modules/nvram/Makefile Normal file
View File

@ -0,0 +1,8 @@
# $FreeBSD$
.PATH: ${.CURDIR}/../../dev/nvram
KMOD= nvram
SRCS= nvram.c
.include <bsd.kmod.mk>