Document BUS_DMA_NOCACHE.
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@ -547,6 +547,13 @@ Are as follows:
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.It Dv BUS_DMA_NOWAIT
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The load should not be deferred in case of insufficient mapping resources,
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and instead should return immediately with an appropriate error.
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.It Dv BUS_DMA_NOCACHE
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The allocated memory will not be cached in the processor caches.
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All memory accesses appear on the bus and are executed
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without reordering.
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Currently, the flag is implemented for i386 and amd64 architectures
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only, where it results in the Strong Uncacheable
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PAT to be set for the allocated virtual address range.
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.El
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.El
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.Pp
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