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Improve MPC85XX helper routines.

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- Move CCSR accessors to the shared MPC85XX area
- Simplify SVR version subfield handling
- Adjust OCP
This commit is contained in:
raj 2008-12-17 15:27:49 +00:00
parent ce7791f58d
commit d71801145e
4 changed files with 75 additions and 38 deletions
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18
sys/powerpc/include/spr.h
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@ -560,14 +560,15 @@
#define SPR_MCSRR1 0x23b /* ..8 571 Machine check SRR1 */
#define SPR_SVR 0x3ff /* ..8 1023 System Version Register */
#define SVR_MPC8533 0x803c0010
#define SVR_MPC8533E 0x80340010
#define SVR_MPC8541 0x80720011
#define SVR_MPC8541E 0x807a0011
#define SVR_MPC8555 0x80710011
#define SVR_MPC8555E 0x80790011
#define SVR_MPC8572 0x80e00010
#define SVR_MPC8572E 0x80e80010
#define SVR_MPC8533 0x803c
#define SVR_MPC8533E 0x8034
#define SVR_MPC8541 0x8072
#define SVR_MPC8541E 0x807a
#define SVR_MPC8555 0x8071
#define SVR_MPC8555E 0x8079
#define SVR_MPC8572 0x80e0
#define SVR_MPC8572E 0x80e8
#define SVR_VER(svr) (((svr) >> 16) & 0xffff)
#define SPR_PID0 0x030 /* ..8 Process ID Register 0 */
#define SPR_PID1 0x279 /* ..8 Process ID Register 1 */
@ -623,5 +624,4 @@
#endif /* #elif defined(E500) */
#endif /* !_POWERPC_SPR_H_ */

34
sys/powerpc/mpc85xx/mpc85xx.c
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@ -38,33 +38,51 @@ __FBSDID("$FreeBSD$");
#include <machine/cpu.h>
#include <machine/cpufunc.h>
#include <machine/pio.h>
#include <machine/spr.h>
#include <powerpc/mpc85xx/ocpbus.h>
#include <powerpc/mpc85xx/mpc85xx.h>
/*
* MPC85xx system specific routines
*/
void
cpu_reset()
uint32_t
ccsr_read4(uintptr_t addr)
{
uint32_t svr = mfspr(SPR_SVR);
volatile uint32_t *ptr = (void *)addr;
if (svr == SVR_MPC8572E || svr == SVR_MPC8572)
return (*ptr);
}
void
ccsr_write4(uintptr_t addr, uint32_t val)
{
volatile uint32_t *ptr = (void *)addr;
*ptr = val;
__asm __volatile("eieio; sync");
}
void
cpu_reset(void)
{
uint32_t ver = SVR_VER(mfspr(SPR_SVR));
if (ver == SVR_MPC8572E || ver == SVR_MPC8572)
/* Systems with dedicated reset register */
out32(OCP85XX_RSTCR, 2);
ccsr_write4(OCP85XX_RSTCR, 2);
else {
/* Clear DBCR0, disables debug interrupts and events. */
mtspr(SPR_DBCR0, 0);
__asm volatile("isync");
__asm __volatile("isync");
/* Enable Debug Interrupts in MSR. */
mtmsr(mfmsr() | PSL_DE);
/* Enable debug interrupts and issue reset. */
mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM |
DBCR0_RST_SYSTEM);
}
printf("Reset failed...\n");

35
sys/powerpc/mpc85xx/mpc85xx.h Normal file
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@ -0,0 +1,35 @@
/*-
* Copyright (C) 2008 Semihalf, Rafal Jaworowski
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MPC85XX_H_
#define _MPC85XX_H_
uint32_t ccsr_read4(uintptr_t addr);
void ccsr_write4(uintptr_t addr, uint32_t val);
#endif /* _MPC85XX_H_ */

26
sys/powerpc/mpc85xx/ocpbus.c
View File

@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
#include <machine/bootinfo.h>
#include <powerpc/mpc85xx/ocpbus.h>
#include <powerpc/mpc85xx/mpc85xx.h>
#include "pic_if.h"
@ -115,23 +116,6 @@ DRIVER_MODULE(ocpbus, nexus, ocpbus_driver, ocpbus_devclass, 0, 0);
static int law_max = 0;
static __inline uint32_t
ccsr_read4(uintptr_t addr)
{
volatile uint32_t *ptr = (void *)addr;
return (*ptr);
}
static __inline void
ccsr_write4(uintptr_t addr, uint32_t val)
{
volatile uint32_t *ptr = (void *)addr;
*ptr = val;
__asm __volatile("eieio; sync");
}
static device_t
ocpbus_mk_child(device_t dev, int type, int unit)
{
@ -230,15 +214,15 @@ ocpbus_write_law(int trgt, int type, u_long *startp, u_long *countp)
}
static int
ocpbus_probe (device_t dev)
ocpbus_probe(device_t dev)
{
struct ocpbus_softc *sc;
uint32_t svr;
uint32_t ver;
sc = device_get_softc(dev);
svr = mfspr(SPR_SVR);
if (svr == SVR_MPC8572E || svr == SVR_MPC8572)
ver = SVR_VER(mfspr(SPR_SVR));
if (ver == SVR_MPC8572E || ver == SVR_MPC8572)
law_max = 12;
else
law_max = 8;