Add support for the VIA 8237 (both PATA and SATA part).
Cleanup the SATA support a bit now we are here anyways.
This commit is contained in:
sos
parent
b46a641096
commit
d72fb90a16
@ -167,6 +167,14 @@ ata_generic_setmode(struct ata_device *atadev, int mode)
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atadev->mode = mode;
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}
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static void
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ata_sata_setmode(struct ata_device *atadev, int mode)
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{
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mode = ata_limit_mode(atadev, mode, ATA_DMA_MAX);
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if (!ata_controlcmd(atadev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode))
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atadev->mode = mode;
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}
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/*
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* Acard chipset support functions
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*/
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@ -819,8 +827,10 @@ ata_intel_chipinit(device_t dev)
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if (ctlr->chip->chipid == ATA_I82371FB)
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ctlr->setmode = ata_intel_old_setmode;
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else
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else if (ctlr->chip->max_dma < ATA_SA150)
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ctlr->setmode = ata_intel_new_setmode;
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else
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ctlr->setmode = ata_sata_setmode;
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return 0;
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}
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@ -849,8 +859,7 @@ ata_intel_new_setmode(struct ata_device *atadev, int mode)
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mode = ata_limit_mode(atadev, mode, ctlr->chip->max_dma);
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if (ctlr->chip->max_dma < ATA_SA150 && mode > ATA_UDMA2 &&
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!(reg54 & (0x10 << devno))) {
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if ( mode > ATA_UDMA2 && !(reg54 & (0x10 << devno))) {
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ata_prtdev(atadev,"DMA limited to UDMA33, non-ATA66 cable or device\n");
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mode = ATA_UDMA2;
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}
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@ -864,47 +873,46 @@ ata_intel_new_setmode(struct ata_device *atadev, int mode)
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if (error)
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return;
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if (ctlr->chip->max_dma < ATA_SA150) {
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if (mode >= ATA_UDMA0) {
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pci_write_config(parent, 0x48, reg48 | (0x0001 << devno), 2);
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pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (devno<<2))) |
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(0x01 + !(mode & 0x01)), 2);
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}
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else {
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pci_write_config(parent, 0x48, reg48 & ~(0x0001 << devno), 2);
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pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (devno << 2))), 2);
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}
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if (mode >= ATA_UDMA2)
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pci_write_config(parent, 0x54, reg54 | (0x1 << devno), 2);
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else
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pci_write_config(parent, 0x54, reg54 & ~(0x1 << devno), 2);
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if (mode >= ATA_UDMA5)
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pci_write_config(parent, 0x54, reg54 | (0x10000 << devno), 2);
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else
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pci_write_config(parent, 0x54, reg54 & ~(0x10000 << devno), 2);
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reg40 &= ~0x00ff00ff;
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reg40 |= 0x40774077;
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if (atadev->unit == ATA_MASTER) {
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mask40 = 0x3300;
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new40 = timings[ata_mode2idx(mode)] << 8;
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}
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else {
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mask44 = 0x0f;
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new44 = ((timings[ata_mode2idx(mode)] & 0x30) >> 2) |
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(timings[ata_mode2idx(mode)] & 0x03);
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}
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if (atadev->channel->unit) {
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mask40 <<= 16;
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new40 <<= 16;
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mask44 <<= 4;
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new44 <<= 4;
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}
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pci_write_config(parent, 0x40, (reg40 & ~mask40) | new40, 4);
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pci_write_config(parent, 0x44, (reg44 & ~mask44) | new44, 1);
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if (mode >= ATA_UDMA0) {
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pci_write_config(parent, 0x48, reg48 | (0x0001 << devno), 2);
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pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (devno<<2))) |
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(0x01 + !(mode & 0x01)), 2);
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}
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else {
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pci_write_config(parent, 0x48, reg48 & ~(0x0001 << devno), 2);
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pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (devno << 2))), 2);
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}
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if (mode >= ATA_UDMA2)
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pci_write_config(parent, 0x54, reg54 | (0x1 << devno), 2);
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else
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pci_write_config(parent, 0x54, reg54 & ~(0x1 << devno), 2);
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if (mode >= ATA_UDMA5)
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pci_write_config(parent, 0x54, reg54 | (0x10000 << devno), 2);
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else
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pci_write_config(parent, 0x54, reg54 & ~(0x10000 << devno), 2);
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reg40 &= ~0x00ff00ff;
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reg40 |= 0x40774077;
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if (atadev->unit == ATA_MASTER) {
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mask40 = 0x3300;
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new40 = timings[ata_mode2idx(mode)] << 8;
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}
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else {
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mask44 = 0x0f;
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new44 = ((timings[ata_mode2idx(mode)] & 0x30) >> 2) |
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(timings[ata_mode2idx(mode)] & 0x03);
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}
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if (atadev->channel->unit) {
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mask40 <<= 16;
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new40 <<= 16;
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mask44 <<= 4;
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new44 <<= 4;
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}
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pci_write_config(parent, 0x40, (reg40 & ~mask40) | new40, 4);
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pci_write_config(parent, 0x44, (reg44 & ~mask44) | new44, 1);
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atadev->mode = mode;
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}
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@ -1199,11 +1207,12 @@ ata_promise_mio_allocate(device_t dev, struct ata_channel *ch)
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ch->r_io[ATA_BMDTP_PORT].res = ctlr->r_io2;
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ch->r_io[ATA_BMDTP_PORT].offset = 0x244 + (ch->unit << 7);
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ch->r_io[ATA_BMDEVSPEC_0].res = ctlr->r_io2;
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ch->r_io[ATA_BMDEVSPEC_0].offset = (ch->unit << 2);
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ch->r_io[ATA_BMDEVSPEC_0].offset = ((ch->unit + 1) << 2);
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ch->r_io[ATA_IDX_ADDR].res = ctlr->r_io2;
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ATA_IDX_OUTL(ch, ATA_BMCMD_PORT,
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(ATA_IDX_INL(ch, ATA_BMCMD_PORT) & ~0x00000f8f) | ch->unit);
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(ATA_IDX_INL(ch, ATA_BMCMD_PORT) & ~0x00003f9f) |
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(ch->unit + 1));
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ATA_IDX_OUTL(ch, ATA_BMDEVSPEC_0, 0x00000001);
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ch->flags |= (ATA_NO_SLAVE | ATA_USE_16BIT);
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@ -1274,9 +1283,12 @@ ata_promise_mio_intr(void *data)
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irq_vector = ATA_INL(ctlr->r_io2, 0x0040);
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for (unit = 0; unit < ctlr->channels; unit++) {
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if (irq_vector & (1 << unit)) {
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if (irq_vector & (1 << (unit + 1))) {
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if ((ch = ctlr->interrupt[unit].argument)) {
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ctlr->interrupt[unit].function(ch);
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ATA_IDX_OUTL(ch, ATA_BMCMD_PORT,
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(ATA_IDX_INL(ch, ATA_BMCMD_PORT) & ~0x00003f9f) |
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(ch->unit + 1));
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ATA_IDX_OUTL(ch, ATA_BMDEVSPEC_0, 0x00000001);
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}
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}
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@ -1619,7 +1631,10 @@ ata_sii_chipinit(device_t dev)
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pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0x3f), 1);
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ctlr->allocate = ata_sii_mio_allocate;
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ctlr->setmode = ata_sii_setmode;
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if (ctlr->chip->max_dma >= ATA_SA150)
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ctlr->setmode = ata_sata_setmode;
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else
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ctlr->setmode = ata_sii_setmode;
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}
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else {
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if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS,
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@ -1735,7 +1750,7 @@ ata_sii_setmode(struct ata_device *atadev, int mode)
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int rego = (atadev->channel->unit << 4) + (ATA_DEV(atadev->unit) << 1);
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int mreg = atadev->channel->unit ? 0x84 : 0x80;
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int mask = 0x03 << (ATA_DEV(atadev->unit) << 2);
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int mval;
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int mval = pci_read_config(parent, mreg, 1) & ~mask;
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int error;
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mode = ata_limit_mode(atadev, mode, ctlr->chip->max_dma);
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@ -1743,12 +1758,10 @@ ata_sii_setmode(struct ata_device *atadev, int mode)
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if (ctlr->chip->max_dma < ATA_UDMA2) {
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mode = ata_check_80pin(atadev, mode);
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}
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else if (ctlr->chip->max_dma < ATA_SA150 && mode > ATA_UDMA2 &&
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(pci_read_config(parent, 0x79, 1) &
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(atadev->channel->unit ? 0x02 : 0x01))) {
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ata_prtdev(atadev,
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"DMA limited to UDMA33, non-ATA66 cable or device\n");
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mode = ATA_UDMA2;
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else if (mode > ATA_UDMA2 && (pci_read_config(parent, 0x79, 1) &
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(atadev->channel->unit ? 0x02 : 0x01))) {
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ata_prtdev(atadev,"DMA limited to UDMA33, non-ATA66 cable or device\n");
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mode = ATA_UDMA2;
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}
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error = ata_controlcmd(atadev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
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@ -1757,41 +1770,36 @@ ata_sii_setmode(struct ata_device *atadev, int mode)
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ata_prtdev(atadev, "%ssetting %s on %s chip\n",
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(error) ? "FAILURE " : "",
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ata_mode2str(mode), ctlr->chip->text);
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if (error)
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return;
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mval = pci_read_config(parent, mreg, 1) & ~mask;
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if (mode >= ATA_UDMA0) {
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u_int8_t udmatimings[] = { 0xf, 0xb, 0x7, 0x5, 0x3, 0x2, 0x1 };
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u_int8_t ureg = 0xac + rego;
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if (ctlr->chip->max_dma < ATA_SA150) {
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if (mode >= ATA_UDMA0) {
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u_int8_t udmatimings[] = { 0xf, 0xb, 0x7, 0x5, 0x3, 0x2, 0x1 };
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u_int8_t ureg = 0xac + rego;
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pci_write_config(parent, mreg,
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mval | (0x03 << (ATA_DEV(atadev->unit) << 2)), 1);
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pci_write_config(parent, ureg,
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(pci_read_config(parent, ureg, 1) & ~0x3f) |
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udmatimings[mode & ATA_MODE_MASK], 1);
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pci_write_config(parent, mreg,
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mval | (0x03 << (ATA_DEV(atadev->unit) << 2)), 1);
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pci_write_config(parent, ureg,
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(pci_read_config(parent, ureg, 1) & ~0x3f) |
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udmatimings[mode & ATA_MODE_MASK], 1);
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}
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else if (mode >= ATA_WDMA0) {
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u_int8_t dreg = 0xa8 + rego;
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u_int16_t dmatimings[] = { 0x2208, 0x10c2, 0x10c1 };
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}
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else if (mode >= ATA_WDMA0) {
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u_int8_t dreg = 0xa8 + rego;
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u_int16_t dmatimings[] = { 0x2208, 0x10c2, 0x10c1 };
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pci_write_config(parent, mreg,
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mval | (0x02 << (ATA_DEV(atadev->unit) << 2)), 1);
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pci_write_config(parent, dreg, dmatimings[mode & ATA_MODE_MASK], 2);
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pci_write_config(parent, mreg,
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mval | (0x02 << (ATA_DEV(atadev->unit) << 2)), 1);
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pci_write_config(parent, dreg, dmatimings[mode & ATA_MODE_MASK], 2);
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}
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else {
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u_int8_t preg = 0xa4 + rego;
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u_int16_t piotimings[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
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}
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else {
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u_int8_t preg = 0xa4 + rego;
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u_int16_t piotimings[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
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pci_write_config(parent, mreg,
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mval | (0x01 << (ATA_DEV(atadev->unit) << 2)), 1);
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pci_write_config(parent, preg, piotimings[mode & ATA_MODE_MASK], 2);
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}
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pci_write_config(parent, mreg,
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mval | (0x01 << (ATA_DEV(atadev->unit) << 2)), 1);
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pci_write_config(parent, preg, piotimings[mode & ATA_MODE_MASK], 2);
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}
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atadev->mode = mode;
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}
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@ -2059,11 +2067,21 @@ ata_via_ident(device_t dev)
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{ ATA_VIA8233C, 0x00, VIA100, 0x00, ATA_UDMA5, "VIA 8233C" },
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{ ATA_VIA8233A, 0x00, VIA133, 0x00, ATA_UDMA6, "VIA 8233A" },
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{ ATA_VIA8235, 0x00, VIA133, 0x00, ATA_UDMA6, "VIA 8235" },
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{ ATA_VIA8237, 0x00, VIA133, 0x00, ATA_UDMA6, "VIA 8237" },
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{ 0, 0, 0, 0, 0, 0 }};
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static struct ata_chip_id new_ids[] =
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{{ ATA_VIA8237, 0x00, 0x00, 0x00, ATA_SA150, "VIA 8237" },
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{ 0, 0, 0, 0, 0, 0 }};
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char buffer[64];
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if (!(idx = ata_find_chip(dev, ids, pci_get_slot(dev))))
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return ENXIO;
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if (pci_get_devid(dev) == ATA_VIA82C571) {
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if (!(idx = ata_find_chip(dev, ids, pci_get_slot(dev))))
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return ENXIO;
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}
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else {
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if (!(idx = ata_match_chip(dev, new_ids)))
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return ENXIO;
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}
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sprintf(buffer, "%s %s controller", idx->text, ata_mode2str(idx->max_dma));
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device_set_desc_copy(dev, buffer);
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@ -2080,6 +2098,11 @@ ata_via_chipinit(device_t dev)
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if (ata_setup_interrupt(dev))
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return ENXIO;
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if (ctlr->chip->max_dma >= ATA_SA150) {
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ctlr->setmode = ata_sata_setmode;
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return 0;
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}
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/* prepare for ATA-66 on the 82C686a and 82C596b */
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if (ctlr->chip->cfg2 & VIACLK)
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pci_write_config(dev, 0x50, 0x030b030b, 4);
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@ -217,6 +217,7 @@ struct ata_pci_controller {
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#define ATA_VIA8233A 0x31471106
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#define ATA_VIA8233C 0x31091106
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#define ATA_VIA8235 0x31771106
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#define ATA_VIA8237 0x31491106
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#define ATA_VIA8361 0x31121106
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#define ATA_VIA8363 0x03051106
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#define ATA_VIA8371 0x03911106
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