- sparc64/fhc/fhc.c:
Change fhc(4) to use IRQ numbers instead of RIDs for allocating the IRQs of children. This works similar to e.g. sbus(4), i.e. add the IRQ resources as fully specified to the resource lists of the children, allocate them like normal. When establishing the interrupt search the interrupt maps of the children for a matching INO to determine which map we need to write the fully specified interrupt number to and to enable the mapping (before the RID was used to indicate which interrupt map to use). - dev/puc/puc.c: Revert rev. 1.38, with the above change fhc(4) no longer needs special treatment for allocating IRQs. Thanks to: joerg for providing access to an E3500
This commit is contained in:
marius
parent
ee7224dfdd
commit
d730e7dc0a
@ -97,10 +97,6 @@ __FBSDID("$FreeBSD$");
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#ifdef __sparc64__
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#include <sparc64/fhc/fhcreg.h>
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#endif
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#define PUC_ENTRAILS 1
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#include <dev/puc/pucvar.h>
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@ -193,12 +189,7 @@ puc_attach(device_t dev, const struct puc_device_description *desc)
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printf("puc: name: %s\n", sc->sc_desc.name);
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#endif
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rid = 0;
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#ifdef __sparc64__
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if (strcmp(device_get_name(device_get_parent(dev)), "fhc") == 0)
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rid = FHC_UART;
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#endif
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res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (!res)
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@ -85,7 +85,10 @@ fhc_attach(device_t dev)
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bus_addr_t off;
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device_t cdev;
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uint32_t ctrl;
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uint32_t *intr;
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uint32_t iv;
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char *name;
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int nintr;
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int nreg;
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int i;
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@ -154,6 +157,17 @@ fhc_attach(device_t dev)
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}
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free(reg, M_OFWPROP);
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}
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nintr = OF_getprop_alloc(child, "interrupts",
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sizeof(*intr), (void **)&intr);
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if (nintr != -1) {
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for (i = 0; i < nintr; i++) {
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iv = INTINO(intr[i]) |
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(sc->sc_ign << INTMAP_IGN_SHIFT);
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resource_list_add(&fdi->fdi_rl,
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SYS_RES_IRQ, i, iv, iv, 1);
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}
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free(intr, M_OFWPROP);
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}
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device_set_ivars(cdev, fdi);
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} else
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free(name, M_OFWPROP);
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@ -172,6 +186,7 @@ fhc_print_child(device_t dev, device_t child)
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rv = bus_print_child_header(dev, child);
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rv += resource_list_print_type(&fdi->fdi_rl, "mem",
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SYS_RES_MEMORY, "%#lx");
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rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
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rv += bus_print_child_footer(dev, child);
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return (rv);
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}
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@ -184,6 +199,7 @@ fhc_probe_nomatch(device_t dev, device_t child)
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fdi = device_get_ivars(child);
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device_printf(dev, "<%s>", fdi->fdi_name);
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resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY, "%#lx");
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resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
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printf(" type %s (no driver attached)\n",
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fdi->fdi_type != NULL ? fdi->fdi_type : "unknown");
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}
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@ -194,23 +210,41 @@ fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
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{
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struct fhc_softc *sc;
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struct fhc_clr *fc;
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bus_space_tag_t bt;
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bus_space_handle_t bh;
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int error;
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int rid;
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int i;
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long vec;
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uint32_t inr;
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sc = device_get_softc(bus);
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rid = rman_get_rid(r);
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vec = rman_get_start(r);
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bt = NULL;
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bh = 0;
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inr = 0;
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for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
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if (INTINO(bus_space_read_4(sc->sc_bt[i], sc->sc_bh[i],
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FHC_IMAP)) == INTINO(vec)){
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bt = sc->sc_bt[i];
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bh = sc->sc_bh[i];
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inr = INTINO(vec) | (sc->sc_ign << INTMAP_IGN_SHIFT);
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break;
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}
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}
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if (inr == 0)
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return (0);
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fc = malloc(sizeof(*fc), M_DEVBUF, M_WAITOK | M_ZERO);
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if (fc == NULL)
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return (0);
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fc->fc_func = func;
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fc->fc_arg = arg;
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fc->fc_bt = sc->sc_bt[rid];
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fc->fc_bh = sc->sc_bh[rid];
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fc->fc_bt = bt;
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fc->fc_bh = bh;
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bus_space_write_4(sc->sc_bt[rid], sc->sc_bh[rid], FHC_IMAP,
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rman_get_start(r));
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bus_space_read_4(sc->sc_bt[rid], sc->sc_bh[rid], FHC_IMAP);
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bus_space_write_4(bt, bh, FHC_IMAP, inr);
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bus_space_read_4(bt, bh, FHC_IMAP);
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error = bus_generic_setup_intr(bus, child, r, flags, fhc_intr_stub,
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fc, cookiep);
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@ -221,10 +255,9 @@ fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
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fc->fc_cookie = *cookiep;
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*cookiep = fc;
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bus_space_write_4(sc->sc_bt[rid], sc->sc_bh[rid], FHC_ICLR, 0x0);
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bus_space_write_4(sc->sc_bt[rid], sc->sc_bh[rid], FHC_IMAP,
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INTMAP_ENABLE(rman_get_start(r), PCPU_GET(mid)));
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bus_space_read_4(sc->sc_bt[rid], sc->sc_bh[rid], FHC_IMAP);
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bus_space_write_4(bt, bh, FHC_ICLR, 0x0);
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bus_space_write_4(bt, bh, FHC_IMAP, INTMAP_ENABLE(inr, PCPU_GET(mid)));
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bus_space_read_4(bt, bh, FHC_IMAP);
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return (error);
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}
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@ -266,43 +299,28 @@ fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
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bus_addr_t cend;
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bus_addr_t phys;
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int isdefault;
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uint32_t map;
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uint32_t vec;
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int i;
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isdefault = (start == 0UL && end == ~0UL);
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res = NULL;
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sc = device_get_softc(bus);
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fdi = device_get_ivars(child);
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rle = resource_list_find(&fdi->fdi_rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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if (rle->res != NULL)
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panic("%s: resource entry is busy", __func__);
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if (isdefault) {
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start = rle->start;
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count = ulmax(count, rle->count);
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end = ulmax(rle->end, start + count - 1);
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}
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switch (type) {
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case SYS_RES_IRQ:
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if (!isdefault || count != 1 || *rid < FHC_FANFAIL ||
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*rid > FHC_TOD)
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break;
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map = bus_space_read_4(sc->sc_bt[*rid], sc->sc_bh[*rid],
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FHC_IMAP);
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vec = INTINO(map) | (sc->sc_ign << INTMAP_IGN_SHIFT);
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bus_space_write_4(sc->sc_bt[*rid], sc->sc_bh[*rid],
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FHC_IMAP, vec);
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bus_space_read_4(sc->sc_bt[*rid], sc->sc_bh[*rid], FHC_IMAP);
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res = bus_generic_alloc_resource(bus, child, type, rid,
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vec, vec, 1, flags);
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if (res != NULL)
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rman_set_rid(res, *rid);
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start, end, count, flags);
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break;
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case SYS_RES_MEMORY:
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fdi = device_get_ivars(child);
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rle = resource_list_find(&fdi->fdi_rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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if (rle->res != NULL)
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panic("%s: resource entry is busy", __func__);
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if (isdefault) {
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start = rle->start;
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count = ulmax(count, rle->count);
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end = ulmax(rle->end, start + count - 1);
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}
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for (i = 0; i < sc->sc_nrange; i++) {
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coffset = sc->sc_ranges[i].coffset;
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cend = coffset + sc->sc_ranges[i].size - 1;
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@ -334,7 +352,7 @@ fhc_release_resource(device_t bus, device_t child, int type, int rid,
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int error;
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error = bus_generic_release_resource(bus, child, type, rid, r);
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if (type != SYS_RES_MEMORY || error != 0)
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if (error != 0)
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return (error);
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fdi = device_get_ivars(child);
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rle = resource_list_find(&fdi->fdi_rl, type, rid);
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