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Another round of merge.

Browse Source 
Submitted by:	The FreeBSD(98) Development Team
This commit is contained in:
asami 1996-07-30 18:56:16 +00:00
parent 63ae415aca
commit d7ae9a48c3
10 changed files with 1307 additions and 98 deletions
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16
sys/pc98/cbus/fdc.c
View File

@ -43,7 +43,7 @@
* SUCH DAMAGE.
*
* from: @(#)fd.c 7.4 (Berkeley) 5/25/91
* $Id: fd.c,v 1.1.1.1 1996/06/14 10:04:43 asami Exp $
* $Id: fd.c,v 1.2 1996/07/23 07:46:11 asami Exp $
*
*/
@ -64,7 +64,6 @@
#include <machine/clock.h>
#include <machine/ioctl_fd.h>
#include <sys/disklabel.h>
#include <sys/diskslice.h>
#include <sys/buf.h>
#include <sys/uio.h>
#include <sys/malloc.h>
@ -471,16 +470,11 @@ static d_strategy_t fdstrategy;
#define CDEV_MAJOR 9
#define BDEV_MAJOR 2
extern struct cdevsw fd_cdevsw;
static struct cdevsw fd_cdevsw;
static struct bdevsw fd_bdevsw =
{ Fdopen, fdclose, fdstrategy, fdioctl, /*2*/
nodump, nopsize, 0, "fd", &fd_cdevsw, -1 };
static struct cdevsw fd_cdevsw =
{ Fdopen, fdclose, rawread, rawwrite, /*9*/
fdioctl, nostop, nullreset, nodevtotty,
seltrue, nommap, fdstrategy, "fd",
&fd_bdevsw, -1 };
#ifdef PC98
static struct pc98_device *fdcdevs[NFDC];
@ -2460,13 +2454,9 @@ static fd_devsw_installed = 0;
static void fd_drvinit(void *notused )
{
dev_t dev;
if( ! fd_devsw_installed ) {
dev = makedev(CDEV_MAJOR, 0);
cdevsw_add(&dev,&fd_cdevsw, NULL);
dev = makedev(BDEV_MAJOR, 0);
bdevsw_add(&dev,&fd_bdevsw, NULL);
bdevsw_add_generic(BDEV_MAJOR,CDEV_MAJOR, &fd_bdevsw);
fd_devsw_installed = 1;
}
}

16
sys/pc98/pc98/fd.c
View File

@ -43,7 +43,7 @@
* SUCH DAMAGE.
*
* from: @(#)fd.c 7.4 (Berkeley) 5/25/91
* $Id: fd.c,v 1.1.1.1 1996/06/14 10:04:43 asami Exp $
* $Id: fd.c,v 1.2 1996/07/23 07:46:11 asami Exp $
*
*/
@ -64,7 +64,6 @@
#include <machine/clock.h>
#include <machine/ioctl_fd.h>
#include <sys/disklabel.h>
#include <sys/diskslice.h>
#include <sys/buf.h>
#include <sys/uio.h>
#include <sys/malloc.h>
@ -471,16 +470,11 @@ static d_strategy_t fdstrategy;
#define CDEV_MAJOR 9
#define BDEV_MAJOR 2
extern struct cdevsw fd_cdevsw;
static struct cdevsw fd_cdevsw;
static struct bdevsw fd_bdevsw =
{ Fdopen, fdclose, fdstrategy, fdioctl, /*2*/
nodump, nopsize, 0, "fd", &fd_cdevsw, -1 };
static struct cdevsw fd_cdevsw =
{ Fdopen, fdclose, rawread, rawwrite, /*9*/
fdioctl, nostop, nullreset, nodevtotty,
seltrue, nommap, fdstrategy, "fd",
&fd_bdevsw, -1 };
#ifdef PC98
static struct pc98_device *fdcdevs[NFDC];
@ -2460,13 +2454,9 @@ static fd_devsw_installed = 0;
static void fd_drvinit(void *notused )
{
dev_t dev;
if( ! fd_devsw_installed ) {
dev = makedev(CDEV_MAJOR, 0);
cdevsw_add(&dev,&fd_cdevsw, NULL);
dev = makedev(BDEV_MAJOR, 0);
bdevsw_add(&dev,&fd_bdevsw, NULL);
bdevsw_add_generic(BDEV_MAJOR,CDEV_MAJOR, &fd_bdevsw);
fd_devsw_installed = 1;
}
}

805
sys/pc98/pc98/if_ed98.h Normal file
View File

@ -0,0 +1,805 @@
/*
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* PC-9801 specific definitions for National Semiconductor DP8390 NIC
*/
#ifndef __PC98_PC98_IF_ED98_H__
#define __PC98_PC98_IF_ED98_H__
/* PC98 only */
#ifndef PC98
#error Why you include if_ed98.h?
#endif
static void pc98_set_register __P((struct pc98_device *dev,
int unit, int type));
/*
* Vendor types
*/
#define ED_VENDOR_MISC 0xf0 /* others */
/*
* Register offsets/total
*/
#ifdef ED_NOVELL_NIC_OFFSET
#undef ED_NOVELL_NIC_OFFSET
#endif
#define ED_NOVELL_NIC_OFFSET ed_novell_nic_offset[unit]
#ifdef ED_NOVELL_ASIC_OFFSET
#undef ED_NOVELL_ASIC_OFFSET
#endif
#define ED_NOVELL_ASIC_OFFSET ed_novell_asic_offset[unit]
/*
* Remote DMA data register; for reading or writing to the NIC mem
* via programmed I/O (offset from ASIC base)
*/
#ifdef ED_NOVELL_DATA
#undef ED_NOVELL_DATA
#endif
#define ED_NOVELL_DATA ed_novell_data[unit]
/*
* Reset register; reading from this register causes a board reset
*/
#ifdef ED_NOVELL_RESET
#undef ED_NOVELL_RESET
#endif
#define ED_NOVELL_RESET ed_novell_reset[unit]
/*
* Card type
*
* Type Card
* 0 Allied Telesis CenterCom LA-98-T
* 1 MELCO LPC-TJ, LPC-TS / IO-DATA PCLA/T
* 2 PLANET SMART COM 98 EN-2298 / ELECOM LANEED LD-BDN[123]A
* 3 MELCO EGY-98
* 4 MELCO LGY-98, IND-SP, IND-SS / MACNICA NE2098(XXX)
* 5 ICM DT-ET-25, DT-ET-T5, IF-2766ET, IF-2771ET /
* D-Link DE-298P{T,CAT}, DE-298{T,TP,CAT}
* 6 Allied Telesis SIC-98
* 8 NEC PC-9801-108
* 9 IO-DATA LA-98
*/
#define ED_TYPE98_BASE 0x10
#define ED_TYPE98_GENERIC 0x10
#define ED_TYPE98_LPC 0x11
#define ED_TYPE98_BDN 0x12
#define ED_TYPE98_EGY 0x13
#define ED_TYPE98_LGY 0x14
#define ED_TYPE98_ICM 0x15
#define ED_TYPE98_SIC 0x16
#define ED_TYPE98_108 0x18
#define ED_TYPE98_LA98 0x19
#define ED_TYPE98(x) (((x->id_flags & 0xffff0000) >> 16) | ED_TYPE98_BASE)
/*
* Page 0 register offsets
*/
#undef ED_P0_CR
#define ED_P0_CR edp[unit][0x00]
#undef ED_P0_CLDA0
#define ED_P0_CLDA0 edp[unit][0x01]
#undef ED_P0_PSTART
#define ED_P0_PSTART edp[unit][0x01]
#undef ED_P0_CLDA1
#define ED_P0_CLDA1 edp[unit][0x02]
#undef ED_P0_PSTOP
#define ED_P0_PSTOP edp[unit][0x02]
#undef ED_P0_BNRY
#define ED_P0_BNRY edp[unit][0x03]
#undef ED_P0_TSR
#define ED_P0_TSR edp[unit][0x04]
#undef ED_P0_TPSR
#define ED_P0_TPSR edp[unit][0x04]
#undef ED_P0_NCR
#define ED_P0_NCR edp[unit][0x05]
#undef ED_P0_TBCR0
#define ED_P0_TBCR0 edp[unit][0x05]
#undef ED_P0_FIFO
#define ED_P0_FIFO edp[unit][0x06]
#undef ED_P0_TBCR1
#define ED_P0_TBCR1 edp[unit][0x06]
#undef ED_P0_ISR
#define ED_P0_ISR edp[unit][0x07]
#undef ED_P0_CRDA0
#define ED_P0_CRDA0 edp[unit][0x08]
#undef ED_P0_RSAR0
#define ED_P0_RSAR0 edp[unit][0x08]
#undef ED_P0_CRDA1
#define ED_P0_CRDA1 edp[unit][0x09]
#undef ED_P0_RSAR1
#define ED_P0_RSAR1 edp[unit][0x09]
#undef ED_P0_RBCR0
#define ED_P0_RBCR0 edp[unit][0x0a]
#undef ED_P0_RBCR1
#define ED_P0_RBCR1 edp[unit][0x0b]
#undef ED_P0_RSR
#define ED_P0_RSR edp[unit][0x0c]
#undef ED_P0_RCR
#define ED_P0_RCR edp[unit][0x0c]
#undef ED_P0_CNTR0
#define ED_P0_CNTR0 edp[unit][0x0d]
#undef ED_P0_TCR
#define ED_P0_TCR edp[unit][0x0d]
#undef ED_P0_CNTR1
#define ED_P0_CNTR1 edp[unit][0x0e]
#undef ED_P0_DCR
#define ED_P0_DCR edp[unit][0x0e]
#undef ED_P0_CNTR2
#define ED_P0_CNTR2 edp[unit][0x0f]
#undef ED_P0_IMR
#define ED_P0_IMR edp[unit][0x0f]
/*
* Page 1 register offsets
*/
#undef ED_P1_CR
#define ED_P1_CR edp[unit][0x00]
#undef ED_P1_PAR0
#define ED_P1_PAR0 edp[unit][0x01]
#undef ED_P1_PAR1
#define ED_P1_PAR1 edp[unit][0x02]
#undef ED_P1_PAR2
#define ED_P1_PAR2 edp[unit][0x03]
#undef ED_P1_PAR3
#define ED_P1_PAR3 edp[unit][0x04]
#undef ED_P1_PAR4
#define ED_P1_PAR4 edp[unit][0x05]
#undef ED_P1_PAR5
#define ED_P1_PAR5 edp[unit][0x06]
#undef ED_P1_CURR
#define ED_P1_CURR edp[unit][0x07]
#undef ED_P1_MAR0
#define ED_P1_MAR0 edp[unit][0x08]
#undef ED_P1_MAR1
#define ED_P1_MAR1 edp[unit][0x09]
#undef ED_P1_MAR2
#define ED_P1_MAR2 edp[unit][0x0a]
#undef ED_P1_MAR3
#define ED_P1_MAR3 edp[unit][0x0b]
#undef ED_P1_MAR4
#define ED_P1_MAR4 edp[unit][0x0c]
#undef ED_P1_MAR5
#define ED_P1_MAR5 edp[unit][0x0d]
#undef ED_P1_MAR6
#define ED_P1_MAR6 edp[unit][0x0e]
#undef ED_P1_MAR7
#define ED_P1_MAR7 edp[unit][0x0f]
/*
* Page 2 register offsets
*/
#undef ED_P2_CR
#define ED_P2_CR edp[unit][0x00]
#undef ED_P2_PSTART
#define ED_P2_PSTART edp[unit][0x01]
#undef ED_P2_CLDA0
#define ED_P2_CLDA0 edp[unit][0x01]
#undef ED_P2_PSTOP
#define ED_P2_PSTOP edp[unit][0x02]
#undef ED_P2_CLDA1
#define ED_P2_CLDA1 edp[unit][0x02]
#undef ED_P2_RNPP
#define ED_P2_RNPP edp[unit][0x03]
#undef ED_P2_TPSR
#define ED_P2_TPSR edp[unit][0x04]
#undef ED_P2_LNPP
#define ED_P2_LNPP edp[unit][0x05]
#undef ED_P2_ACU
#define ED_P2_ACU edp[unit][0x06]
#undef ED_P2_ACL
#define ED_P2_ACL edp[unit][0x07]
#undef ED_P2_RCR
#define ED_P2_RCR edp[unit][0x0c]
#undef ED_P2_TCR
#define ED_P2_TCR edp[unit][0x0d]
#undef ED_P2_DCR
#define ED_P2_DCR edp[unit][0x0e]
#undef ED_P2_IMR
#define ED_P2_IMR edp[unit][0x0f]
/* PCCARD */
#ifdef ED_PC_MISC
#undef ED_PC_MISC
#endif
#define ED_PC_MISC ed_pc_misc[unit]
/* LPC-T support */
#define LPCT_1d0_ON() \
{ \
outb(0x2a8e, 0x84); \
outw(0x4a8e, 0x1d0); \
outw(0x5a8e, 0x0310); \
}
#define LPCT_1d0_OFF() \
{ \
outb(0x2a8e, 0xa4); \
outw(0x4a8e, 0xd0); \
outw(0x5a8e, 0x0300); \
}
/* register offsets */
static unsigned int *edp[NED];
static unsigned int pc98_io_skip[NED];
static int ed_novell_nic_offset[NED];
static int ed_novell_asic_offset[NED];
static int ed_novell_data[NED];
static int ed_novell_reset[NED];
static int ed_pc_misc[NED];
/* NE2000, LGY-98, ICM, LPC-T */
static unsigned int edp_generic[16] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
};
/* EGY-98 */
static unsigned int edp_egy98[16] = {
0, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,
0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e
};
/* LD-BDN */
static unsigned int edp_bdn98[16] = {
0x00000, 0x01000, 0x02000, 0x03000, 0x04000, 0x05000, 0x06000, 0x07000,
0x08000, 0x0a000, 0x0b000, 0x0c000, 0x0d000, 0x0d000, 0x0e000, 0x0f000
};
/* SIC-98 */
static unsigned int edp_sic98[16] = {
0x0000, 0x0200, 0x0400, 0x0600, 0x0800, 0x0a00, 0x0c00, 0x0e00,
0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00
};
/* IO-DATA LA-98 */
static unsigned int edp_la98[16] = {
0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0xf000
};
/* NEC PC-9801-108 */
static unsigned int edp_nec108[16] = {
0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e,
0x1000, 0x1002, 0x1004, 0x1006, 0x1008, 0x100a, 0x100c, 0x100e
};
static void pc98_set_register(struct pc98_device *dev, int unit, int type)
{
int adj;
switch (type) {
case ED_TYPE98_GENERIC:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 1;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0010;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x000f;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_LGY:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 1;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0200;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x0100;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_EGY:
edp[unit] = edp_egy98;
pc98_io_skip[unit] = 2;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = 0x0200;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x0100;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_ICM:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 1;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = 0x0100;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x000f;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_BDN:
edp[unit] = edp_bdn98;
pc98_io_skip[unit] = 0x1000;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0100;
ED_NOVELL_DATA = 0;
ED_NOVELL_RESET = 0xc100;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_SIC:
edp[unit] = edp_sic98;
pc98_io_skip[unit] = 0x200;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x2000;
ED_NOVELL_DATA = 0x00; /* dummy */
ED_NOVELL_RESET = 0x00;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_LPC:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 0x1;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0100;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x010f;
ED_PC_MISC = 0x108;
break;
case ED_TYPE98_108:
edp[unit] = edp_nec108;
pc98_io_skip[unit] = 2;
adj = (dev->id_iobase & 0xf000) / 2;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = (0x888 | adj) - dev->id_iobase;
ED_NOVELL_DATA = 0;
ED_NOVELL_RESET = 4;
ED_PC_MISC = 0x18;
break;
case ED_TYPE98_LA98:
edp[unit] = edp_la98;
pc98_io_skip[unit] = 0x1000;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = 0x100;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0xf000;
ED_PC_MISC = 0x18;
break;
}
}
#endif /* __PC98_PC98_IF_ED98_H__ */
/*
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* PC-9801 specific definitions for National Semiconductor DP8390 NIC
*/
#ifndef __PC98_PC98_IF_ED98_H__
#define __PC98_PC98_IF_ED98_H__
/* PC98 only */
#ifndef PC98
#error Why you include if_ed98.h?
#endif
static void pc98_set_register __P((struct pc98_device *dev,
int unit, int type));
/*
* Vendor types
*/
#define ED_VENDOR_MISC 0xf0 /* others */
/*
* Register offsets/total
*/
#ifdef ED_NOVELL_NIC_OFFSET
#undef ED_NOVELL_NIC_OFFSET
#endif
#define ED_NOVELL_NIC_OFFSET ed_novell_nic_offset[unit]
#ifdef ED_NOVELL_ASIC_OFFSET
#undef ED_NOVELL_ASIC_OFFSET
#endif
#define ED_NOVELL_ASIC_OFFSET ed_novell_asic_offset[unit]
/*
* Remote DMA data register; for reading or writing to the NIC mem
* via programmed I/O (offset from ASIC base)
*/
#ifdef ED_NOVELL_DATA
#undef ED_NOVELL_DATA
#endif
#define ED_NOVELL_DATA ed_novell_data[unit]
/*
* Reset register; reading from this register causes a board reset
*/
#ifdef ED_NOVELL_RESET
#undef ED_NOVELL_RESET
#endif
#define ED_NOVELL_RESET ed_novell_reset[unit]
/*
* Card type
*
* Type Card
* 0 Allied Telesis CenterCom LA-98-T
* 1 MELCO LPC-TJ, LPC-TS / IO-DATA PCLA/T
* 2 PLANET SMART COM 98 EN-2298 / ELECOM LANEED LD-BDN[123]A
* 3 MELCO EGY-98
* 4 MELCO LGY-98, IND-SP, IND-SS / MACNICA NE2098(XXX)
* 5 ICM DT-ET-25, DT-ET-T5, IF-2766ET, IF-2771ET /
* D-Link DE-298P{T,CAT}, DE-298{T,TP,CAT}
* 6 Allied Telesis SIC-98
* 8 NEC PC-9801-108
* 9 IO-DATA LA-98
*/
#define ED_TYPE98_BASE 0x10
#define ED_TYPE98_GENERIC 0x10
#define ED_TYPE98_LPC 0x11
#define ED_TYPE98_BDN 0x12
#define ED_TYPE98_EGY 0x13
#define ED_TYPE98_LGY 0x14
#define ED_TYPE98_ICM 0x15
#define ED_TYPE98_SIC 0x16
#define ED_TYPE98_108 0x18
#define ED_TYPE98_LA98 0x19
#define ED_TYPE98(x) (((x->id_flags & 0xffff0000) >> 16) | ED_TYPE98_BASE)
/*
* Page 0 register offsets
*/
#undef ED_P0_CR
#define ED_P0_CR edp[unit][0x00]
#undef ED_P0_CLDA0
#define ED_P0_CLDA0 edp[unit][0x01]
#undef ED_P0_PSTART
#define ED_P0_PSTART edp[unit][0x01]
#undef ED_P0_CLDA1
#define ED_P0_CLDA1 edp[unit][0x02]
#undef ED_P0_PSTOP
#define ED_P0_PSTOP edp[unit][0x02]
#undef ED_P0_BNRY
#define ED_P0_BNRY edp[unit][0x03]
#undef ED_P0_TSR
#define ED_P0_TSR edp[unit][0x04]
#undef ED_P0_TPSR
#define ED_P0_TPSR edp[unit][0x04]
#undef ED_P0_NCR
#define ED_P0_NCR edp[unit][0x05]
#undef ED_P0_TBCR0
#define ED_P0_TBCR0 edp[unit][0x05]
#undef ED_P0_FIFO
#define ED_P0_FIFO edp[unit][0x06]
#undef ED_P0_TBCR1
#define ED_P0_TBCR1 edp[unit][0x06]
#undef ED_P0_ISR
#define ED_P0_ISR edp[unit][0x07]
#undef ED_P0_CRDA0
#define ED_P0_CRDA0 edp[unit][0x08]
#undef ED_P0_RSAR0
#define ED_P0_RSAR0 edp[unit][0x08]
#undef ED_P0_CRDA1
#define ED_P0_CRDA1 edp[unit][0x09]
#undef ED_P0_RSAR1
#define ED_P0_RSAR1 edp[unit][0x09]
#undef ED_P0_RBCR0
#define ED_P0_RBCR0 edp[unit][0x0a]
#undef ED_P0_RBCR1
#define ED_P0_RBCR1 edp[unit][0x0b]
#undef ED_P0_RSR
#define ED_P0_RSR edp[unit][0x0c]
#undef ED_P0_RCR
#define ED_P0_RCR edp[unit][0x0c]
#undef ED_P0_CNTR0
#define ED_P0_CNTR0 edp[unit][0x0d]
#undef ED_P0_TCR
#define ED_P0_TCR edp[unit][0x0d]
#undef ED_P0_CNTR1
#define ED_P0_CNTR1 edp[unit][0x0e]
#undef ED_P0_DCR
#define ED_P0_DCR edp[unit][0x0e]
#undef ED_P0_CNTR2
#define ED_P0_CNTR2 edp[unit][0x0f]
#undef ED_P0_IMR
#define ED_P0_IMR edp[unit][0x0f]
/*
* Page 1 register offsets
*/
#undef ED_P1_CR
#define ED_P1_CR edp[unit][0x00]
#undef ED_P1_PAR0
#define ED_P1_PAR0 edp[unit][0x01]
#undef ED_P1_PAR1
#define ED_P1_PAR1 edp[unit][0x02]
#undef ED_P1_PAR2
#define ED_P1_PAR2 edp[unit][0x03]
#undef ED_P1_PAR3
#define ED_P1_PAR3 edp[unit][0x04]
#undef ED_P1_PAR4
#define ED_P1_PAR4 edp[unit][0x05]
#undef ED_P1_PAR5
#define ED_P1_PAR5 edp[unit][0x06]
#undef ED_P1_CURR
#define ED_P1_CURR edp[unit][0x07]
#undef ED_P1_MAR0
#define ED_P1_MAR0 edp[unit][0x08]
#undef ED_P1_MAR1
#define ED_P1_MAR1 edp[unit][0x09]
#undef ED_P1_MAR2
#define ED_P1_MAR2 edp[unit][0x0a]
#undef ED_P1_MAR3
#define ED_P1_MAR3 edp[unit][0x0b]
#undef ED_P1_MAR4
#define ED_P1_MAR4 edp[unit][0x0c]
#undef ED_P1_MAR5
#define ED_P1_MAR5 edp[unit][0x0d]
#undef ED_P1_MAR6
#define ED_P1_MAR6 edp[unit][0x0e]
#undef ED_P1_MAR7
#define ED_P1_MAR7 edp[unit][0x0f]
/*
* Page 2 register offsets
*/
#undef ED_P2_CR
#define ED_P2_CR edp[unit][0x00]
#undef ED_P2_PSTART
#define ED_P2_PSTART edp[unit][0x01]
#undef ED_P2_CLDA0
#define ED_P2_CLDA0 edp[unit][0x01]
#undef ED_P2_PSTOP
#define ED_P2_PSTOP edp[unit][0x02]
#undef ED_P2_CLDA1
#define ED_P2_CLDA1 edp[unit][0x02]
#undef ED_P2_RNPP
#define ED_P2_RNPP edp[unit][0x03]
#undef ED_P2_TPSR
#define ED_P2_TPSR edp[unit][0x04]
#undef ED_P2_LNPP
#define ED_P2_LNPP edp[unit][0x05]
#undef ED_P2_ACU
#define ED_P2_ACU edp[unit][0x06]
#undef ED_P2_ACL
#define ED_P2_ACL edp[unit][0x07]
#undef ED_P2_RCR
#define ED_P2_RCR edp[unit][0x0c]
#undef ED_P2_TCR
#define ED_P2_TCR edp[unit][0x0d]
#undef ED_P2_DCR
#define ED_P2_DCR edp[unit][0x0e]
#undef ED_P2_IMR
#define ED_P2_IMR edp[unit][0x0f]
/* LPC-T support */
#define LPCT_1d0_ON() \
{ \
outb(0x2a8e, 0x84); \
outw(0x4a8e, 0x1d0); \
outw(0x5a8e, 0x0310); \
}
#define LPCT_1d0_OFF() \
{ \
outb(0x2a8e, 0xa4); \
outw(0x4a8e, 0xd0); \
outw(0x5a8e, 0x0300); \
}
/* register offsets */
static unsigned int *edp[NED];
static unsigned int pc98_io_skip[NED];
static int ed_novell_nic_offset[NED];
static int ed_novell_asic_offset[NED];
static int ed_novell_data[NED];
static int ed_novell_reset[NED];
/* NE2000, LGY-98, ICM, LPC-T */
static unsigned int edp_generic[16] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
};
/* EGY-98 */
static unsigned int edp_egy98[16] = {
0, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,
0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e
};
/* LD-BDN */
static unsigned int edp_bdn98[16] = {
0x00000, 0x01000, 0x02000, 0x03000, 0x04000, 0x05000, 0x06000, 0x07000,
0x08000, 0x0a000, 0x0b000, 0x0c000, 0x0d000, 0x0d000, 0x0e000, 0x0f000
};
/* SIC-98 */
static unsigned int edp_sic98[16] = {
0x0000, 0x0200, 0x0400, 0x0600, 0x0800, 0x0a00, 0x0c00, 0x0e00,
0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00
};
/* IO-DATA LA-98 */
static unsigned int edp_la98[16] = {
0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0xf000
};
/* NEC PC-9801-108 */
static unsigned int edp_nec108[16] = {
0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e,
0x1000, 0x1002, 0x1004, 0x1006, 0x1008, 0x100a, 0x100c, 0x100e
};
static void pc98_set_register(struct pc98_device *dev, int unit, int type)
{
int adj;
switch (type) {
case ED_TYPE98_GENERIC:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 1;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0010;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x000f;
break;
case ED_TYPE98_LGY:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 1;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0200;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x0100;
break;
case ED_TYPE98_EGY:
edp[unit] = edp_egy98;
pc98_io_skip[unit] = 2;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = 0x0200;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x0100;
break;
case ED_TYPE98_ICM:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 1;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = 0x0100;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x000f;
break;
case ED_TYPE98_BDN:
edp[unit] = edp_bdn98;
pc98_io_skip[unit] = 0x1000;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0100;
ED_NOVELL_DATA = 0;
ED_NOVELL_RESET = 0xc100;
break;
case ED_TYPE98_SIC:
edp[unit] = edp_sic98;
pc98_io_skip[unit] = 0x200;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x2000;
ED_NOVELL_DATA = 0x00; /* dummy */
ED_NOVELL_RESET = 0x00;
break;
case ED_TYPE98_LPC:
edp[unit] = edp_generic;
pc98_io_skip[unit] = 0x1;
ED_NOVELL_NIC_OFFSET = 0x0000;
ED_NOVELL_ASIC_OFFSET = 0x0100;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0x0200;
break;
case ED_TYPE98_108:
edp[unit] = edp_nec108;
pc98_io_skip[unit] = 2;
adj = (dev->id_iobase & 0xf000) / 2;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = (0x888 | adj) - dev->id_iobase;
ED_NOVELL_DATA = 0;
ED_NOVELL_RESET = 4;
break;
case ED_TYPE98_LA98:
edp[unit] = edp_la98;
pc98_io_skip[unit] = 0x1000;
ED_NOVELL_NIC_OFFSET = 0;
ED_NOVELL_ASIC_OFFSET = 0x100;
ED_NOVELL_DATA = 0x0000;
ED_NOVELL_RESET = 0xf000;
break;
}
}
#endif /* __PC98_PC98_IF_ED98_H__ */

0
sys/pc98/pc98/if_edreg.h
View File

4
sys/pc98/pc98/if_ep.c
View File

@ -38,7 +38,7 @@
*/
/*
* $Id: if_ep.c,v 1.1.1.1 1996/06/14 10:04:44 asami Exp $
* $Id: if_ep.c,v 1.2 1996/07/23 07:46:17 asami Exp $
*
* Promiscuous mode added and interrupt logic slightly changed
* to reduce the number of adapter failures. Transceiver select
@ -1011,7 +1011,7 @@ epstart(ifp)
}
IF_DEQUEUE(&ifp->if_snd, m);
outw(BASE + EP_W1_TX_PIO_WR_1, len | 0x8000); /* XXX */
outw(BASE + EP_W1_TX_PIO_WR_1, len);
outw(BASE + EP_W1_TX_PIO_WR_1, 0x0); /* Second dword meaningless */
/* compute the Tx start threshold for this packet */

18
sys/pc98/pc98/matcd/matcd.c
View File

@ -337,7 +337,7 @@ static char MATCDVERSION[]="Version 1(26) 18-Oct-95";
static char MATCDCOPYRIGHT[] = "Matsushita CD-ROM driver, Copr. 1994,1995 Frank Durda IV";
/* The proceeding strings may not be changed*/
/* $Id: matcd.c,v 1.18 1996/06/08 09:17:51 bde Exp $ */
/* $Id: matcd.c,v 1.1.1.1 1996/06/14 10:04:51 asami Exp $ */
/*---------------------------------------------------------------------------
Include declarations
@ -554,20 +554,12 @@ static d_strategy_t matcdstrategy;
#define CDEV_MAJOR 46
#define BDEV_MAJOR 17
extern struct cdevsw matcd_cdevsw;
static struct cdevsw matcd_cdevsw;
static struct bdevsw matcd_bdevsw =
{ matcdopen, matcdclose, matcdstrategy, matcdioctl, /*17*/
nodump, matcdsize, 0, "matcd",
&matcd_cdevsw, -1 };
static struct cdevsw matcd_cdevsw =
{ matcdopen, matcdclose, rawread, nowrite, /*46*/
matcdioctl, nostop, nullreset, nodevtotty,/* SB cd */
seltrue, nommap, matcdstrategy, "matcd",
&matcd_bdevsw, -1};
/*---------------------------------------------------------------------------
Internal function declarations
---------------------------------------------------------------------------*/
@ -2730,13 +2722,9 @@ static matcd_devsw_installed = 0;
static void
matcd_drvinit(void *unused)
{
dev_t dev;
if( ! matcd_devsw_installed ) {
dev = makedev(CDEV_MAJOR,0);
cdevsw_add(&dev,&matcd_cdevsw,NULL);
dev = makedev(BDEV_MAJOR,0);
bdevsw_add(&dev,&matcd_bdevsw,NULL);
bdevsw_add_generic(BDEV_MAJOR,CDEV_MAJOR, &matcd_bdevsw);
matcd_devsw_installed = 1;
}
}

388
sys/pc98/pc98/pc98_machdep.c Normal file
View File

@ -0,0 +1,388 @@
/*
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/vmmeter.h>
#include <vm/vm.h>
#include <vm/vm_param.h>
#include <vm/vm_prot.h>
#include <vm/lock.h>
#include <vm/vm_kern.h>
#include <vm/vm_object.h>
#include <vm/vm_page.h>
#include <vm/vm_map.h>
#include <vm/vm_pager.h>
#include <vm/vm_extern.h>
#include <pc98/pc98/pc98_device.h>
extern int Maxmem;
extern int Maxmem_under16M;
void init_cpu_accel_mem __P((void));
void init_pc98_dmac __P((void));
#ifdef EPSON_MEMWIN
void init_epson_memwin __P((void));
void init_epson_memwin(void)
{
if (pc98_machine_type & M_EPSON_PC98) {
if (Maxmem > 3840) {
if (Maxmem == Maxmem_under16M) {
Maxmem = 3840;
Maxmem_under16M = 3840;
} else if (Maxmem_under16M > 3840) {
Maxmem_under16M = 3840;
}
}
/* Disable 15MB-16MB caching */
switch (epson_machine_id) {
case 0x34: /* PC486HX */
case 0x35: /* PC486HG */
case 0x3B: /* PC486HA */
/* Cache control start */
outb(0x43f, 0x42);
outw(0xc40, 0x0033);
/* Disable 0xF00000-0xFFFFFF */
outb(0xc48, 0x49); outb(0xc4c, 0x00);
outb(0xc48, 0x48); outb(0xc4c, 0xf0);
outb(0xc48, 0x4d); outb(0xc4c, 0x00);
outb(0xc48, 0x4c); outb(0xc4c, 0xff);
outb(0xc48, 0x4f); outb(0xc4c, 0x00);
/* Cache control end */
outb(0x43f, 0x40);
break;
case 0x2B: /* PC486GR/GF */
case 0x30: /* PC486P */
case 0x31: /* PC486GRSuper */
case 0x32: /* PC486GR+ */
case 0x37: /* PC486SE */
case 0x38: /* PC486SR */
/* Disable 0xF00000-0xFFFFFF */
outb(0x43f, 0x42);
outb(0x467, 0xe0);
outb(0x567, 0xd8);
outb(0x43f, 0x40);
outb(0x467, 0xe0);
outb(0x567, 0xe0);
break;
}
/* Disable 15MB-16MB RAM and enable memory window */
outb(0x43b, inb(0x43b) & 0xfd); /* clear bit1 */
}
}
#endif
void init_cpu_accel_mem(void)
{
int target_page;
/*
* Certain 'CPU accelerator' supports over 16MB memory on
* the machines whose BIOS doesn't store true size.
* To support this, we don't trust BIOS values if Maxmem < 4096.
*/
if (Maxmem < 4096) {
for (target_page = ptoa(4096); /* 16MB */
target_page < ptoa(32768); /* 128MB */
target_page += 256 * PAGE_SIZE /* 1MB step */) {
int tmp, page_bad = FALSE, OrigMaxmem = Maxmem;
*(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page;
pmap_update();
tmp = *(int *)CADDR1;
/*
* Test for alternating 1's and 0's
*/
*(volatile int *)CADDR1 = 0xaaaaaaaa;
if (*(volatile int *)CADDR1 != 0xaaaaaaaa) {
page_bad = TRUE;
}
/*
* Test for alternating 0's and 1's
*/
*(volatile int *)CADDR1 = 0x55555555;
if (*(volatile int *)CADDR1 != 0x55555555) {
page_bad = TRUE;
}
/*
* Test for all 1's
*/
*(volatile int *)CADDR1 = 0xffffffff;
if (*(volatile int *)CADDR1 != 0xffffffff) {
page_bad = TRUE;
}
/*
* Test for all 0's
*/
*(volatile int *)CADDR1 = 0x0;
if (*(volatile int *)CADDR1 != 0x0) {
/*
* test of page failed
*/
page_bad = TRUE;
}
/*
* Restore original value.
*/
*(int *)CADDR1 = tmp;
if (page_bad == TRUE) {
if (target_page > ptoa(4096))
Maxmem = atop(target_page);
else
Maxmem = OrigMaxmem;
break;
}
}
*(int *)CMAP1 = 0;
pmap_update();
/* XXX */
if (Maxmem > 3840) {
Maxmem_under16M = 3840;
if (Maxmem < 4096) {
Maxmem = 3840;
}
}
}
}
int dma_init_flag = 1; /* dummy */
void init_pc98_dmac(void)
{
outb(0x439, (inb(0x439) & 0xfb)); /* DMA Accsess Control over 1MB */
outb(0x29, (0x0c | 0)); /* Bank Mode Reg. 16M mode */
outb(0x29, (0x0c | 1)); /* Bank Mode Reg. 16M mode */
outb(0x29, (0x0c | 2)); /* Bank Mode Reg. 16M mode */
outb(0x29, (0x0c | 3)); /* Bank Mode Reg. 16M mode */
outb(0x11, 0x50); /* PC98 must be 0x40 */
}
/*
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/vmmeter.h>
#include <vm/vm.h>
#include <vm/vm_param.h>
#include <vm/vm_prot.h>
#include <vm/lock.h>
#include <vm/vm_kern.h>
#include <vm/vm_object.h>
#include <vm/vm_page.h>
#include <vm/vm_map.h>
#include <vm/vm_pager.h>
#include <vm/vm_extern.h>
#include <pc98/pc98/pc98_device.h>
extern int Maxmem;
extern int Maxmem_under16M;
void init_cpu_accel_mem __P((void));
void init_pc98_dmac __P((void));
#ifdef EPSON_MEMWIN
void init_epson_memwin __P((void));
void init_epson_memwin(void)
{
if (pc98_machine_type & M_EPSON_PC98) {
if (Maxmem > 3840) {
if (Maxmem == Maxmem_under16M) {
Maxmem = 3840;
Maxmem_under16M = 3840;
} else if (Maxmem_under16M > 3840) {
Maxmem_under16M = 3840;
}
}
/* Disable 15MB-16MB caching */
switch (epson_machine_id) {
case 0x34: /* PC486HX */
case 0x35: /* PC486HG */
case 0x3B: /* PC486HA */
/* Cache control start */
outb(0x43f, 0x42);
outw(0xc40, 0x0033);
/* Disable 0xF00000-0xFFFFFF */
outb(0xc48, 0x49); outb(0xc4c, 0x00);
outb(0xc48, 0x48); outb(0xc4c, 0xf0);
outb(0xc48, 0x4d); outb(0xc4c, 0x00);
outb(0xc48, 0x4c); outb(0xc4c, 0xff);
outb(0xc48, 0x4f); outb(0xc4c, 0x00);
/* Cache control end */
outb(0x43f, 0x40);
break;
case 0x2B: /* PC486GR/GF */
case 0x30: /* PC486P */
case 0x31: /* PC486GRSuper */
case 0x32: /* PC486GR+ */
case 0x37: /* PC486SE */
case 0x38: /* PC486SR */
/* Disable 0xF00000-0xFFFFFF */
outb(0x43f, 0x42);
outb(0x467, 0xe0);
outb(0x567, 0xd8);
outb(0x43f, 0x40);
outb(0x467, 0xe0);
outb(0x567, 0xe0);
break;
}
/* Disable 15MB-16MB RAM and enable memory window */
outb(0x43b, inb(0x43b) & 0xfd); /* clear bit1 */
}
}
#endif
void init_cpu_accel_mem(void)
{
int target_page;
/*
* Certain 'CPU accelerator' supports over 16MB memory on
* the machines whose BIOS doesn't store true size.
* To support this, we don't trust BIOS values if Maxmem < 4096.
*/
if (Maxmem < 4096) {
for (target_page = ptoa(4096); /* 16MB */
target_page < ptoa(32768); /* 128MB */
target_page += 256 * PAGE_SIZE /* 1MB step */) {
int tmp, page_bad = FALSE, OrigMaxmem = Maxmem;
*(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page;
pmap_update();
tmp = *(int *)CADDR1;
/*
* Test for alternating 1's and 0's
*/
*(volatile int *)CADDR1 = 0xaaaaaaaa;
if (*(volatile int *)CADDR1 != 0xaaaaaaaa) {
page_bad = TRUE;
}
/*
* Test for alternating 0's and 1's
*/
*(volatile int *)CADDR1 = 0x55555555;
if (*(volatile int *)CADDR1 != 0x55555555) {
page_bad = TRUE;
}
/*
* Test for all 1's
*/
*(volatile int *)CADDR1 = 0xffffffff;
if (*(volatile int *)CADDR1 != 0xffffffff) {
page_bad = TRUE;
}
/*
* Test for all 0's
*/
*(volatile int *)CADDR1 = 0x0;
if (*(volatile int *)CADDR1 != 0x0) {
/*
* test of page failed
*/
page_bad = TRUE;
}
/*
* Restore original value.
*/
*(int *)CADDR1 = tmp;
if (page_bad == TRUE) {
if (target_page > ptoa(4096))
Maxmem = atop(target_page);
else
Maxmem = OrigMaxmem;
break;
}
}
*(int *)CMAP1 = 0;
pmap_update();
/* XXX */
if (Maxmem > 3840) {
Maxmem_under16M = 3840;
if (Maxmem < 4096) {
Maxmem = 3840;
}
}
}
}
int dma_init_flag = 1; /* dummy */
void init_pc98_dmac(void)
{
outb(0x439, (inb(0x439) & 0xfb)); /* DMA Accsess Control over 1MB */
outb(0x29, (0x0c | 0)); /* Bank Mode Reg. 16M mode */
outb(0x29, (0x0c | 1)); /* Bank Mode Reg. 16M mode */
outb(0x29, (0x0c | 2)); /* Bank Mode Reg. 16M mode */
outb(0x29, (0x0c | 3)); /* Bank Mode Reg. 16M mode */
outb(0x11, 0x50); /* PC98 must be 0x40 */
}

74
sys/pc98/pc98/pc98_machdep.h Normal file
View File

@ -0,0 +1,74 @@
/*
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PC98_PC98_PC98_MACHDEP_H__
#define __PC98_PC98_PC98_MACHDEP_H__
#ifdef EPSON_MEMWIN
void init_epson_memwin __P((void));
#endif
void init_cpu_accel_mem __P((void));
void init_pc98_dmac __P((void));
#endif /* __PC98_PC98_PC98_MACHDEP_H__ */
/*
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PC98_PC98_PC98_MACHDEP_H__
#define __PC98_PC98_PC98_MACHDEP_H__
#ifdef EPSON_MEMWIN
void init_epson_memwin __P((void));
#endif
void init_cpu_accel_mem __P((void));
void init_pc98_dmac __P((void));
#endif /* __PC98_PC98_PC98_MACHDEP_H__ */

17
sys/pc98/pc98/scd.c
View File

@ -41,7 +41,7 @@
*/
/* $Id: scd.c,v 1.1.1.1 1996/06/14 10:04:45 asami Exp $ */
/* $Id: scd.c,v 1.2 1996/07/23 07:46:37 asami Exp $ */
/* Please send any comments to micke@dynas.se */
@ -204,18 +204,11 @@ static d_strategy_t scdstrategy;
#define CDEV_MAJOR 45
#define BDEV_MAJOR 16
extern struct cdevsw scd_cdevsw;
static struct cdevsw scd_cdevsw;
static struct bdevsw scd_bdevsw =
{ scdopen, scdclose, scdstrategy, scdioctl, /*16*/
nodump, nopsize, 0, "scd", &scd_cdevsw, -1 };
static struct cdevsw scd_cdevsw =
{ scdopen, scdclose, rawread, nowrite, /*45*/
scdioctl, nostop, nullreset, nodevtotty,/* sony cd */
seltrue, nommap, scdstrategy, "scd",
&scd_bdevsw, -1 };
static struct kern_devconf kdc_scd[NSCD] = { {
0, 0, 0, /* filled in by dev_attach */
#ifdef PC98
@ -1582,13 +1575,9 @@ static scd_devsw_installed = 0;
static void scd_drvinit(void *unused)
{
dev_t dev;
if( ! scd_devsw_installed ) {
dev = makedev(CDEV_MAJOR, 0);
cdevsw_add(&dev,&scd_cdevsw, NULL);
dev = makedev(BDEV_MAJOR, 0);
bdevsw_add(&dev,&scd_bdevsw, NULL);
bdevsw_add_generic(BDEV_MAJOR,CDEV_MAJOR, &scd_bdevsw);
scd_devsw_installed = 1;
}
}

67
sys/pc98/pc98/wd.c
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)wd.c 7.2 (Berkeley) 5/9/91
* $Id: wd.c,v 1.1.1.1 1996/06/14 10:04:48 asami Exp $
* $Id: wd.c,v 1.2 1996/07/23 07:46:44 asami Exp $
*/
/* TODO:
@ -357,18 +357,11 @@ static d_psize_t wdsize;
#define CDEV_MAJOR 3
#define BDEV_MAJOR 0
extern struct cdevsw wd_cdevsw;
static struct cdevsw wd_cdevsw;
static struct bdevsw wd_bdevsw =
{ wdopen, wdclose, wdstrategy, wdioctl, /*0*/
wddump, wdsize, 0, "wd", &wd_cdevsw, -1 };
static struct cdevsw wd_cdevsw =
{ wdopen, wdclose, rawread, rawwrite, /*3*/
wdioctl, nostop, nullreset, nodevtotty,/* wd */
seltrue, nommap, wdstrategy, "wd",
&wd_bdevsw, -1 };
/*
* Provide hw.devconf information.
*/
@ -1659,6 +1652,29 @@ wdsetctlr(struct disk *du)
wderror((struct buf *)NULL, du, "wdsetctlr failed");
return (1);
}
/*
* The config option flags low 8 bits define the maximum multi-block
* transfer size. If the user wants the maximum that the drive
* is capable of, just set the low bits of the config option to
* 0x00ff.
*/
if ((du->cfg_flags & WDOPT_MULTIMASK) != 0 && (du->dk_multi > 1)) {
if (du->dk_multi > (du->cfg_flags & WDOPT_MULTIMASK))
du->dk_multi = du->cfg_flags & WDOPT_MULTIMASK;
if (wdcommand(du, 0, 0, 0, du->dk_multi, WDCC_SET_MULTI)) {
du->dk_multi = 1;
}
} else {
du->dk_multi = 1;
}
#ifdef NOTYET
/* set read caching and write caching */
wdcommand(du, 0, 0, 0, WDFEA_RCACHE, WDCC_FEATURES);
wdcommand(du, 0, 0, 0, WDFEA_WCACHE, WDCC_FEATURES);
#endif
return (0);
}
@ -1901,33 +1917,6 @@ wdgetctlr(struct disk *du)
du->dk_dd.d_subtype |= DSTYPE_GEOMETRY;
#endif
/*
* find out the drives maximum multi-block transfer capability
*/
du->dk_multi = wp->wdp_nsecperint & 0xff;
/*
* The config option flags low 8 bits define the maximum multi-block
* transfer size. If the user wants the maximum that the drive
* is capable of, just set the low bits of the config option to
* 0x00ff.
*/
if ((flags & WDOPT_MULTIMASK) != 0 && (du->dk_multi > 1)) {
if (du->dk_multi > (flags & WDOPT_MULTIMASK))
du->dk_multi = flags & WDOPT_MULTIMASK;
if (wdcommand(du, 0, 0, 0, du->dk_multi, WDCC_SET_MULTI)) {
du->dk_multi = 1;
}
} else {
du->dk_multi = 1;
}
#ifdef NOTYET
/* set read caching and write caching */
wdcommand(du, 0, 0, 0, WDFEA_RCACHE, WDCC_FEATURES);
wdcommand(du, 0, 0, 0, WDFEA_WCACHE, WDCC_FEATURES);
#endif
return (0);
}
@ -2470,13 +2459,9 @@ static wd_devsw_installed = 0;
static void wd_drvinit(void *unused)
{
dev_t dev;
if( ! wd_devsw_installed ) {
dev = makedev(CDEV_MAJOR,0);
cdevsw_add(&dev,&wd_cdevsw,NULL);
dev = makedev(BDEV_MAJOR,0);
bdevsw_add(&dev,&wd_bdevsw,NULL);
bdevsw_add_generic(BDEV_MAJOR,CDEV_MAJOR, &wd_bdevsw);
wd_devsw_installed = 1;
}
}