Update our device tree files to a Linux 4.10
This commit is contained in:
commit
d7d085358c
@ -57,7 +57,7 @@
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};
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};
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usb0: ohci@00500000 {
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usb0: ohci@500000 {
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num-ports = <2>;
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status = "okay";
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};
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|
@ -54,16 +54,22 @@
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dr_mode = "host";
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};
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&davinci_mdio {
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phy0: ethernet-phy@0 {
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reg = <1>;
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};
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <1>;
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phy-handle = <&phy0>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <7>;
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <2>;
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phy-handle = <&phy1>;
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};
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&phy_sel {
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|
@ -109,9 +109,9 @@
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <7>;
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <2>;
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phy-handle = <&phy1>;
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};
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&phy_sel {
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|
@ -114,7 +114,7 @@
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&usb1 {
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status = "okay";
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dr_mode = "otg";
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dr_mode = "host";
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};
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&cpsw_emac0 {
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@ -127,9 +127,9 @@
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <7>;
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <2>;
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phy-handle = <&phy1>;
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};
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&phy_sel {
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@ -24,12 +24,12 @@
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};
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};
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memory {
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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vbat: fixedregulator@0 {
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vbat: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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@ -37,7 +37,7 @@
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regulator-boot-on;
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};
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wl12xx_vmmc: fixedregulator@2 {
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wl12xx_vmmc: fixedregulator2 {
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_gpio>;
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compatible = "regulator-fixed";
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@ -226,7 +226,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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elm_id = <&elm>;
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ti,elm-id = <&elm>;
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};
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};
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@ -364,11 +364,14 @@
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};
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&davinci_mdio {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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phy1: ethernet-phy@1 {
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reg = <7>;
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};
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};
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&mmc1 {
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@ -406,3 +409,7 @@
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&gpio0 {
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ti,no-reset-on-init;
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};
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&gpio3 {
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ti,no-reset-on-init;
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};
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|
@ -29,13 +29,13 @@
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compatible = "gpio-leds";
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led@0 {
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led0 {
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label = "base:red:user";
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gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
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default-state = "off";
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};
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led@1 {
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led1 {
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label = "base:green:user";
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gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
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default-state = "off";
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@ -13,39 +13,43 @@
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};
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};
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memory {
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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chosen {
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stdout-path = &uart0;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_s0>;
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compatible = "gpio-leds";
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led@2 {
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led2 {
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label = "beaglebone:green:heartbeat";
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gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led@3 {
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led3 {
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label = "beaglebone:green:mmc0";
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gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led@4 {
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led4 {
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label = "beaglebone:green:usr2";
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gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "cpu0";
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default-state = "off";
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};
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led@5 {
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led5 {
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label = "beaglebone:green:usr3";
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gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc1";
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@ -53,7 +57,7 @@
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};
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};
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vmmcsd_fixed: fixedregulator@0 {
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vmmcsd_fixed: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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@ -306,8 +310,23 @@
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* by the hardware problems. (Tip: double-check by performing a current
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* measurement after shutdown: it should be less than 1 mA.)
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*/
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interrupts = <7>; /* NMI */
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interrupt-parent = <&intc>;
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ti,pmic-shutdown-controller;
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charger {
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interrupts = <0>, <1>;
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interrupt-names = "USB", "AC";
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status = "okay";
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};
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pwrbutton {
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interrupts = <2>;
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status = "okay";
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};
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regulators {
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dcdc1_reg: regulator@0 {
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regulator-name = "vdds_dpr";
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@ -318,7 +337,7 @@
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1325000>;
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regulator-max-microvolt = <1351500>;
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regulator-boot-on;
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regulator-always-on;
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};
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@ -359,12 +378,8 @@
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phy-mode = "mii";
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "mii";
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};
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&mac {
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slaves = <1>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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@ -393,3 +408,8 @@
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&sham {
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status = "okay";
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};
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&rtc {
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clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
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clock-names = "ext-clk", "int-clk";
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};
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@ -9,6 +9,7 @@
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#include "am33xx.dtsi"
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#include "am335x-bone-common.dtsi"
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#include <dt-bindings/display/tda998x.h>
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/ {
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model = "TI AM335x BeagleBone Black";
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@ -64,10 +65,28 @@
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AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
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>;
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};
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mcasp0_pins: mcasp0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
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AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
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AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
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AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
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AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
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>;
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};
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};
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&lcdc {
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status = "okay";
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/* If you want to get 24 bit RGB and 16 BGR mode instead of
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* current 16 bit RGB and 24 BGR modes, set the propety
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* below to "crossed" and uncomment the video-ports -property
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* in tda19988 node.
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*/
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blue-and-red-wiring = "straight";
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port {
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lcdc_0: endpoint@0 {
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remote-endpoint = <&hdmi_0>;
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@ -76,21 +95,76 @@
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};
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&i2c0 {
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tda19988 {
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tda19988: tda19988 {
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compatible = "nxp,tda998x";
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reg = <0x70>;
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pinctrl-names = "default", "off";
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pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
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pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
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port {
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/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
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/* video-ports = <0x234501>; */
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#sound-dai-cells = <0>;
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audio-ports = < TDA998x_I2S 0x03>;
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ports {
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port@0 {
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hdmi_0: endpoint@0 {
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remote-endpoint = <&lcdc_0>;
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};
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};
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};
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};
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};
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&rtc {
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system-power-controller;
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};
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&mcasp0 {
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#sound-dai-cells = <0>;
|
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pinctrl-names = "default";
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pinctrl-0 = <&mcasp0_pins>;
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status = "okay";
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op-mode = <0>; /* MCASP_IIS_MODE */
|
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tdm-slots = <2>;
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
0 0 1 0
|
||||
>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
/ {
|
||||
clk_mcasp0_fixed: clk_mcasp0_fixed {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24576000>;
|
||||
};
|
||||
|
||||
clk_mcasp0: clk_mcasp0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "gpio-gate-clock";
|
||||
clocks = <&clk_mcasp0_fixed>;
|
||||
enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "TI BeagleBone Black";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&dailink0_master>;
|
||||
simple-audio-card,frame-master = <&dailink0_master>;
|
||||
|
||||
dailink0_master: simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp0>;
|
||||
clocks = <&clk_mcasp0>;
|
||||
};
|
||||
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&tda19988>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -19,7 +19,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
@ -17,7 +17,7 @@
|
||||
model = "CompuLab CM-T335";
|
||||
compatible = "compulab,cm-t335", "ti,am33xx";
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x8000000>; /* 128 MB */
|
||||
};
|
||||
@ -26,7 +26,7 @@
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_led_pins>;
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "cm_t335:green";
|
||||
gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; /* gpio2_0 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
@ -34,7 +34,7 @@
|
||||
};
|
||||
|
||||
/* regulator for mmc */
|
||||
vmmc_fixed: fixedregulator@0 {
|
||||
vmmc_fixed: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
@ -42,7 +42,7 @@
|
||||
};
|
||||
|
||||
/* Regulator for WiFi */
|
||||
vwlan_fixed: fixedregulator@2 {
|
||||
vwlan_fixed: fixedregulator2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vwlan_fixed";
|
||||
gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
|
||||
|
@ -20,12 +20,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -33,13 +33,13 @@
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lis3_reg: fixedregulator@1 {
|
||||
lis3_reg: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "lis3_reg";
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
wlan_en_reg: fixedregulator@2 {
|
||||
wlan_en_reg: fixedregulator2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wlan-en-regulator";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
@ -53,7 +53,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
matrix_keypad: matrix_keypad0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <2>;
|
||||
@ -73,20 +73,20 @@
|
||||
0x0201006c>; /* DOWN */
|
||||
};
|
||||
|
||||
gpio_keys: volume_keys@0 {
|
||||
gpio_keys: volume_keys0 {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
autorepeat;
|
||||
|
||||
switch@9 {
|
||||
switch9 {
|
||||
label = "volume-up";
|
||||
linux,code = <115>;
|
||||
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
switch@10 {
|
||||
switch10 {
|
||||
label = "volume-down";
|
||||
linux,code = <114>;
|
||||
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
|
||||
@ -497,6 +497,8 @@
|
||||
|
||||
&lcdc {
|
||||
status = "okay";
|
||||
|
||||
blue-and-red-wiring = "crossed";
|
||||
};
|
||||
|
||||
&elm {
|
||||
@ -640,7 +642,7 @@
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-max-microvolt = <1351500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
@ -781,3 +783,8 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_pins_default>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
@ -27,12 +27,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -40,13 +40,13 @@
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lis3_reg: fixedregulator@1 {
|
||||
lis3_reg: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "lis3_reg";
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
wl12xx_vmmc: fixedregulator@2 {
|
||||
wl12xx_vmmc: fixedregulator2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_gpio>;
|
||||
compatible = "regulator-fixed";
|
||||
@ -58,7 +58,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
vtt_fixed: fixedregulator@3 {
|
||||
vtt_fixed: fixedregulator3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vtt";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
@ -75,26 +75,26 @@
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "evmsk:green:usr0";
|
||||
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led2 {
|
||||
label = "evmsk:green:usr1";
|
||||
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
led3 {
|
||||
label = "evmsk:green:mmc0";
|
||||
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
led4 {
|
||||
label = "evmsk:green:heartbeat";
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
@ -102,31 +102,31 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpio_buttons: gpio_buttons@0 {
|
||||
gpio_buttons: gpio_buttons0 {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@1 {
|
||||
switch1 {
|
||||
label = "button0";
|
||||
linux,code = <0x100>;
|
||||
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
switch@2 {
|
||||
switch2 {
|
||||
label = "button1";
|
||||
linux,code = <0x101>;
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
switch@3 {
|
||||
switch3 {
|
||||
label = "button2";
|
||||
linux,code = <0x102>;
|
||||
gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
switch@4 {
|
||||
switch4 {
|
||||
label = "button3";
|
||||
linux,code = <0x103>;
|
||||
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
@ -560,7 +560,7 @@
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-max-microvolt = <1351500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
@ -712,4 +712,11 @@
|
||||
|
||||
&lcdc {
|
||||
status = "okay";
|
||||
|
||||
blue-and-red-wiring = "crossed";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
@ -19,12 +19,12 @@
|
||||
model = "TI AM3359 ICE-V2";
|
||||
compatible = "ti,am3359-icev2", "ti,am33xx";
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -32,7 +32,7 @@
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vtt_fixed: fixedregulator@1 {
|
||||
vtt_fixed: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vtt";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
@ -43,52 +43,52 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
leds@0 {
|
||||
leds-iio {
|
||||
status = "disabled";
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@0 {
|
||||
led-out0 {
|
||||
label = "out0";
|
||||
gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
led-out1 {
|
||||
label = "out1";
|
||||
gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led-out2 {
|
||||
label = "out2";
|
||||
gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
led-out3 {
|
||||
label = "out3";
|
||||
gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
led-out4 {
|
||||
label = "out4";
|
||||
gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
led-out5 {
|
||||
label = "out5";
|
||||
gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@6 {
|
||||
led-out6 {
|
||||
label = "out6";
|
||||
gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@7 {
|
||||
led-out7 {
|
||||
label = "out7";
|
||||
gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
@ -96,49 +96,58 @@
|
||||
};
|
||||
|
||||
/* Tricolor status LEDs */
|
||||
leds@1 {
|
||||
leds1 {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds>;
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "status0:red:cpu0";
|
||||
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "cpu0";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "status0:green:usr";
|
||||
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led2 {
|
||||
label = "status0:yellow:usr";
|
||||
gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
led3 {
|
||||
label = "status1:red:mmc0";
|
||||
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
led4 {
|
||||
label = "status1:green:usr";
|
||||
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
led5 {
|
||||
label = "status1:yellow:usr";
|
||||
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
gpio-decoder {
|
||||
compatible = "gpio-decoder";
|
||||
gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
|
||||
<&pca9536 2 GPIO_ACTIVE_HIGH>,
|
||||
<&pca9536 1 GPIO_ACTIVE_HIGH>,
|
||||
<&pca9536 0 GPIO_ACTIVE_HIGH>;
|
||||
linux,axis = <0>; /* ABS_X */
|
||||
decoder-max-value = <9>;
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
@ -161,7 +170,6 @@
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* (C15) spi0_cs1.mmc0_sdcd */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -178,6 +186,8 @@
|
||||
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
|
||||
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* (C15) spi0_cs1.spi0_cs1 */
|
||||
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -206,6 +216,38 @@
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
pca9536: gpio@41 {
|
||||
compatible = "ti,pca9536";
|
||||
reg = <0x41>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins_default>;
|
||||
|
||||
sn65hvs882@1 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
|
||||
|
||||
reg = <1>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
adc {
|
||||
ti,adc-channels = <1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
@ -20,7 +20,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
@ -31,14 +31,14 @@
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "com:green:user";
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -46,7 +46,7 @@
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vmmc: fixedregulator@0 {
|
||||
vmmc: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
@ -161,7 +161,7 @@
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
elm_id = <&elm>;
|
||||
ti,elm-id = <&elm>;
|
||||
|
||||
/* MTD partition table */
|
||||
partition@0 {
|
||||
|
@ -19,13 +19,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
/* Power supply provides a fixed 5V @2A */
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -34,7 +34,7 @@
|
||||
};
|
||||
|
||||
/* Power supply provides a fixed 3.3V @3A */
|
||||
vmmcsd_fixed: fixedregulator@1 {
|
||||
vmmcsd_fixed: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
@ -19,7 +19,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
@ -27,7 +27,7 @@
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "nanobone:green:usr1";
|
||||
gpios = <&gpio1 5 0>;
|
||||
default-state = "off";
|
||||
|
@ -20,7 +20,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -41,15 +41,15 @@
|
||||
compatible = "ti,da830-evm-audio";
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
};
|
||||
|
||||
v3v3c_reg: fixedregulator@1 {
|
||||
v3v3c_reg: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
};
|
||||
|
||||
vdd5_reg: fixedregulator@2 {
|
||||
vdd5_reg: fixedregulator2 {
|
||||
compatible = "regulator-fixed";
|
||||
};
|
||||
};
|
||||
@ -595,14 +595,14 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_pins>;
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "pepper:user0:blue";
|
||||
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "none";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "pepper:user1:red";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "none";
|
||||
@ -616,21 +616,21 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@0 {
|
||||
button0 {
|
||||
label = "home";
|
||||
linux,code = <KEY_HOME>;
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
button@1 {
|
||||
button1 {
|
||||
label = "menu";
|
||||
linux,code = <KEY_MENU>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
buttons@2 {
|
||||
buttons2 {
|
||||
label = "power";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
|
||||
|
@ -25,7 +25,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
@ -33,7 +33,7 @@
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
vcc5v: fixedregulator@0 {
|
||||
vcc5v: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -197,7 +197,7 @@
|
||||
gpmc,wr-access-ns = <30>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
elm_id = <&elm>;
|
||||
ti,elm-id = <&elm>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
@ -64,50 +64,50 @@
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "shc:power:red";
|
||||
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led2 {
|
||||
label = "shc:power:bl";
|
||||
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
led3 {
|
||||
label = "shc:lan:red";
|
||||
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
led4 {
|
||||
label = "shc:lan:bl";
|
||||
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
led5 {
|
||||
label = "shc:cloud:red";
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@6 {
|
||||
led6 {
|
||||
label = "shc:cloud:bl";
|
||||
gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator@0 {
|
||||
vmmcsd_fixed: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
@ -19,6 +19,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
@ -28,25 +33,25 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pins>;
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "sl50:green:usr0";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "sl50:red:usr1";
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led2 {
|
||||
label = "sl50:green:usr2";
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
led3 {
|
||||
label = "sl50:red:usr3";
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
@ -103,7 +108,7 @@
|
||||
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator@0 {
|
||||
vmmcsd_fixed: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
@ -11,10 +11,14 @@
|
||||
model = "Phytec AM335x phyBOARD-WEGA";
|
||||
compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
|
||||
|
||||
sound: sound_iface {
|
||||
compatible = "ti,da830-evm-audio";
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
vcc3v3: fixedregulator@1 {
|
||||
vcc3v3: fixedregulator1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
@ -24,6 +28,58 @@
|
||||
};
|
||||
};
|
||||
|
||||
/* Audio */
|
||||
&am33xx_pinmux {
|
||||
mcasp0_pins: pinmux_mcasp0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x9AC, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */
|
||||
AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
|
||||
AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
|
||||
AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
|
||||
AM33XX_IOPAD(0x9A8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
tlv320aic3007: tlv320aic3007@18 {
|
||||
compatible = "ti,tlv320aic3007";
|
||||
reg = <0x18>;
|
||||
AVDD-supply = <&vcc3v3>;
|
||||
IOVDD-supply = <&vcc3v3>;
|
||||
DRVDD-supply = <&vcc3v3>;
|
||||
DVDD-supply = <&vdig1_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mcasp0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcasp0_pins>;
|
||||
op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
serial-dir = <
|
||||
2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
|
||||
>;
|
||||
tx-num-evt = <16>;
|
||||
rt-num-evt = <16>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sound {
|
||||
ti,model = "AM335x-Wega";
|
||||
ti,audio-codec = <&tlv320aic3007>;
|
||||
ti,mcasp-controller = <&mcasp0>;
|
||||
ti,audio-routing =
|
||||
"Line Out", "LLOUT",
|
||||
"Line Out", "RLOUT",
|
||||
"LINE1L", "Line In",
|
||||
"LINE1R", "Line In";
|
||||
clocks = <&mcasp0_fck>;
|
||||
clock-names = "mclk";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CAN Busses */
|
||||
&am33xx_pinmux {
|
||||
dcan1_pins: pinmux_dcan1 {
|
||||
@ -99,6 +155,12 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Power */
|
||||
&vdig1_reg {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* UARTs */
|
||||
&am33xx_pinmux {
|
||||
uart0_pins: pinmux_uart0 {
|
||||
|
@ -11,11 +11,12 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/am33xx.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,am33xx";
|
||||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
@ -130,6 +131,7 @@
|
||||
reg = <0x210000 0x2000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#pinctrl-cells = <1>;
|
||||
ranges = <0 0x210000 0x2000>;
|
||||
|
||||
am33xx_pinmux: pinmux@800 {
|
||||
@ -137,6 +139,7 @@
|
||||
reg = <0x800 0x238>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0x7f>;
|
||||
};
|
||||
@ -187,7 +190,7 @@
|
||||
reg = <0x49000000 0x10000>;
|
||||
reg-names = "edma3_cc";
|
||||
interrupts = <12 13 14>;
|
||||
interrupt-names = "edma3_ccint", "emda3_mperr",
|
||||
interrupt-names = "edma3_ccint", "edma3_mperr",
|
||||
"edma3_ccerrint";
|
||||
dma-requests = <64>;
|
||||
#dma-cells = <2>;
|
||||
@ -505,6 +508,8 @@
|
||||
interrupts = <75
|
||||
76>;
|
||||
ti,hwmods = "rtc";
|
||||
clocks = <&clkdiv32k_ick>;
|
||||
clock-names = "int-clk";
|
||||
};
|
||||
|
||||
spi0: spi@48030000 {
|
||||
@ -679,20 +684,24 @@
|
||||
0x48300200 0x48300200 0x80>; /* EHRPWM */
|
||||
|
||||
ecap0: ecap@48300100 {
|
||||
compatible = "ti,am33xx-ecap";
|
||||
compatible = "ti,am3352-ecap",
|
||||
"ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48300100 0x80>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
interrupts = <31>;
|
||||
interrupt-names = "ecap0";
|
||||
ti,hwmods = "ecap0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm0: pwm@48300200 {
|
||||
compatible = "ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48300200 0x80>;
|
||||
ti,hwmods = "ehrpwm0";
|
||||
clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -709,20 +718,24 @@
|
||||
0x48302200 0x48302200 0x80>; /* EHRPWM */
|
||||
|
||||
ecap1: ecap@48302100 {
|
||||
compatible = "ti,am33xx-ecap";
|
||||
compatible = "ti,am3352-ecap",
|
||||
"ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48302100 0x80>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
interrupts = <47>;
|
||||
interrupt-names = "ecap1";
|
||||
ti,hwmods = "ecap1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm1: pwm@48302200 {
|
||||
compatible = "ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48302200 0x80>;
|
||||
ti,hwmods = "ehrpwm1";
|
||||
clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -739,20 +752,24 @@
|
||||
0x48304200 0x48304200 0x80>; /* EHRPWM */
|
||||
|
||||
ecap2: ecap@48304100 {
|
||||
compatible = "ti,am33xx-ecap";
|
||||
compatible = "ti,am3352-ecap",
|
||||
"ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48304100 0x80>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
interrupts = <61>;
|
||||
interrupt-names = "ecap2";
|
||||
ti,hwmods = "ecap2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm2: pwm@48304200 {
|
||||
compatible = "ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48304200 0x80>;
|
||||
ti,hwmods = "ehrpwm2";
|
||||
clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -766,7 +783,6 @@
|
||||
ale_entries = <1024>;
|
||||
bd_ram_size = <0x2000>;
|
||||
no_bd_ram = <0>;
|
||||
rx_descs = <64>;
|
||||
mac_control = <0x20>;
|
||||
slaves = <2>;
|
||||
active_slave = <0>;
|
||||
@ -789,7 +805,7 @@
|
||||
status = "disabled";
|
||||
|
||||
davinci_mdio: mdio@4a101000 {
|
||||
compatible = "ti,davinci_mdio";
|
||||
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "davinci_mdio";
|
||||
@ -844,6 +860,8 @@
|
||||
interrupts = <16>;
|
||||
ti,hwmods = "adc_tsc";
|
||||
status = "disabled";
|
||||
dmas = <&edma 53 0>, <&edma 57 0>;
|
||||
dma-names = "fifo0", "fifo1";
|
||||
|
||||
tsc {
|
||||
compatible = "ti,am3359-tsc";
|
||||
|
@ -15,12 +15,12 @@
|
||||
model = "TI AM3517 CraneBoard (TMDSEVM3517)";
|
||||
compatible = "ti,am3517-craneboard", "ti,am3517", "ti,omap3";
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
|
@ -13,7 +13,7 @@
|
||||
model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
|
||||
compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
@ -15,7 +15,7 @@
|
||||
serial3 = &uart4;
|
||||
};
|
||||
|
||||
ocp {
|
||||
ocp@68000000 {
|
||||
am35x_otg_hs: am35x_otg_hs@5c040000 {
|
||||
compatible = "ti,omap3-musb";
|
||||
ti,hwmods = "am35x_otg_hs";
|
||||
@ -66,6 +66,7 @@
|
||||
reg = <0x480025d8 0x24>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
|
@ -13,7 +13,7 @@
|
||||
model = "TeeJet Mt.Ventoux";
|
||||
compatible = "teejet,mt_ventoux", "ti,omap3";
|
||||
|
||||
memory {
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
@ -11,12 +11,17 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,am4372", "ti,am43";
|
||||
interrupt-parent = <&wakeupgen>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
@ -44,10 +49,49 @@
|
||||
clocks = <&dpll_mpu_ck>;
|
||||
clock-names = "cpu";
|
||||
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
|
||||
ti,syscon-rev = <&scm_conf 0x600>;
|
||||
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
};
|
||||
|
||||
cpu0_opp_table: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp50@300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <950000 931000 969000>;
|
||||
opp-supported-hw = <0xFF 0x01>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0xFF 0x04>;
|
||||
};
|
||||
|
||||
opp120@720000000 {
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <1200000 1176000 1224000>;
|
||||
opp-supported-hw = <0xFF 0x08>;
|
||||
};
|
||||
|
||||
oppturbo@800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1260000 1234800 1285200>;
|
||||
opp-supported-hw = <0xFF 0x10>;
|
||||
};
|
||||
|
||||
oppnitro@1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <1325000 1298500 1351500>;
|
||||
opp-supported-hw = <0xFF 0x20>;
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller@48241000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
interrupt-controller;
|
||||
@ -93,7 +137,7 @@
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
||||
ocp {
|
||||
ocp@44000000 {
|
||||
compatible = "ti,am4372-l3-noc", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -146,6 +190,7 @@
|
||||
reg = <0x800 0x31c>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <32>;
|
||||
@ -199,7 +244,7 @@
|
||||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "edma3_ccint", "emda3_mperr",
|
||||
interrupt-names = "edma3_ccint", "edma3_mperr",
|
||||
"edma3_ccerrint";
|
||||
dma-requests = <64>;
|
||||
#dma-cells = <2>;
|
||||
@ -626,7 +671,6 @@
|
||||
ale_entries = <1024>;
|
||||
bd_ram_size = <0x2000>;
|
||||
no_bd_ram = <0>;
|
||||
rx_descs = <64>;
|
||||
mac_control = <0x20>;
|
||||
slaves = <2>;
|
||||
active_slave = <0>;
|
||||
@ -636,7 +680,7 @@
|
||||
syscon = <&scm_conf>;
|
||||
|
||||
davinci_mdio: mdio@4a101000 {
|
||||
compatible = "ti,am4372-mdio","ti,davinci_mdio";
|
||||
compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
|
||||
reg = <0x4a101000 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -672,18 +716,24 @@
|
||||
status = "disabled";
|
||||
|
||||
ecap0: ecap@48300100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
compatible = "ti,am4372-ecap",
|
||||
"ti,am3352-ecap",
|
||||
"ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48300100 0x80>;
|
||||
ti,hwmods = "ecap0";
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm0: pwm@48300200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am4372-ehrpwm",
|
||||
"ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48300200 0x80>;
|
||||
ti,hwmods = "ehrpwm0";
|
||||
clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -698,18 +748,24 @@
|
||||
status = "disabled";
|
||||
|
||||
ecap1: ecap@48302100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
compatible = "ti,am4372-ecap",
|
||||
"ti,am3352-ecap",
|
||||
"ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48302100 0x80>;
|
||||
ti,hwmods = "ecap1";
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm1: pwm@48302200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am4372-ehrpwm",
|
||||
"ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48302200 0x80>;
|
||||
ti,hwmods = "ehrpwm1";
|
||||
clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -724,18 +780,24 @@
|
||||
status = "disabled";
|
||||
|
||||
ecap2: ecap@48304100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
compatible = "ti,am4372-ecap",
|
||||
"ti,am3352-ecap",
|
||||
"ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48304100 0x80>;
|
||||
ti,hwmods = "ecap2";
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm2: pwm@48304200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am4372-ehrpwm",
|
||||
"ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48304200 0x80>;
|
||||
ti,hwmods = "ehrpwm2";
|
||||
clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -750,10 +812,13 @@
|
||||
status = "disabled";
|
||||
|
||||
ehrpwm3: pwm@48306200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am4372-ehrpwm",
|
||||
"ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48306200 0x80>;
|
||||
ti,hwmods = "ehrpwm3";
|
||||
clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -768,10 +833,13 @@
|
||||
status = "disabled";
|
||||
|
||||
ehrpwm4: pwm@48308200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am4372-ehrpwm",
|
||||
"ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48308200 0x80>;
|
||||
ti,hwmods = "ehrpwm4";
|
||||
clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -786,10 +854,13 @@
|
||||
status = "disabled";
|
||||
|
||||
ehrpwm5: pwm@4830a200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
compatible = "ti,am4372-ehrpwm",
|
||||
"ti,am3352-ehrpwm",
|
||||
"ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x4830a200 0x80>;
|
||||
ti,hwmods = "ehrpwm5";
|
||||
clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@ -802,6 +873,8 @@
|
||||
clocks = <&adc_tsc_fck>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
dmas = <&edma 53 0>, <&edma 57 0>;
|
||||
dma-names = "fifo0", "fifo1";
|
||||
|
||||
tsc {
|
||||
compatible = "ti,am3359-tsc";
|
||||
@ -843,6 +916,13 @@
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
rng: rng@48310000 {
|
||||
compatible = "ti,omap4-rng";
|
||||
ti,hwmods = "rng";
|
||||
reg = <0x48310000 0x2000>;
|
||||
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
mcasp0: mcasp@48038000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
ti,hwmods = "mcasp0";
|
||||
|
@ -209,7 +209,6 @@
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
dcdc1: regulator-dcdc1 {
|
||||
compatible = "ti,tps65218-dcdc1";
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1144000>;
|
||||
@ -218,7 +217,6 @@
|
||||
};
|
||||
|
||||
dcdc2: regulator-dcdc2 {
|
||||
compatible = "ti,tps65218-dcdc2";
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1378000>;
|
||||
@ -227,7 +225,6 @@
|
||||
};
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-suspend-enable;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
@ -237,7 +234,6 @@
|
||||
};
|
||||
|
||||
dcdc5: regulator-dcdc5 {
|
||||
compatible = "ti,tps65218-dcdc5";
|
||||
regulator-name = "v1_0bat";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
@ -246,7 +242,6 @@
|
||||
};
|
||||
|
||||
dcdc6: regulator-dcdc6 {
|
||||
compatible = "ti,tps65218-dcdc6";
|
||||
regulator-name = "v1_8bat";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
@ -255,7 +250,6 @@
|
||||
};
|
||||
|
||||
ldo1: regulator-ldo1 {
|
||||
compatible = "ti,tps65218-ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
|
@ -58,7 +58,7 @@
|
||||
default-brightness-level = <8>;
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
matrix_keypad: matrix_keypad0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <2>;
|
||||
@ -513,7 +513,6 @@
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
dcdc1: regulator-dcdc1 {
|
||||
compatible = "ti,tps65218-dcdc1";
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1144000>;
|
||||
@ -522,7 +521,6 @@
|
||||
};
|
||||
|
||||
dcdc2: regulator-dcdc2 {
|
||||
compatible = "ti,tps65218-dcdc2";
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1378000>;
|
||||
@ -531,33 +529,42 @@
|
||||
};
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
regulator-state-disk {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc5: regulator-dcdc5 {
|
||||
compatible = "ti,tps65218-dcdc5";
|
||||
regulator-name = "v1_0bat";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc6: regulator-dcdc6 {
|
||||
compatible = "ti,tps65218-dcdc6";
|
||||
regulator-name = "v1_8bat";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
ldo1: regulator-ldo1 {
|
||||
compatible = "ti,tps65218-ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
@ -897,7 +904,7 @@
|
||||
pinctrl-0 = <&dss_pins>;
|
||||
|
||||
port {
|
||||
dpi_out: endpoint@0 {
|
||||
dpi_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
@ -975,3 +982,7 @@
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu {
|
||||
cpu0-supply = <&dcdc2>;
|
||||
};
|
||||
|
@ -104,7 +104,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
switch0 {
|
||||
label = "power-button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
|
||||
@ -117,6 +117,58 @@
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
leds-iio {
|
||||
status = "disabled";
|
||||
compatible = "gpio-leds";
|
||||
led-out0 {
|
||||
label = "out0";
|
||||
gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out1 {
|
||||
label = "out1";
|
||||
gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out2 {
|
||||
label = "out2";
|
||||
gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out3 {
|
||||
label = "out3";
|
||||
gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out4 {
|
||||
label = "out4";
|
||||
gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out5 {
|
||||
label = "out5";
|
||||
gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out6 {
|
||||
label = "out6";
|
||||
gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out7 {
|
||||
label = "out7";
|
||||
gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&am43xx_pinmux {
|
||||
@ -178,6 +230,24 @@
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins_default: spi1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2) /* mii1_col.spi1_sclk */
|
||||
AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* mii1_rx_er.spi1_d1 */
|
||||
AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */
|
||||
AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7) /* mii1_crs.gpio3_1 */
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins_sleep: spi1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins_default: backlight_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
|
||||
@ -290,6 +360,33 @@
|
||||
pinctrl-0 = <&i2c2_pins_default>;
|
||||
pinctrl-1 = <&i2c2_pins_sleep>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tpic2810: tpic2810@60 {
|
||||
compatible = "ti,tpic2810";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi1_pins_default>;
|
||||
pinctrl-1 = <&spi1_pins_sleep>;
|
||||
ti,pindir-d0-out-d1-in;
|
||||
|
||||
sn65hvs882: sn65hvs882@0 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
|
||||
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
@ -310,6 +407,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -382,6 +483,7 @@
|
||||
};
|
||||
|
||||
&mac {
|
||||
slaves = <1>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
|
@ -145,7 +145,7 @@
|
||||
pinctrl-0 = <&dss_pinctrl_default>;
|
||||
|
||||
port {
|
||||
dpi_lcd_out: endpoint@0 {
|
||||
dpi_lcd_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
|
@ -64,7 +64,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
matrix_keypad: matrix_keypad0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
|
||||
pinctrl-names = "default";
|
||||
@ -93,28 +93,28 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_pins>;
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "am437x-sk:red:heartbeat";
|
||||
gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "am437x-sk:green:mmc1";
|
||||
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led2 {
|
||||
label = "am437x-sk:blue:cpu0";
|
||||
gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
|
||||
linux,default-trigger = "cpu0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
led3 {
|
||||
label = "am437x-sk:blue:usr3";
|
||||
gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
|
||||
default-state = "off";
|
||||
@ -428,7 +428,6 @@
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
dcdc1: regulator-dcdc1 {
|
||||
compatible = "ti,tps65218-dcdc1";
|
||||
/* VDD_CORE limits min of OPP50 and max of OPP100 */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912000>;
|
||||
@ -438,7 +437,6 @@
|
||||
};
|
||||
|
||||
dcdc2: regulator-dcdc2 {
|
||||
compatible = "ti,tps65218-dcdc2";
|
||||
/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912000>;
|
||||
@ -448,16 +446,20 @@
|
||||
};
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdds_ddr";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
regulator-state-disk {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc4: regulator-dcdc4 {
|
||||
compatible = "ti,tps65218-dcdc4";
|
||||
regulator-name = "v3_3d";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@ -465,8 +467,31 @@
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc5: regulator-dcdc5 {
|
||||
compatible = "ti,tps65218-dcdc5";
|
||||
regulator-name = "v1_0bat";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc6: regulator-dcdc6 {
|
||||
compatible = "ti,tps65218-dcdc6";
|
||||
regulator-name = "v1_8bat";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
ldo1: regulator-ldo1 {
|
||||
compatible = "ti,tps65218-ldo1";
|
||||
regulator-name = "v1_8d";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
@ -32,7 +32,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
vbat: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@ -67,7 +67,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
matrix_keypad: matrix_keypad0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <2>;
|
||||
@ -421,7 +421,6 @@
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
dcdc1: regulator-dcdc1 {
|
||||
compatible = "ti,tps65218-dcdc1";
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1144000>;
|
||||
@ -430,7 +429,6 @@
|
||||
};
|
||||
|
||||
dcdc2: regulator-dcdc2 {
|
||||
compatible = "ti,tps65218-dcdc2";
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1378000>;
|
||||
@ -439,7 +437,6 @@
|
||||
};
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
@ -448,7 +445,6 @@
|
||||
};
|
||||
|
||||
dcdc4: regulator-dcdc4 {
|
||||
compatible = "ti,tps65218-dcdc4";
|
||||
regulator-name = "vdcdc4";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@ -457,21 +453,18 @@
|
||||
};
|
||||
|
||||
dcdc5: regulator-dcdc5 {
|
||||
compatible = "ti,tps65218-dcdc5";
|
||||
regulator-name = "v1_0bat";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
};
|
||||
|
||||
dcdc6: regulator-dcdc6 {
|
||||
compatible = "ti,tps65218-dcdc6";
|
||||
regulator-name = "v1_8bat";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
ldo1: regulator-ldo1 {
|
||||
compatible = "ti,tps65218-ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
@ -754,7 +747,7 @@
|
||||
pinctrl-0 = <&dss_pins>;
|
||||
|
||||
port {
|
||||
dpi_out: endpoint@0 {
|
||||
dpi_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
|
@ -104,6 +104,14 @@
|
||||
clock-div = <1>;
|
||||
};
|
||||
|
||||
rng_fck: rng_fck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&sys_clkin_ck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <1>;
|
||||
};
|
||||
|
||||
ehrpwm0_tbclk: ehrpwm0_tbclk@664 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
|
81
sys/gnu/dts/arm/am571x-idk.dts
Normal file
81
sys/gnu/dts/arm/am571x-idk.dts
Normal file
@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "dra72x.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "am57xx-idk-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI AM5718 IDK";
|
||||
compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x40000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
cpu0-led {
|
||||
label = "status0:red:cpu0";
|
||||
gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "cpu0";
|
||||
};
|
||||
|
||||
usr0-led {
|
||||
label = "status0:green:usr";
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
heartbeat-led {
|
||||
label = "status0:blue:heartbeat";
|
||||
gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
usr1-led {
|
||||
label = "status1:red:usr";
|
||||
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
usr2-led {
|
||||
label = "status1:green:usr";
|
||||
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
mmc0-led {
|
||||
label = "status1:blue:mmc0";
|
||||
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&ldo1_reg>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&extcon_usb2 {
|
||||
id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
|
||||
vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
@ -18,16 +18,11 @@
|
||||
compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
|
||||
"ti,dra7";
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
extcon_usb2: extcon_usb2 {
|
||||
compatible = "linux,extcon-usb-gpio";
|
||||
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
status-leds {
|
||||
compatible = "gpio-leds";
|
||||
cpu0-led {
|
||||
@ -76,6 +71,11 @@
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&extcon_usb2 {
|
||||
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
|
||||
vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&v3_3d>;
|
||||
@ -83,3 +83,11 @@
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&sn65hvs882 {
|
||||
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
597
sys/gnu/dts/arm/am57xx-beagle-x15-common.dtsi
Normal file
597
sys/gnu/dts/arm/am57xx-beagle-x15-common.dtsi
Normal file
@ -0,0 +1,597 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "dra74x.dtsi"
|
||||
#include "am57xx-commercial-grade.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
aliases {
|
||||
rtc0 = &mcp_rtc;
|
||||
rtc1 = &tps659038_rtc;
|
||||
rtc2 = &rtc;
|
||||
display0 = &hdmi0;
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
vdd_3v3: fixedregulator-vdd_3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3";
|
||||
vin-supply = <®en1>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
aic_dvdd: fixedregulator-aic_dvdd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "aic_dvdd_fixed";
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vtt_fixed: fixedregulator-vtt {
|
||||
/* TPS51200 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vtt_fixed";
|
||||
vin-supply = <&smps3_reg>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
label = "beagle-x15:usr0";
|
||||
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "beagle-x15:usr1";
|
||||
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "cpu0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "beagle-x15:usr2";
|
||||
gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led3 {
|
||||
label = "beagle-x15:usr3";
|
||||
gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "disk-activity";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_fan: gpio_fan {
|
||||
/* Based on 5v 500mA AFB02505HHB */
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
|
||||
gpio-fan,speed-map = <0 0>,
|
||||
<13000 1>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
hdmi0: connector {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&tpd12s015_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tpd12s015: encoder {
|
||||
compatible = "ti,tpd12s015";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tpd12s015_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tpd12s015_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sound0: sound0 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "BeagleBoard-X15";
|
||||
simple-audio-card,widgets =
|
||||
"Line", "Line Out",
|
||||
"Line", "Line In";
|
||||
simple-audio-card,routing =
|
||||
"Line Out", "LLOUT",
|
||||
"Line Out", "RLOUT",
|
||||
"MIC2L", "Line In",
|
||||
"MIC2R", "Line In";
|
||||
simple-audio-card,format = "dsp_b";
|
||||
simple-audio-card,bitclock-master = <&sound0_master>;
|
||||
simple-audio-card,frame-master = <&sound0_master>;
|
||||
simple-audio-card,bitclock-inversion;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp3>;
|
||||
};
|
||||
|
||||
sound0_master: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3104>;
|
||||
clocks = <&clkout2_clk>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins_default: mmc2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps659038: tps659038@58 {
|
||||
compatible = "ti,tps659038";
|
||||
reg = <0x58>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
ti,palmas-override-powerhold;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
regulators {
|
||||
smps12_reg: smps12 {
|
||||
/* VDD_MPU */
|
||||
regulator-name = "smps12";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps3_reg: smps3 {
|
||||
/* VDD_DDR */
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps45_reg: smps45 {
|
||||
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
|
||||
regulator-name = "smps45";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps6_reg: smps6 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "smps6";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* SMPS7 unused */
|
||||
|
||||
smps8_reg: smps8 {
|
||||
/* VDD_1V8 */
|
||||
regulator-name = "smps8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* SMPS9 unused */
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/* VDD_SD / VDDSHV8 */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
/* VDD_SHV5 */
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* VDDA_1V8_PHYA */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
/* VDDA_1V8_PHYB */
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
/* VDD_RTC */
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldoln_reg: ldoln {
|
||||
/* VDDA_1V8_PLL */
|
||||
regulator-name = "ldoln";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldousb_reg: ldousb {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
regulator-name = "ldousb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
regen1: regen1 {
|
||||
/* VDD_3V3_ON */
|
||||
regulator-name = "regen1";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tps659038_rtc: tps659038_rtc {
|
||||
compatible = "ti,palmas-rtc";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
tps659038_pwr_button: tps659038_pwr_button {
|
||||
compatible = "ti,palmas-pwrbutton";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <12>;
|
||||
};
|
||||
|
||||
tps659038_gpio: tps659038_gpio {
|
||||
compatible = "ti,palmas-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
extcon_usb2: tps659038_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
ti,enable-vbus-detection;
|
||||
vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
tmp102: tmp102@48 {
|
||||
compatible = "ti,tmp102";
|
||||
reg = <0x48>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
tlv320aic3104: tlv320aic3104@18 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "ti,tlv320aic3104";
|
||||
reg = <0x18>;
|
||||
assigned-clocks = <&clkoutmux2_clk_mux>;
|
||||
assigned-clock-parents = <&sys_clk2_dclk_div>;
|
||||
|
||||
status = "okay";
|
||||
adc-settle-ms = <40>;
|
||||
|
||||
AVDD-supply = <&vdd_3v3>;
|
||||
IOVDD-supply = <&vdd_3v3>;
|
||||
DRVDD-supply = <&vdd_3v3>;
|
||||
DVDD-supply = <&aic_dvdd>;
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
mcp_rtc: rtc@6f {
|
||||
compatible = "microchip,mcp7941x";
|
||||
reg = <0x6f>;
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&dra7_pmx_core 0x424>;
|
||||
interrupt-names = "irq", "wakeup";
|
||||
|
||||
vcc-supply = <&vdd_3v3>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio7 {
|
||||
ti,no-reset-on-init;
|
||||
ti,no-idle-on-init;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps12_reg>;
|
||||
voltage-tolerance = <1>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&dra7_pmx_core 0x3f8>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
dual_emac;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <2>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins_default>;
|
||||
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
cap-mmc-dual-data-rate;
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
/*
|
||||
* Stand alone usage is peripheral only.
|
||||
* However, with some resistor modifications
|
||||
* this port can be used via expansion connectors
|
||||
* as "host" or "dual-role". If so, provide
|
||||
* the necessary dr_mode override in the expansion
|
||||
* board's DT.
|
||||
*/
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&cpu_trips {
|
||||
cpu_alert1: cpu_alert1 {
|
||||
temperature = <50000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_cooling_maps {
|
||||
map1 {
|
||||
trip = <&cpu_alert1>;
|
||||
cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
&thermal_zones {
|
||||
board_thermal: board_thermal {
|
||||
polling-delay-passive = <1250>; /* milliseconds */
|
||||
polling-delay = <1500>; /* milliseconds */
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&tmp102 0>;
|
||||
|
||||
board_trips: trips {
|
||||
board_alert0: board_alert {
|
||||
temperature = <40000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
|
||||
board_crit: board_crit {
|
||||
temperature = <105000>; /* millicelsius */
|
||||
hysteresis = <0>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
board_cooling_maps: cooling-maps {
|
||||
map0 {
|
||||
trip = <&board_alert0>;
|
||||
cooling-device =
|
||||
<&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
vdda_video-supply = <&ldoln_reg>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
vdda-supply = <&ldo4_reg>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&tpd12s015_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&mcasp3 {
|
||||
#sound-dai-cells = <0>;
|
||||
assigned-clocks = <&mcasp3_ahclkx_mux>;
|
||||
assigned-clock-parents = <&sys_clkin2>;
|
||||
status = "okay";
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
/* 4 serializers */
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
1 2 0 0
|
||||
>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
&mailbox5 {
|
||||
status = "okay";
|
||||
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox6 {
|
||||
status = "okay";
|
||||
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
24
sys/gnu/dts/arm/am57xx-beagle-x15-revb1.dts
Normal file
24
sys/gnu/dts/arm/am57xx-beagle-x15-revb1.dts
Normal file
@ -0,0 +1,24 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "am57xx-beagle-x15-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI AM5728 BeagleBoard-X15 rev B1";
|
||||
};
|
||||
|
||||
&tpd12s015 {
|
||||
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
|
||||
<&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE */
|
||||
<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
vmmc-aux-supply = <&ldo1_reg>;
|
||||
};
|
@ -1,822 +1,24 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "dra74x.dtsi"
|
||||
#include "am57xx-commercial-grade.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "am57xx-beagle-x15-common.dtsi"
|
||||
|
||||
/ {
|
||||
/* NOTE: This describes the "original" pre-production A2 revision */
|
||||
model = "TI AM5728 BeagleBoard-X15";
|
||||
compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
aliases {
|
||||
rtc0 = &mcp_rtc;
|
||||
rtc1 = &tps659038_rtc;
|
||||
rtc2 = &rtc;
|
||||
display0 = &hdmi0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
vdd_3v3: fixedregulator-vdd_3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3";
|
||||
vin-supply = <®en1>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
aic_dvdd: fixedregulator-aic_dvdd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "aic_dvdd_fixed";
|
||||
vin-supply = <&vdd_3v3>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vtt_fixed: fixedregulator-vtt {
|
||||
/* TPS51200 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vtt_fixed";
|
||||
vin-supply = <&smps3_reg>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_pins_default>;
|
||||
|
||||
led@0 {
|
||||
label = "beagle-x15:usr0";
|
||||
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
label = "beagle-x15:usr1";
|
||||
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "cpu0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "beagle-x15:usr2";
|
||||
gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "beagle-x15:usr3";
|
||||
gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "ide-disk";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_fan: gpio_fan {
|
||||
/* Based on 5v 500mA AFB02505HHB */
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
|
||||
gpio-fan,speed-map = <0 0>,
|
||||
<13000 1>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
hdmi0: connector {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&tpd12s015_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tpd12s015: encoder {
|
||||
compatible = "ti,tpd12s015";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tpd12s015_pins>;
|
||||
};
|
||||
|
||||
&tpd12s015 {
|
||||
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
|
||||
<&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
|
||||
<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tpd12s015_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tpd12s015_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sound0: sound0 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "BeagleBoard-X15";
|
||||
simple-audio-card,widgets =
|
||||
"Line", "Line Out",
|
||||
"Line", "Line In";
|
||||
simple-audio-card,routing =
|
||||
"Line Out", "LLOUT",
|
||||
"Line Out", "RLOUT",
|
||||
"MIC2L", "Line In",
|
||||
"MIC2R", "Line In";
|
||||
simple-audio-card,format = "dsp_b";
|
||||
simple-audio-card,bitclock-master = <&sound0_master>;
|
||||
simple-audio-card,frame-master = <&sound0_master>;
|
||||
simple-audio-card,bitclock-inversion;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp3>;
|
||||
};
|
||||
|
||||
sound0_master: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3104>;
|
||||
clocks = <&clkout2_clk>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
leds_pins_default: leds_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
|
||||
DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
|
||||
DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
|
||||
DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
|
||||
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_pins: pinmux_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins_default: i2c3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins_default: uart3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins_default: mmc2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_pins_default: cpsw_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
|
||||
|
||||
/* Slave 2 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
|
||||
>;
|
||||
|
||||
};
|
||||
|
||||
cpsw_pins_sleep: cpsw_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
|
||||
|
||||
/* Slave 2 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_default: davinci_mdio_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
tps659038_pins_default: tps659038_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tmp102_pins_default: tmp102_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcp79410_pins_default: mcp79410_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
|
||||
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pins_default: clkout2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pins_sleep: clkout2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins_default: mcasp3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins_sleep: mcasp3_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps659038: tps659038@58 {
|
||||
compatible = "ti,tps659038";
|
||||
reg = <0x58>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tps659038_pins_default>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
regulators {
|
||||
smps12_reg: smps12 {
|
||||
/* VDD_MPU */
|
||||
regulator-name = "smps12";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps3_reg: smps3 {
|
||||
/* VDD_DDR */
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps45_reg: smps45 {
|
||||
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
|
||||
regulator-name = "smps45";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps6_reg: smps6 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "smps6";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* SMPS7 unused */
|
||||
|
||||
smps8_reg: smps8 {
|
||||
/* VDD_1V8 */
|
||||
regulator-name = "smps8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* SMPS9 unused */
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/* VDD_SD / VDDSHV8 */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
/* VDD_SHV5 */
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* VDDA_1V8_PHYA */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
/* VDDA_1V8_PHYB */
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
/* VDD_RTC */
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldoln_reg: ldoln {
|
||||
/* VDDA_1V8_PLL */
|
||||
regulator-name = "ldoln";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldousb_reg: ldousb {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
regulator-name = "ldousb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
regen1: regen1 {
|
||||
/* VDD_3V3_ON */
|
||||
regulator-name = "regen1";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tps659038_rtc: tps659038_rtc {
|
||||
compatible = "ti,palmas-rtc";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
tps659038_pwr_button: tps659038_pwr_button {
|
||||
compatible = "ti,palmas-pwrbutton";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <12>;
|
||||
};
|
||||
|
||||
tps659038_gpio: tps659038_gpio {
|
||||
compatible = "ti,palmas-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
extcon_usb2: tps659038_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
ti,enable-vbus-detection;
|
||||
vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
tmp102: tmp102@48 {
|
||||
compatible = "ti,tmp102";
|
||||
reg = <0x48>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tmp102_pins_default>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
tlv320aic3104: tlv320aic3104@18 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "ti,tlv320aic3104";
|
||||
reg = <0x18>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&clkout2_pins_default>;
|
||||
pinctrl-1 = <&clkout2_pins_sleep>;
|
||||
assigned-clocks = <&clkoutmux2_clk_mux>;
|
||||
assigned-clock-parents = <&sys_clk2_dclk_div>;
|
||||
|
||||
status = "okay";
|
||||
adc-settle-ms = <40>;
|
||||
|
||||
AVDD-supply = <&vdd_3v3>;
|
||||
IOVDD-supply = <&vdd_3v3>;
|
||||
DRVDD-supply = <&vdd_3v3>;
|
||||
DVDD-supply = <&aic_dvdd>;
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
mcp_rtc: rtc@6f {
|
||||
compatible = "microchip,mcp7941x";
|
||||
reg = <0x6f>;
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&dra7_pmx_core 0x424>;
|
||||
interrupt-names = "irq", "wakeup";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcp79410_pins_default>;
|
||||
|
||||
vcc-supply = <&vdd_3v3>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio7 {
|
||||
ti,no-reset-on-init;
|
||||
ti,no-idle-on-init;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps12_reg>;
|
||||
voltage-tolerance = <1>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&dra7_pmx_core 0x3f8>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins_default>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_pins_default>;
|
||||
pinctrl-1 = <&cpsw_pins_sleep>;
|
||||
dual_emac;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <2>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_pins_default>;
|
||||
pinctrl-1 = <&davinci_mdio_pins_sleep>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
|
||||
vmmc-supply = <&ldo1_reg>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins_default>;
|
||||
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
cap-mmc-dual-data-rate;
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
/*
|
||||
* Stand alone usage is peripheral only.
|
||||
* However, with some resistor modifications
|
||||
* this port can be used via expansion connectors
|
||||
* as "host" or "dual-role". If so, provide
|
||||
* the necessary dr_mode override in the expansion
|
||||
* board's DT.
|
||||
*/
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&cpu_trips {
|
||||
cpu_alert1: cpu_alert1 {
|
||||
temperature = <50000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_cooling_maps {
|
||||
map1 {
|
||||
trip = <&cpu_alert1>;
|
||||
cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
&thermal_zones {
|
||||
board_thermal: board_thermal {
|
||||
polling-delay-passive = <1250>; /* milliseconds */
|
||||
polling-delay = <1500>; /* milliseconds */
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&tmp102 0>;
|
||||
|
||||
board_trips: trips {
|
||||
board_alert0: board_alert {
|
||||
temperature = <40000>; /* millicelsius */
|
||||
hysteresis = <2000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
|
||||
board_crit: board_crit {
|
||||
temperature = <105000>; /* millicelsius */
|
||||
hysteresis = <0>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
board_cooling_maps: cooling-maps {
|
||||
map0 {
|
||||
trip = <&board_alert0>;
|
||||
cooling-device =
|
||||
<&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
vdda_video-supply = <&ldoln_reg>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
vdda-supply = <&ldo4_reg>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_pins>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&tpd12s015_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&mcasp3 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp3_pins_default>;
|
||||
pinctrl-1 = <&mcasp3_pins_sleep>;
|
||||
assigned-clocks = <&mcasp3_ahclkx_mux>;
|
||||
assigned-clock-parents = <&sys_clkin2>;
|
||||
status = "okay";
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
/* 4 serializers */
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
1 2 0 0
|
||||
>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
&mailbox5 {
|
||||
status = "okay";
|
||||
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox6 {
|
||||
status = "okay";
|
||||
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -19,7 +19,7 @@
|
||||
model = "CompuLab CL-SOM-AM57x";
|
||||
compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
|
||||
};
|
||||
@ -29,7 +29,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_pins_default>;
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "cl-som-am57x:green";
|
||||
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
@ -43,6 +43,58 @@
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds-iio {
|
||||
status = "disabled";
|
||||
compatible = "gpio-leds";
|
||||
led-out0 {
|
||||
label = "out0";
|
||||
gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out1 {
|
||||
label = "out1";
|
||||
gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out2 {
|
||||
label = "out2";
|
||||
gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out3 {
|
||||
label = "out3";
|
||||
gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out4 {
|
||||
label = "out4";
|
||||
gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out5 {
|
||||
label = "out5";
|
||||
gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out6 {
|
||||
label = "out6";
|
||||
gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out7 {
|
||||
label = "out7";
|
||||
gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
@ -57,6 +109,7 @@
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
ti,system-power-controller;
|
||||
ti,palmas-override-powerhold;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
@ -250,6 +303,35 @@
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
extcon_usb2: tps659038_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
ti,enable-vbus-detection;
|
||||
ti,enable-id-detection;
|
||||
/* ID & VBUS GPIOs provided in board dts */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi3 {
|
||||
status = "okay";
|
||||
ti,pindir-d0-out-d1-in;
|
||||
|
||||
sn65hvs882: sn65hvs882@0 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
|
||||
tpic2810: tpic2810@60 {
|
||||
compatible = "ti,tpic2810";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -294,7 +376,7 @@
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "otg";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
@ -304,3 +386,52 @@
|
||||
ti,non-removable;
|
||||
max-frequency = <96000000>;
|
||||
};
|
||||
|
||||
&qspi {
|
||||
status = "okay";
|
||||
|
||||
spi-max-frequency = <76800000>;
|
||||
m25p80@0 {
|
||||
compatible = "s25fl256s1", "jedec,spi-nor";
|
||||
spi-max-frequency = <76800000>;
|
||||
reg = <0>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* MTD partition table.
|
||||
* The ROM checks the first four physical blocks
|
||||
* for a valid file to boot and the flash here is
|
||||
* 64KiB block size.
|
||||
*/
|
||||
partition@0 {
|
||||
label = "QSPI.SPL";
|
||||
reg = <0x00000000 0x000040000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "QSPI.u-boot";
|
||||
reg = <0x00040000 0x00100000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "QSPI.u-boot-spl-os";
|
||||
reg = <0x00140000 0x00080000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "QSPI.u-boot-env";
|
||||
reg = <0x001c0000 0x00010000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "QSPI.u-boot-env.backup1";
|
||||
reg = <0x001d0000 0x0010000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "QSPI.kernel";
|
||||
reg = <0x001e0000 0x0800000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "QSPI.file-system";
|
||||
reg = <0x009e0000 0x01620000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -128,7 +128,7 @@
|
||||
vdda_video-supply = <&ldoln_reg>;
|
||||
|
||||
port {
|
||||
dpi_lcd_out: endpoint@0 {
|
||||
dpi_lcd_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
|
@ -32,15 +32,6 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
@ -114,7 +105,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
usb0: ohci@500000 {
|
||||
num-ports = <2>;
|
||||
atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
32
sys/gnu/dts/arm/arm-realview-eb-11mp-bbrevd-ctrevb.dts
Normal file
32
sys/gnu/dts/arm/arm-realview-eb-11mp-bbrevd-ctrevb.dts
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright 2016 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "arm-realview-eb-11mp-ctrevb.dts"
|
||||
#include "arm-realview-eb-bbrevd.dtsi"
|
||||
|
||||
/*
|
||||
* This is the EB with the new Revision D baseboard with SMSC9118 ethernet and
|
||||
* the Rev B core tile.
|
||||
*/
|
||||
/ {
|
||||
model = "ARM RealView Emulation Baseboard Rev D with ARM11MPCore Core Tile Rev B";
|
||||
};
|
28
sys/gnu/dts/arm/arm-realview-eb-11mp-bbrevd.dts
Normal file
28
sys/gnu/dts/arm/arm-realview-eb-11mp-bbrevd.dts
Normal file
@ -0,0 +1,28 @@
|
||||
/*
|
||||
* Copyright 2016 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "arm-realview-eb-11mp.dts"
|
||||
#include "arm-realview-eb-bbrevd.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView Emulation Baseboard Rev D with ARM11MPCore Rev C Core Tile";
|
||||
};
|
93
sys/gnu/dts/arm/arm-realview-eb-11mp-ctrevb.dts
Normal file
93
sys/gnu/dts/arm/arm-realview-eb-11mp-ctrevb.dts
Normal file
@ -0,0 +1,93 @@
|
||||
/*
|
||||
* Copyright 2016 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "arm-realview-eb-11mp.dts"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev B";
|
||||
};
|
||||
|
||||
/*
|
||||
* The revision B has a distinctly different layout of the syscon, so
|
||||
* append a specific compatible-string.
|
||||
*/
|
||||
&syscon {
|
||||
compatible = "arm,realview-eb11mp-revb-syscon", "arm,realview-eb-syscon", "syscon", "simple-mfd";
|
||||
};
|
||||
|
||||
&intc {
|
||||
reg = <0x10101000 0x1000>,
|
||||
<0x10100100 0x100>;
|
||||
};
|
||||
|
||||
&L2 {
|
||||
reg = <0x10102000 0x1000>;
|
||||
};
|
||||
|
||||
&scu {
|
||||
reg = <0x10100000 0x100>;
|
||||
};
|
||||
|
||||
&twd_timer {
|
||||
reg = <0x10100600 0x20>;
|
||||
};
|
||||
|
||||
&twd_wdog {
|
||||
reg = <0x10100620 0x20>;
|
||||
};
|
||||
|
||||
/*
|
||||
* On revision B, we cannot reach the secondary interrupt
|
||||
* controller, as a result, some peripherals that are dependent
|
||||
* on their IRQ cannot be reached, so disable them.
|
||||
*/
|
||||
&intc_second {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&serial2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&serial3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ssp {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&wdog {
|
||||
status = "disabled";
|
||||
};
|
@ -24,7 +24,7 @@
|
||||
#include "arm-realview-eb-mp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev C";
|
||||
model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev C Core Tile";
|
||||
arm,hbi = <0x146>;
|
||||
|
||||
/*
|
||||
|
28
sys/gnu/dts/arm/arm-realview-eb-a9mp-bbrevd.dts
Normal file
28
sys/gnu/dts/arm/arm-realview-eb-a9mp-bbrevd.dts
Normal file
@ -0,0 +1,28 @@
|
||||
/*
|
||||
* Copyright 2016 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "arm-realview-eb-a9mp.dts"
|
||||
#include "arm-realview-eb-bbrevd.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView EB Baseboard Rev D Cortex A9 MPCore";
|
||||
};
|
29
sys/gnu/dts/arm/arm-realview-eb-bbrevd.dts
Normal file
29
sys/gnu/dts/arm/arm-realview-eb-bbrevd.dts
Normal file
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright 2016 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/* This derives from the Realview Baseboard, and overlays the new ethernet */
|
||||
#include "arm-realview-eb.dts"
|
||||
#include "arm-realview-eb-bbrevd.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView Emulation Baseboard Rev D";
|
||||
};
|
45
sys/gnu/dts/arm/arm-realview-eb-bbrevd.dtsi
Normal file
45
sys/gnu/dts/arm/arm-realview-eb-bbrevd.dtsi
Normal file
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* Copyright 2016 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/ {
|
||||
/* Introduce a fixed regulator for the new ethernet controller */
|
||||
veth: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "veth";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* The revision D has a different ethernet controller that the elder boards:
|
||||
* the older board uses LAN91C111 but the new one uses LAN9118.
|
||||
*/
|
||||
ðernet {
|
||||
compatible = "smsc,lan9118", "smsc,lan9115";
|
||||
phy-mode = "mii";
|
||||
smsc,irq-active-high;
|
||||
smsc,irq-push-pull;
|
||||
vdd33a-supply = <&veth>;
|
||||
vddvario-supply = <&veth>;
|
||||
};
|
@ -51,14 +51,6 @@
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
veth: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "veth";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
xtal24mhz: xtal24mhz@24M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
@ -134,16 +126,15 @@
|
||||
bank-width = <4>;
|
||||
};
|
||||
|
||||
/* SMSC 9118 ethernet with PHY and EEPROM */
|
||||
/* SMSC LAN91C111 ethernet with PHY and EEPROM */
|
||||
ethernet: ethernet@4e000000 {
|
||||
compatible = "smsc,lan9118", "smsc,lan9115";
|
||||
compatible = "smsc,lan91c111";
|
||||
reg = <0x4e000000 0x10000>;
|
||||
phy-mode = "mii";
|
||||
reg-io-width = <4>;
|
||||
smsc,irq-active-high;
|
||||
smsc,irq-push-pull;
|
||||
vdd33a-supply = <&veth>;
|
||||
vddvario-supply = <&veth>;
|
||||
/*
|
||||
* This means the adapter can be accessed with 8, 16 or
|
||||
* 32 bit reads/writes.
|
||||
*/
|
||||
reg-io-width = <7>;
|
||||
};
|
||||
|
||||
usb: usb@4f000000 {
|
||||
|
@ -70,13 +70,12 @@
|
||||
* associativity as these may be erroneously set
|
||||
* up by boot loader(s).
|
||||
*/
|
||||
cache-size = <1048576>; // 1MB
|
||||
cache-sets = <4096>;
|
||||
cache-size = <131072>; // 128KB
|
||||
cache-sets = <512>;
|
||||
cache-line-size = <32>;
|
||||
arm,parity-disable;
|
||||
arm,tag-latency = <1>;
|
||||
arm,data-latency = <1 1>;
|
||||
arm,dirty-latency = <1>;
|
||||
arm,tag-latency = <1 1 1>;
|
||||
arm,data-latency = <1 1 1>;
|
||||
};
|
||||
|
||||
scu: scu@1f000000 {
|
||||
|
@ -67,7 +67,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
@ -86,18 +86,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -155,20 +143,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mx25l25635e", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
@ -196,24 +170,6 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* both standard PCIe slots and mini-PCIe
|
||||
* slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
@ -274,3 +230,49 @@
|
||||
compatible = "linux,spdif-dir";
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* both standard PCIe slots and mini-PCIe
|
||||
* slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mx25l25635e", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -62,7 +62,7 @@
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MiB */
|
||||
};
|
||||
@ -72,20 +72,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
sata@a0000 {
|
||||
nr-ports = <2>;
|
||||
@ -262,6 +248,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sata_l_white_pin: sata-l-white-pin {
|
||||
marvell,pins = "mpp57";
|
||||
|
@ -54,7 +54,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -64,22 +64,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected on the PCB to a USB 3.0 XHCI controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@ -113,17 +97,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -197,6 +170,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected on the PCB to a USB 3.0 XHCI controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pwr_led_pin: pwr-led-pin {
|
||||
marvell,pins = "mpp63";
|
||||
|
@ -56,7 +56,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -66,22 +66,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
|
||||
@ -99,14 +83,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -120,8 +96,11 @@
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
isl12057: isl12057@68 {
|
||||
@ -257,6 +236,30 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp57";
|
||||
|
@ -56,7 +56,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -66,22 +66,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Marvell 88SE9215 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
|
||||
@ -93,18 +77,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -126,8 +98,11 @@
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
isl12057: isl12057@68 {
|
||||
@ -279,6 +254,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Marvell 88SE9215 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp60";
|
||||
|
@ -67,7 +67,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -77,22 +77,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@ -102,14 +86,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@ -146,7 +122,7 @@
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
button@1 {
|
||||
button {
|
||||
label = "Software Button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
@ -196,7 +172,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
dsa {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
@ -235,8 +211,33 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&pinctrl {
|
||||
fan_pins: fan-pins {
|
||||
marvell,pins = "mpp8";
|
||||
|
@ -28,20 +28,7 @@
|
||||
compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
soc {
|
||||
pcie-controller {
|
||||
/* SATA AHCI controller 88SE9170 */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
mdio {
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
@ -131,3 +118,17 @@
|
||||
1300 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
/* SATA AHCI controller 88SE9170 */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -23,7 +23,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -32,15 +32,6 @@
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 bridge ASM1042A */
|
||||
pcie@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@ -51,15 +42,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
@ -159,19 +141,19 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@1 {
|
||||
power {
|
||||
label = "Power button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@2 {
|
||||
backup {
|
||||
label = "Backup button";
|
||||
linux,code = <KEY_OPTION>;
|
||||
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@3 {
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
@ -208,6 +190,25 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 bridge ASM1042A */
|
||||
pcie@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -24,7 +24,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -33,15 +33,6 @@
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 Bridge ASM1042A */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
coherency-fabric@20200 {
|
||||
broken-idle;
|
||||
@ -51,15 +42,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
@ -68,26 +50,6 @@
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
spi@10600 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
/* MX25L8006E */
|
||||
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -127,19 +89,19 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@1 {
|
||||
power {
|
||||
label = "Power button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@2 {
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@3 {
|
||||
button {
|
||||
label = "USB VBUS error";
|
||||
linux,code = <KEY_UNKNOWN>;
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
@ -163,6 +125,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 Bridge ASM1042A */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&sata_led_pin>;
|
||||
pinctrl-names = "default";
|
||||
@ -176,3 +156,23 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
/* MX25L8006E */
|
||||
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -70,7 +70,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@ -87,62 +87,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
/*
|
||||
* Warning!
|
||||
*
|
||||
* Synology u-boot uses its compiled-in environment
|
||||
* and it seems Synology did not care to change u-boot
|
||||
* default configuration in order to allow saving a
|
||||
* modified environment at a sensible location. So,
|
||||
* if you do a 'saveenv' under u-boot, your modified
|
||||
* environment will be saved at 1MB after the start
|
||||
* of the flash, i.e. in the middle of the uImage.
|
||||
* For that reason, it is strongly advised not to
|
||||
* change the default environment, unless you know
|
||||
* what you are doing.
|
||||
*/
|
||||
partition@00000000 { /* u-boot */
|
||||
label = "RedBoot";
|
||||
reg = <0x00000000 0x000c0000>; /* 768KB */
|
||||
};
|
||||
|
||||
partition@000c0000 { /* uImage */
|
||||
label = "zImage";
|
||||
reg = <0x000c0000 0x002d0000>; /* 2880KB */
|
||||
};
|
||||
|
||||
partition@00390000 { /* uInitramfs */
|
||||
label = "rd.gz";
|
||||
reg = <0x00390000 0x00440000>; /* 4250KB */
|
||||
};
|
||||
|
||||
partition@007d0000 { /* MAC address and serial number */
|
||||
label = "vendor";
|
||||
reg = <0x007d0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007e0000 {
|
||||
label = "RedBoot config";
|
||||
reg = <0x007e0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007f0000 {
|
||||
label = "FIS directory";
|
||||
reg = <0x007f0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
@ -183,12 +127,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
@ -248,7 +186,7 @@
|
||||
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata1_regulator: sata1-regulator {
|
||||
sata1_regulator: sata1-regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA1 Power";
|
||||
@ -261,7 +199,7 @@
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_regulator: sata2-regulator {
|
||||
sata2_regulator: sata2-regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "SATA2 Power";
|
||||
@ -276,6 +214,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
disk1_led_pin: disk1-led-pin {
|
||||
marvell,pins = "mpp31";
|
||||
@ -347,3 +291,59 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
/*
|
||||
* Warning!
|
||||
*
|
||||
* Synology u-boot uses its compiled-in environment
|
||||
* and it seems Synology did not care to change u-boot
|
||||
* default configuration in order to allow saving a
|
||||
* modified environment at a sensible location. So,
|
||||
* if you do a 'saveenv' under u-boot, your modified
|
||||
* environment will be saved at 1MB after the start
|
||||
* of the flash, i.e. in the middle of the uImage.
|
||||
* For that reason, it is strongly advised not to
|
||||
* change the default environment, unless you know
|
||||
* what you are doing.
|
||||
*/
|
||||
partition@00000000 { /* u-boot */
|
||||
label = "RedBoot";
|
||||
reg = <0x00000000 0x000c0000>; /* 768KB */
|
||||
};
|
||||
|
||||
partition@000c0000 { /* uImage */
|
||||
label = "zImage";
|
||||
reg = <0x000c0000 0x002d0000>; /* 2880KB */
|
||||
};
|
||||
|
||||
partition@00390000 { /* uInitramfs */
|
||||
label = "rd.gz";
|
||||
reg = <0x00390000 0x00440000>; /* 4250KB */
|
||||
};
|
||||
|
||||
partition@007d0000 { /* MAC address and serial number */
|
||||
label = "vendor";
|
||||
reg = <0x007d0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007e0000 {
|
||||
label = "RedBoot config";
|
||||
reg = <0x007e0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007f0000 {
|
||||
label = "FIS directory";
|
||||
reg = <0x007f0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -50,8 +50,6 @@
|
||||
* 370 and Armada XP SoC.
|
||||
*/
|
||||
|
||||
/include/ "skeleton64.dtsi"
|
||||
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
@ -86,7 +84,7 @@
|
||||
pcie-mem-aperture = <0xf8000000 0x7e00000>;
|
||||
pcie-io-aperture = <0xffe00000 0x100000>;
|
||||
|
||||
devbus-bootcs {
|
||||
devbus_bootcs: devbus-bootcs {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
|
||||
@ -96,7 +94,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs0 {
|
||||
devbus_cs0: devbus-cs0 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
|
||||
@ -106,7 +104,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs1 {
|
||||
devbus_cs1: devbus-cs1 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
|
||||
@ -116,7 +114,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs2 {
|
||||
devbus_cs2: devbus-cs2 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
|
||||
@ -126,7 +124,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs3 {
|
||||
devbus_cs3: devbus-cs3 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
|
||||
@ -142,32 +140,12 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
|
||||
|
||||
rtc@10300 {
|
||||
rtc: rtc@10300 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0x10300 0x20>;
|
||||
interrupts = <50>;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
reg = <0x10600 0x28>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <30>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
reg = <0x10680 0x28>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <92>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
#address-cells = <1>;
|
||||
@ -234,33 +212,38 @@
|
||||
msi-controller;
|
||||
};
|
||||
|
||||
coherency-fabric@20200 {
|
||||
coherencyfab: coherency-fabric@20200 {
|
||||
compatible = "marvell,coherency-fabric";
|
||||
reg = <0x20200 0xb0>, <0x21010 0x1c>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
timer: timer@20300 {
|
||||
reg = <0x20300 0x30>, <0x21040 0x30>;
|
||||
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
watchdog: watchdog@20300 {
|
||||
reg = <0x20300 0x34>, <0x20704 0x4>;
|
||||
};
|
||||
|
||||
pmsu@22000 {
|
||||
cpurst: cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x8>;
|
||||
};
|
||||
|
||||
pmsu: pmsu@22000 {
|
||||
compatible = "marvell,armada-370-pmsu";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
usb0: usb@50000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x500>;
|
||||
interrupts = <45>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@51000 {
|
||||
usb1: usb@51000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x51000 0x500>;
|
||||
interrupts = <46>;
|
||||
@ -274,7 +257,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio: mdio {
|
||||
mdio: mdio@72004 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
@ -289,7 +272,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
sata: sata@a0000 {
|
||||
compatible = "marvell,armada-370-sata";
|
||||
reg = <0xa0000 0x5000>;
|
||||
interrupts = <55>;
|
||||
@ -298,7 +281,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
nand: nand@d0000 {
|
||||
compatible = "marvell,armada370-nand";
|
||||
reg = <0xd0000 0x54>;
|
||||
#address-cells = <1>;
|
||||
@ -308,7 +291,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
sdio: mvsdio@d4000 {
|
||||
compatible = "marvell,orion-sdio";
|
||||
reg = <0xd4000 0x200>;
|
||||
interrupts = <54>;
|
||||
@ -320,6 +303,42 @@
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
|
||||
<MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
|
||||
<MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
|
||||
<MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
|
||||
<MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
|
||||
<MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
|
||||
<MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */
|
||||
<MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */
|
||||
<MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <30>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x28>, /* control */
|
||||
<MBUS_ID(0x01, 0x1a) 0 0xffffffff>, /* CS0 */
|
||||
<MBUS_ID(0x01, 0x5a) 0 0xffffffff>, /* CS1 */
|
||||
<MBUS_ID(0x01, 0x9a) 0 0xffffffff>, /* CS2 */
|
||||
<MBUS_ID(0x01, 0xda) 0 0xffffffff>, /* CS3 */
|
||||
<MBUS_ID(0x01, 0x1b) 0 0xffffffff>, /* CS4 */
|
||||
<MBUS_ID(0x01, 0x5b) 0 0xffffffff>, /* CS5 */
|
||||
<MBUS_ID(0x01, 0x9b) 0 0xffffffff>, /* CS6 */
|
||||
<MBUS_ID(0x01, 0xdb) 0 0xffffffff>; /* CS7 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <92>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
|
@ -50,9 +50,11 @@
|
||||
*/
|
||||
|
||||
#include "armada-370-xp.dtsi"
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
model = "Marvell Armada 370 family SoC";
|
||||
compatible = "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
@ -70,7 +72,7 @@
|
||||
reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-370-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@ -89,7 +91,7 @@
|
||||
0x82000000 0x2 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x2 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie0: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@ -106,7 +108,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@ -125,7 +127,7 @@
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
L2: l2-cache {
|
||||
L2: l2-cache@8000 {
|
||||
compatible = "marvell,aurora-outer-cache";
|
||||
reg = <0x08000 0x1000>;
|
||||
cache-id-part = <0x100>;
|
||||
@ -134,32 +136,6 @@
|
||||
wt-override;
|
||||
};
|
||||
|
||||
/*
|
||||
* Default SPI pinctrl setting, can be overwritten on
|
||||
* board level if a different configuration is used.
|
||||
*/
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-370-spi",
|
||||
"marvell,orion-spi";
|
||||
pinctrl-0 = <&spi0_pins1>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-370-spi",
|
||||
"marvell,orion-spi";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
reg = <0x11000 0x20>;
|
||||
};
|
||||
|
||||
i2c1: i2c@11100 {
|
||||
reg = <0x11100 0x20>;
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
@ -193,22 +169,8 @@
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Default UART pinctrl setting without RTS/CTS, can
|
||||
* be overwritten on board level if a different
|
||||
* configuration is used.
|
||||
*/
|
||||
uart0: serial@12000 {
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
uart1: serial@12100 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
systemc: system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
@ -226,37 +188,18 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
thermal@18300 {
|
||||
thermal: thermal@18300 {
|
||||
compatible = "marvell,armada370-thermal";
|
||||
reg = <0x18300 0x4
|
||||
0x18304 0x4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sscg@18330 {
|
||||
sscg: sscg@18330 {
|
||||
reg = <0x18330 0x4>;
|
||||
};
|
||||
|
||||
interrupt-controller@20a00 {
|
||||
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-370-timer";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,armada-370-wdt";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x8>;
|
||||
};
|
||||
|
||||
cpu-config@21000 {
|
||||
cpuconf: cpu-config@21000 {
|
||||
compatible = "marvell,armada-370-cpu-config";
|
||||
reg = <0x21000 0x8>;
|
||||
};
|
||||
@ -271,15 +214,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
usb@51000 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
xor@60800 {
|
||||
xor0: xor@60800 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60800 0x100
|
||||
0x60A00 0x100>;
|
||||
@ -298,7 +233,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
xor1: xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
@ -317,15 +252,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
crypto@90000 {
|
||||
cesa: crypto@90000 {
|
||||
compatible = "marvell,armada-370-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
@ -360,6 +287,59 @@
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Default UART pinctrl setting without RTS/CTS, can be overwritten on
|
||||
* board level if a different configuration is used.
|
||||
*/
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
reg = <0x11000 0x20>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
reg = <0x11100 0x20>;
|
||||
};
|
||||
|
||||
&mpic {
|
||||
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
|
||||
};
|
||||
|
||||
&timer {
|
||||
compatible = "marvell,armada-370-timer";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
compatible = "marvell,armada-370-wdt";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
ð0 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
compatible = "marvell,mv88f6710-pinctrl";
|
||||
|
||||
@ -447,3 +427,19 @@
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Default SPI pinctrl setting, can be overwritten on
|
||||
* board level if a different configuration is used.
|
||||
*/
|
||||
&spi0 {
|
||||
compatible = "marvell,armada-370-spi", "marvell,orion-spi";
|
||||
pinctrl-0 = <&spi0_pins1>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
compatible = "marvell,armada-370-spi", "marvell,orion-spi";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
@ -58,7 +58,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
@ -69,15 +69,36 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10600 {
|
||||
};
|
||||
};
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
&pcie0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/*
|
||||
* SPI conflicts with NAND, so we disable it
|
||||
* here, and select NAND as the enabled device
|
||||
* by default.
|
||||
* SPI conflicts with NAND, so we disable it here, and
|
||||
* select NAND as the enabled device by default.
|
||||
*/
|
||||
|
||||
status = "disabled";
|
||||
|
||||
spi-flash@0 {
|
||||
@ -87,39 +108,39 @@
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11100 {
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
&pinctrl {
|
||||
sdio_st_pins: sdio-st-pins {
|
||||
marvell,pins = "mpp44", "mpp45";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
&sata {
|
||||
status = "okay";
|
||||
nr-ports = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
nand: nand@d0000 {
|
||||
&nand {
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
@ -142,25 +163,25 @@
|
||||
label = "Filesystem";
|
||||
reg = <0x1000000 0x3f000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@54000 {
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb3@58000 {
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
&sdio {
|
||||
pinctrl-0 = <&sdio_pins &sdio_st_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
@ -168,39 +189,21 @@
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@f0000 {
|
||||
ðernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
eth0@c4000 {
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
||||
eth1@c5000 {
|
||||
ð1 {
|
||||
status = "okay";
|
||||
phy = <&phy3>;
|
||||
phy-mode = "gmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -45,7 +45,6 @@
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
@ -53,6 +52,9 @@
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
model = "Marvell Armada 375 family SoC";
|
||||
compatible = "marvell,armada375";
|
||||
|
||||
@ -65,7 +67,7 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
/* 1 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
@ -84,12 +86,12 @@
|
||||
#size-cells = <0>;
|
||||
enable-method = "marvell,armada-375-smp";
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
};
|
||||
cpu@1 {
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
@ -115,7 +117,7 @@
|
||||
reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
|
||||
};
|
||||
|
||||
devbus-bootcs {
|
||||
devbus_bootcs: devbus-bootcs {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
|
||||
@ -125,7 +127,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs0 {
|
||||
devbus_cs0: devbus-cs0 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
|
||||
@ -135,7 +137,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs1 {
|
||||
devbus_cs1: devbus-cs1 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
|
||||
@ -145,7 +147,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs2 {
|
||||
devbus_cs2: devbus-cs2 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
|
||||
@ -155,7 +157,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs3 {
|
||||
devbus_cs3: devbus-cs3 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
|
||||
@ -182,12 +184,12 @@
|
||||
prefetch-data = <1>;
|
||||
};
|
||||
|
||||
scu@c000 {
|
||||
scu: scu@c000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xc000 0x58>;
|
||||
};
|
||||
|
||||
timer@c600 {
|
||||
timer0: timer@c600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xc600 0x20>;
|
||||
interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
|
||||
@ -203,7 +205,7 @@
|
||||
<0xc100 0x100>;
|
||||
};
|
||||
|
||||
mdio {
|
||||
mdio: mdio@c0054 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
@ -212,7 +214,7 @@
|
||||
};
|
||||
|
||||
/* Network controller */
|
||||
ethernet@f0000 {
|
||||
ethernet: ethernet@f0000 {
|
||||
compatible = "marvell,armada-375-pp2";
|
||||
reg = <0xf0000 0xa000>, /* Packet Processor regs */
|
||||
<0xc0000 0x3060>, /* LMS regs */
|
||||
@ -222,20 +224,20 @@
|
||||
clock-names = "pp_clk", "gop_clk";
|
||||
status = "disabled";
|
||||
|
||||
eth0: eth0@c4000 {
|
||||
eth0: eth0 {
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
port-id = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
eth1: eth1@c5000 {
|
||||
eth1: eth1 {
|
||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
port-id = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
rtc: rtc@10300 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0x10300 0x20>;
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -307,7 +309,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
pinctrl: pinctrl@18000 {
|
||||
compatible = "marvell,mv88f6720-pinctrl";
|
||||
reg = <0x18000 0x24>;
|
||||
|
||||
@ -382,7 +384,7 @@
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
systemc: system-controller@18200 {
|
||||
compatible = "marvell,armada-375-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
@ -415,7 +417,7 @@
|
||||
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
timer1: timer@20300 {
|
||||
compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
|
||||
reg = <0x20300 0x30>, <0x21040 0x30>;
|
||||
interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
@ -428,24 +430,24 @@
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
watchdog: watchdog@20300 {
|
||||
compatible = "marvell,armada-375-wdt";
|
||||
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
|
||||
clocks = <&coreclk 0>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
cpurst: cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x10>;
|
||||
};
|
||||
|
||||
coherency-fabric@21010 {
|
||||
coherencyfab: coherency-fabric@21010 {
|
||||
compatible = "marvell,armada-375-coherency-fabric";
|
||||
reg = <0x21010 0x1c>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
usb0: usb@50000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x500>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -455,7 +457,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@54000 {
|
||||
usb1: usb@54000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x54000 0x500>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -463,7 +465,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3@58000 {
|
||||
usb2: usb3@58000 {
|
||||
compatible = "marvell,armada-375-xhci";
|
||||
reg = <0x58000 0x20000>,<0x5b880 0x80>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -473,7 +475,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@60800 {
|
||||
xor0: xor@60800 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60800 0x100
|
||||
0x60A00 0x100>;
|
||||
@ -493,7 +495,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
xor1: xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
@ -513,7 +515,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
crypto@90000 {
|
||||
cesa: crypto@90000 {
|
||||
compatible = "marvell,armada-375-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
@ -528,7 +530,7 @@
|
||||
marvell,crypto-sram-size = <0x800>;
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
sata: sata@a0000 {
|
||||
compatible = "marvell,armada-370-sata";
|
||||
reg = <0xa0000 0x5000>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -537,7 +539,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
nand: nand@d0000 {
|
||||
compatible = "marvell,armada370-nand";
|
||||
reg = <0xd0000 0x54>;
|
||||
#address-cells = <1>;
|
||||
@ -547,7 +549,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
sdio: mvsdio@d4000 {
|
||||
compatible = "marvell,orion-sdio";
|
||||
reg = <0xd4000 0x200>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -559,7 +561,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal@e8078 {
|
||||
thermal: thermal@e8078 {
|
||||
compatible = "marvell,armada375-thermal";
|
||||
reg = <0xe8078 0x4>, <0xe807c 0x8>;
|
||||
status = "okay";
|
||||
@ -580,7 +582,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-370-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@ -599,7 +601,7 @@
|
||||
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1 MEM */
|
||||
0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie0: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@ -616,7 +618,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie1: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
|
@ -65,20 +65,6 @@
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
spi1: spi@10680 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <54000000>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
@ -155,6 +141,10 @@
|
||||
bm,pool-short = <3>;
|
||||
};
|
||||
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON4 */
|
||||
ethernet@70000 {
|
||||
pinctrl-names = "default";
|
||||
@ -178,15 +168,35 @@
|
||||
|
||||
nfc: flash@d0000 {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
num-cs = <1>;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x00000000 0x00800000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
label = "uImage";
|
||||
reg = <0x00800000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@c00000 {
|
||||
label = "Root";
|
||||
reg = <0x00c00000 0x3f400000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb3@f0000 {
|
||||
@ -239,3 +249,17 @@
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <54000000>;
|
||||
};
|
||||
};
|
||||
|
@ -62,11 +62,6 @@
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
spi@10600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
@ -332,3 +327,7 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
340
sys/gnu/dts/arm/armada-385-turris-omnia.dts
Normal file
340
sys/gnu/dts/arm/armada-385-turris-omnia.dts
Normal file
@ -0,0 +1,340 @@
|
||||
/*
|
||||
* Device Tree file for the Turris Omnia
|
||||
*
|
||||
* Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
* Copyright (C) 2016 Tomas Hlavacek <tmshlvkc@gmail.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "armada-385.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Turris Omnia";
|
||||
compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1024 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* USB part of the PCIe2/USB 2.0 port */
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@a8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdhci@d8000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdhci_pins>;
|
||||
status = "okay";
|
||||
|
||||
bus-width = <8>;
|
||||
no-1-8-v;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
usb3@f0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@f8000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Connected to 88E6176 switch, port 6 */
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* Connected to 88E6176 switch, port 5 */
|
||||
ð1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* WAN port */
|
||||
ð2 {
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy = <&phy1>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
i2cmux@70 {
|
||||
compatible = "nxp,pca9547";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x70>;
|
||||
status = "okay";
|
||||
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
/* STM32F0 command interface at address 0x2a */
|
||||
/* leds device (in STM32F0) at address 0x2b */
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "at,24c64";
|
||||
reg = <0x54>;
|
||||
|
||||
/* The EEPROM contains data for bootloader.
|
||||
* Contents:
|
||||
* struct omnia_eeprom {
|
||||
* u32 magic; (=0x0341a034 in LE)
|
||||
* u32 ramsize; (in GiB)
|
||||
* char regdomain[4];
|
||||
* u32 crc32;
|
||||
* };
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
/* routed to PCIe0/mSATA connector (CN7A) */
|
||||
};
|
||||
|
||||
i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
/* routed to PCIe1/USB2 connector (CN61A) */
|
||||
};
|
||||
|
||||
i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
/* routed to PCIe2 connector (CN62A) */
|
||||
};
|
||||
|
||||
i2c@4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
|
||||
/* routed to SFP+ */
|
||||
};
|
||||
|
||||
i2c@5 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <5>;
|
||||
|
||||
/* ATSHA204A at address 0x64 */
|
||||
};
|
||||
|
||||
i2c@6 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <6>;
|
||||
|
||||
/* exposed on pin header */
|
||||
};
|
||||
|
||||
i2c@7 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <7>;
|
||||
|
||||
pcawan: gpio@71 {
|
||||
/*
|
||||
* GPIO expander for SFP+ signals and
|
||||
* and phy irq
|
||||
*/
|
||||
compatible = "nxp,pca9538";
|
||||
reg = <0x71>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcawan_pins>;
|
||||
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
status = "okay";
|
||||
|
||||
phy1: phy@1 {
|
||||
status = "okay";
|
||||
compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
|
||||
/* irq is connected to &pcawan pin 7 */
|
||||
};
|
||||
|
||||
/* Switch MV88E7176 at address 0x10 */
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pcawan_pins: pcawan-pins {
|
||||
marvell,pins = "mpp46";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
spi0cs0_pins: spi0cs0-pins {
|
||||
marvell,pins = "mpp25";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
spi0cs1_pins: spi0cs1-pins {
|
||||
marvell,pins = "mpp26";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins &spi0cs0_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi-nor@0 {
|
||||
compatible = "spansion,s25fl164k", "jedec,spi-nor";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "U-Boot";
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
reg = <0x00100000 0x00700000>;
|
||||
label = "Rescue system";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
/* Pin header CN10 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
/* Pin header CN11 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
};
|
@ -239,22 +239,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio@72004 {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy_dedicated: ethernet-phy@0 {
|
||||
/*
|
||||
* Annoyingly, the marvell phy driver
|
||||
* configures the LED register, rather
|
||||
* than preserving reset-loaded setting.
|
||||
* We undo that rubbish here.
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x101e>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@18000 {
|
||||
clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
|
||||
marvell,pins = "mpp46";
|
||||
@ -331,30 +315,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi@10680 {
|
||||
/*
|
||||
* We don't seem to have the W25Q32 on the
|
||||
* A1 Rev 2.0 boards, so disable SPI.
|
||||
* CS0: W25Q32 (doesn't appear to be present)
|
||||
* CS1:
|
||||
* CS2: mikrobus
|
||||
*/
|
||||
pinctrl-0 = <&spi1_pins
|
||||
&clearfog_spi1_cs_pins
|
||||
&mikro_spi_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "w25q32", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <3000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
usb@58000 {
|
||||
/* CON3, nearest power. */
|
||||
status = "okay";
|
||||
@ -406,12 +366,12 @@
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
label = "lan5";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
@ -421,12 +381,12 @@
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan5";
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
@ -460,3 +420,27 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
/*
|
||||
* We don't seem to have the W25Q32 on the
|
||||
* A1 Rev 2.0 boards, so disable SPI.
|
||||
* CS0: W25Q32 (doesn't appear to be present)
|
||||
* CS1:
|
||||
* CS2: mikrobus
|
||||
*/
|
||||
pinctrl-0 = <&spi1_pins
|
||||
&clearfog_spi1_cs_pins
|
||||
&mikro_spi_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "w25q32", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <3000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
@ -70,18 +70,6 @@
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25q32", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
@ -201,3 +189,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25q32", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -64,21 +64,6 @@
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10600 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
m25p,fast-read;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
@ -433,3 +418,18 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
m25p,fast-read;
|
||||
};
|
||||
};
|
||||
|
@ -70,18 +70,6 @@
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
@ -142,3 +130,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -170,30 +170,6 @@
|
||||
<0xc100 0x100>;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-380-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-380-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x20>;
|
||||
@ -287,6 +263,15 @@
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
nand_pins: nand-pins {
|
||||
marvell,pins = "mpp22", "mpp34", "mpp23",
|
||||
"mpp33", "mpp38", "mpp28",
|
||||
"mpp40", "mpp42", "mpp35",
|
||||
"mpp36", "mpp25", "mpp30",
|
||||
"mpp32";
|
||||
marvell,function = "dev";
|
||||
};
|
||||
|
||||
uart0_pins: uart-pins-0 {
|
||||
marvell,pins = "mpp0", "mpp1";
|
||||
marvell,function = "ua0";
|
||||
@ -649,10 +634,34 @@
|
||||
no-memory-wc;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-380-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-380-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
/* 1 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
|
175
sys/gnu/dts/arm/armada-390-db.dts
Normal file
175
sys/gnu/dts/arm/armada-390-db.dts
Normal file
@ -0,0 +1,175 @@
|
||||
/*
|
||||
* Device Tree file for Marvell Armada 390 Development Board
|
||||
* (DB-88F6920)
|
||||
*
|
||||
* Copyright (C) 2016 Marvell
|
||||
*
|
||||
* Grzegorz Jaszczyk <jaz@semihalf.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-390.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 390 Development Board";
|
||||
compatible = "marvell,a390-db", "marvell,armada390";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x80000000>; /* 2 GB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
/* CON104 */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON97 */
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x800000>;
|
||||
};
|
||||
partition@800000 {
|
||||
label = "Linux";
|
||||
reg = <0x800000 0x800000>;
|
||||
};
|
||||
partition@1000000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x1000000 0x3f000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* CON98 */
|
||||
usb3@f8000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* CON30 */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON44 */
|
||||
pcie@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON61 */
|
||||
pcie@3,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13",
|
||||
"jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x400000>;
|
||||
};
|
||||
partition@400000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x400000 0xc00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -47,6 +47,8 @@
|
||||
#include "armada-39x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "marvell,armada390";
|
||||
|
||||
soc {
|
||||
internal-regs {
|
||||
pinctrl@18000 {
|
||||
@ -54,4 +56,5 @@
|
||||
reg = <0x18000 0x20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
163
sys/gnu/dts/arm/armada-395-gp.dts
Normal file
163
sys/gnu/dts/arm/armada-395-gp.dts
Normal file
@ -0,0 +1,163 @@
|
||||
/*
|
||||
* Device Tree file for Marvell Armada 395 GP board
|
||||
*
|
||||
* Copyright (C) 2016 Marvell
|
||||
*
|
||||
* Grzegorz Jaszczyk <jaz@semihalf.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-395.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 395 GP Board";
|
||||
compatible = "marvell,a395-gp", "marvell,armada395",
|
||||
"marvell,armada390";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x57>;
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
/*
|
||||
* Exported on the micro USB connector CON17
|
||||
* through an FTDI
|
||||
*/
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON1 */
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON2 */
|
||||
sata@a8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x00000000 0x00600000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
label = "uImage";
|
||||
reg = <0x00600000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "Root";
|
||||
reg = <0x00a00000 0x3f600000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* CON18 */
|
||||
sdhci@d8000 {
|
||||
clock-frequency = <200000000>;
|
||||
broken-cd;
|
||||
wp-inverted;
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
/* CON4 */
|
||||
usb3@f0000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* mini PCIe slot on the board.
|
||||
*/
|
||||
|
||||
/* CON7 */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON8 */
|
||||
pcie@4,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
76
sys/gnu/dts/arm/armada-395.dtsi
Normal file
76
sys/gnu/dts/arm/armada-395.dtsi
Normal file
@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Device Tree Include file for Marvell Armada 395 SoC.
|
||||
*
|
||||
* Copyright (C) 2016 Marvell
|
||||
*
|
||||
* Grzegorz Jaszczyk <jaz@semihalf.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "armada-39x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "marvell,armada395", "marvell,armada390";
|
||||
|
||||
soc {
|
||||
internal-regs {
|
||||
pinctrl@18000 {
|
||||
compatible = "marvell,mv88f6925-pinctrl";
|
||||
reg = <0x18000 0x20>;
|
||||
};
|
||||
|
||||
sata@a8000 {
|
||||
compatible = "marvell,armada-380-ahci";
|
||||
reg = <0xa8000 0x2000>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 15>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3@f0000 {
|
||||
compatible = "marvell,armada-380-xhci";
|
||||
reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 9>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -65,30 +65,6 @@
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10680 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <108000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x400000>;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x400000 0x1000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -108,6 +84,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
@ -132,6 +112,10 @@
|
||||
reg = <0x1000000 0x3f000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb3@f8000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
@ -151,3 +135,27 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <108000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x400000>;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x400000 0x1000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -44,7 +44,7 @@
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "armada-39x.dtsi"
|
||||
#include "armada-395.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "marvell,armada398", "marvell,armada390";
|
||||
@ -55,6 +55,14 @@
|
||||
compatible = "marvell,mv88f6928-pinctrl";
|
||||
reg = <0x18000 0x20>;
|
||||
};
|
||||
|
||||
sata@e0000 {
|
||||
compatible = "marvell,armada-380-ahci";
|
||||
reg = <0xe0000 0x2000>;
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 30>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -55,6 +55,8 @@
|
||||
compatible = "marvell,armada390";
|
||||
|
||||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
@ -78,6 +80,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a9-pmu";
|
||||
interrupts-extended = <&mpic 3>;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
|
||||
"simple-bus";
|
||||
@ -131,30 +138,6 @@
|
||||
<0xc100 0x100>;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-390-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-390-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x20>;
|
||||
@ -269,6 +252,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
gpio1: gpio@18140 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>;
|
||||
ngpios = <28>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
compatible = "marvell,armada-390-system-controller",
|
||||
"marvell,armada-370-xp-system-controller";
|
||||
@ -317,11 +328,29 @@
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,armada-380-wdt";
|
||||
reg = <0x20300 0x34>, <0x20704 0x4>,
|
||||
<0x18260 0x4>;
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x10>;
|
||||
};
|
||||
|
||||
mpcore-soc-ctrl@20d20 {
|
||||
compatible = "marvell,armada-380-mpcore-soc-ctrl";
|
||||
reg = <0x20d20 0x6c>;
|
||||
};
|
||||
|
||||
coherency-fabric@21010 {
|
||||
compatible = "marvell,armada-380-coherency-fabric";
|
||||
reg = <0x21010 0x1c>;
|
||||
};
|
||||
|
||||
pmsu@22000 {
|
||||
compatible = "marvell,armada-390-pmsu",
|
||||
"marvell,armada-380-pmsu";
|
||||
@ -368,6 +397,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
rtc@a3800 {
|
||||
compatible = "marvell,armada-380-rtc";
|
||||
reg = <0xa3800 0x20>, <0x184a0 0x0c>;
|
||||
reg-names = "rtc", "rtc-soc";
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
compatible = "marvell,armada370-nand";
|
||||
reg = <0xd0000 0x54>;
|
||||
@ -380,7 +416,10 @@
|
||||
|
||||
sdhci@d8000 {
|
||||
compatible = "marvell,armada-380-sdhci";
|
||||
reg = <0xd8000 0x1000>, <0xdc000 0x100>;
|
||||
reg-names = "sdhci", "mbus", "conf-sdio3";
|
||||
reg = <0xd8000 0x1000>,
|
||||
<0xdc000 0x100>,
|
||||
<0x18454 0x4>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 17>;
|
||||
mrvl,clk-delay-cycles = <0x1F>;
|
||||
@ -395,6 +434,12 @@
|
||||
clocks = <&mainpll>;
|
||||
clock-output-names = "nand";
|
||||
};
|
||||
|
||||
thermal@e8078 {
|
||||
compatible = "marvell,armada380-thermal";
|
||||
reg = <0xe4078 0x4>, <0xe4074 0x4>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
@ -501,14 +546,45 @@
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-390-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-390-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
/* 1 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
|
||||
/* 25 MHz reference crystal */
|
||||
refclk: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -62,7 +62,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
|
||||
};
|
||||
@ -73,7 +73,65 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
internal-regs {
|
||||
/* UART0 */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* UART1 */
|
||||
serial@12100 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
nr-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
reset {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_SETUP>;
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* First mini-PCIe port */
|
||||
@ -93,76 +151,6 @@
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
/* UART0 */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* UART1 */
|
||||
serial@12100 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
nr-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_SETUP>;
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
@ -179,3 +167,15 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
@ -67,7 +67,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
|
||||
};
|
||||
@ -108,39 +108,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* All 6 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 2 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@4,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@ -160,24 +127,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <25>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <27>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@ -231,18 +180,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "m25p64", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
};
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
@ -277,3 +214,66 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* All 6 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 2 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@4,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <25>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <27>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "m25p64", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
};
|
||||
};
|
||||
|
@ -68,7 +68,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
/*
|
||||
* 8 GB of plug-in RAM modules by default.The amount
|
||||
@ -127,27 +127,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* The 3 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@ -175,24 +154,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <16>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@ -232,18 +193,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bm@c0000 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -262,3 +211,54 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* The 3 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <16>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
@ -57,7 +57,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x20000000>; /* 512MB */
|
||||
};
|
||||
@ -68,37 +68,11 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Quad port sata: Marvell 88SX7042 */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 xHCI controller: NEC D720200F1 */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -295,6 +269,31 @@
|
||||
gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Quad port sata: Marvell 88SX7042 */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 xHCI controller: NEC D720200F1 */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
poweroff_pin: poweroff-pin {
|
||||
|
@ -62,7 +62,7 @@
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
|
||||
};
|
||||
@ -73,28 +73,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Etron EJ168 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
rtc@10300 {
|
||||
@ -279,18 +257,6 @@
|
||||
reg = <0x180000 0x780000>; /* 7.5MB */
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "everspin,mr25h256";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -301,13 +267,13 @@
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
reset {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
@ -335,7 +301,7 @@
|
||||
4500 1>;
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
dsa {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
@ -381,6 +347,28 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Etron EJ168 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
|
||||
keys_pin: keys-pin {
|
||||
@ -398,3 +386,15 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "everspin,mr25h256";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
@ -55,7 +55,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
/*
|
||||
* This board has 4 GB of RAM, but the last 256 MB of
|
||||
@ -99,18 +99,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -86,7 +86,7 @@
|
||||
* configured as x4 or quad x1 lanes. One unit is
|
||||
* x1 only.
|
||||
*/
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@ -114,7 +114,7 @@
|
||||
0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie1: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@ -131,7 +131,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@ -148,7 +148,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
pcie3: pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
@ -165,7 +165,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@4,0 {
|
||||
pcie4: pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
@ -182,7 +182,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
pcie5: pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
|
@ -87,7 +87,7 @@
|
||||
* configured as x4 or quad x1 lanes. One unit is
|
||||
* x4 only.
|
||||
*/
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@ -129,7 +129,7 @@
|
||||
0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
|
||||
0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie1: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@ -146,7 +146,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@ -163,7 +163,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
pcie3: pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
@ -180,7 +180,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@4,0 {
|
||||
pcie4: pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
@ -197,7 +197,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
pcie5: pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
@ -214,7 +214,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@6,0 {
|
||||
pcie6: pcie@6,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
@ -231,7 +231,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@7,0 {
|
||||
pcie7: pcie@7,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
@ -248,7 +248,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@8,0 {
|
||||
pcie8: pcie@8,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
@ -265,7 +265,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
pcie9: pcie@9,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
|
@ -104,7 +104,7 @@
|
||||
* configured as x4 or quad x1 lanes. Two units are
|
||||
* x4/x1.
|
||||
*/
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@ -150,7 +150,7 @@
|
||||
0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
|
||||
0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie1: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@ -167,7 +167,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@ -184,7 +184,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
pcie3: pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
@ -201,7 +201,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@4,0 {
|
||||
pcie4: pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
@ -218,7 +218,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
pcie5: pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
@ -235,7 +235,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@6,0 {
|
||||
pcie6: pcie@6,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
@ -252,7 +252,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@7,0 {
|
||||
pcie7: pcie@7,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
@ -269,7 +269,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@8,0 {
|
||||
pcie8: pcie@8,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
@ -286,7 +286,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
pcie9: pcie@9,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
@ -303,7 +303,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@10,0 {
|
||||
pcie10: pcie@10,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
|
||||
reg = <0x5000 0 0 0 0>;
|
||||
|
@ -56,7 +56,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x80000000>; /* 2GB */
|
||||
};
|
||||
@ -67,28 +67,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to first Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to second Marvell 88SE9170 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
|
||||
@ -97,7 +75,6 @@
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
@ -154,23 +131,19 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
@ -295,6 +268,39 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to first Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to second Marvell 88SE9170 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&pinctrl {
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp42";
|
||||
|
@ -57,7 +57,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
|
||||
};
|
||||
@ -98,15 +98,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
rtc@10300 {
|
||||
/* No crystal connected to the internal RTC */
|
||||
@ -148,31 +139,13 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@1 {
|
||||
init {
|
||||
label = "Init Button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@ -240,6 +213,33 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
led_pins: led-pins-0 {
|
||||
marvell,pins = "mpp49", "mpp51", "mpp53";
|
||||
|
@ -70,7 +70,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x40000000>; /* 1GB */
|
||||
};
|
||||
@ -81,28 +81,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* Connected to Marvell 88SX7042 SATA-II controller
|
||||
* handling the four disks.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* Connected to EtronTech EJ168A XHCI controller
|
||||
* providing the two rear USB 3.0 ports.
|
||||
*/
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Seiko S-35390A below */
|
||||
@ -110,62 +88,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
/*
|
||||
* Warning!
|
||||
*
|
||||
* Synology u-boot uses its compiled-in environment
|
||||
* and it seems Synology did not care to change u-boot
|
||||
* default configuration in order to allow saving a
|
||||
* modified environment at a sensible location. So,
|
||||
* if you do a 'saveenv' under u-boot, your modified
|
||||
* environment will be saved at 1MB after the start
|
||||
* of the flash, i.e. in the middle of the uImage.
|
||||
* For that reason, it is strongly advised not to
|
||||
* change the default environment, unless you know
|
||||
* what you are doing.
|
||||
*/
|
||||
partition@00000000 { /* u-boot */
|
||||
label = "RedBoot";
|
||||
reg = <0x00000000 0x000d0000>; /* 832KB */
|
||||
};
|
||||
|
||||
partition@000c0000 { /* uImage */
|
||||
label = "zImage";
|
||||
reg = <0x000d0000 0x002d0000>; /* 2880KB */
|
||||
};
|
||||
|
||||
partition@003a0000 { /* uInitramfs */
|
||||
label = "rd.gz";
|
||||
reg = <0x003a0000 0x00430000>; /* 4250KB */
|
||||
};
|
||||
|
||||
partition@007d0000 { /* MAC address and serial number */
|
||||
label = "vendor";
|
||||
reg = <0x007d0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007e0000 {
|
||||
label = "RedBoot config";
|
||||
reg = <0x007e0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007f0000 {
|
||||
label = "FIS directory";
|
||||
reg = <0x007f0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
@ -206,16 +128,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
@ -242,7 +154,7 @@
|
||||
&sata3_pwr_pin &sata4_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata1_regulator: sata1-regulator {
|
||||
sata1_regulator: sata1-regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA1 Power";
|
||||
@ -255,7 +167,7 @@
|
||||
gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_regulator: sata2-regulator {
|
||||
sata2_regulator: sata2-regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "SATA2 Power";
|
||||
@ -268,7 +180,7 @@
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata3_regulator: sata3-regulator {
|
||||
sata3_regulator: sata3-regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <3>;
|
||||
regulator-name = "SATA3 Power";
|
||||
@ -281,7 +193,7 @@
|
||||
gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata4_regulator: sata4-regulator {
|
||||
sata4_regulator: sata4-regulator@4 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <4>;
|
||||
regulator-name = "SATA4 Power";
|
||||
@ -296,6 +208,39 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* Connected to Marvell 88SX7042 SATA-II controller
|
||||
* handling the four disks.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* Connected to EtronTech EJ168A XHCI controller
|
||||
* providing the two rear USB 3.0 ports.
|
||||
*/
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sata1_pwr_pin: sata1-pwr-pin {
|
||||
marvell,pins = "mpp42";
|
||||
@ -362,3 +307,59 @@
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
/*
|
||||
* Warning!
|
||||
*
|
||||
* Synology u-boot uses its compiled-in environment
|
||||
* and it seems Synology did not care to change u-boot
|
||||
* default configuration in order to allow saving a
|
||||
* modified environment at a sensible location. So,
|
||||
* if you do a 'saveenv' under u-boot, your modified
|
||||
* environment will be saved at 1MB after the start
|
||||
* of the flash, i.e. in the middle of the uImage.
|
||||
* For that reason, it is strongly advised not to
|
||||
* change the default environment, unless you know
|
||||
* what you are doing.
|
||||
*/
|
||||
partition@00000000 { /* u-boot */
|
||||
label = "RedBoot";
|
||||
reg = <0x00000000 0x000d0000>; /* 832KB */
|
||||
};
|
||||
|
||||
partition@000c0000 { /* uImage */
|
||||
label = "zImage";
|
||||
reg = <0x000d0000 0x002d0000>; /* 2880KB */
|
||||
};
|
||||
|
||||
partition@003a0000 { /* uInitramfs */
|
||||
label = "rd.gz";
|
||||
reg = <0x003a0000 0x00430000>; /* 4250KB */
|
||||
};
|
||||
|
||||
partition@007d0000 { /* MAC address and serial number */
|
||||
label = "vendor";
|
||||
reg = <0x007d0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007e0000 {
|
||||
label = "RedBoot config";
|
||||
reg = <0x007e0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007f0000 {
|
||||
label = "FIS directory";
|
||||
reg = <0x007f0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -53,6 +53,9 @@
|
||||
#include "armada-370-xp.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
model = "Marvell Armada XP family SoC";
|
||||
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
@ -75,7 +78,7 @@
|
||||
reg = <0x1400 0x500>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
L2: l2-cache@8000 {
|
||||
compatible = "marvell,aurora-system-cache";
|
||||
reg = <0x08000 0x1000>;
|
||||
cache-id-part = <0x100>;
|
||||
@ -84,29 +87,6 @@
|
||||
wt-override;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-xp-spi",
|
||||
"marvell,orion-spi";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-xp-spi",
|
||||
"marvell,orion-spi";
|
||||
};
|
||||
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x100>;
|
||||
};
|
||||
|
||||
i2c1: i2c@11100 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11100 0x100>;
|
||||
};
|
||||
|
||||
uart2: serial@12200 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
@ -131,7 +111,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
systemc: system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x500>;
|
||||
};
|
||||
@ -149,7 +129,7 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
thermal@182b0 {
|
||||
thermal: thermal@182b0 {
|
||||
compatible = "marvell,armadaxp-thermal";
|
||||
reg = <0x182b0 0x4
|
||||
0x184d0 0x4>;
|
||||
@ -163,27 +143,6 @@
|
||||
clocks = <&coreclk 1>;
|
||||
};
|
||||
|
||||
interrupt-controller@20a00 {
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,armada-xp-wdt";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x20>;
|
||||
};
|
||||
|
||||
cpu-config@21000 {
|
||||
compatible = "marvell,armada-xp-cpu-config";
|
||||
reg = <0x21000 0x8>;
|
||||
@ -197,15 +156,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
clocks = <&gateclk 18>;
|
||||
};
|
||||
|
||||
usb@51000 {
|
||||
clocks = <&gateclk 19>;
|
||||
};
|
||||
|
||||
usb@52000 {
|
||||
usb2: usb@52000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x52000 0x500>;
|
||||
interrupts = <47>;
|
||||
@ -213,7 +164,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
xor1: xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
@ -241,7 +192,7 @@
|
||||
compatible = "marvell,armada-xp-neta";
|
||||
};
|
||||
|
||||
crypto@90000 {
|
||||
cesa: crypto@90000 {
|
||||
compatible = "marvell,armada-xp-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
@ -261,7 +212,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@f0900 {
|
||||
xor0: xor@f0900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0xF0900 0x100
|
||||
0xF0B00 0x100>;
|
||||
@ -322,6 +273,44 @@
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x100>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11100 0x100>;
|
||||
};
|
||||
|
||||
&mpic {
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
&timer {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
compatible = "marvell,armada-xp-wdt";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
&cpurst {
|
||||
reg = <0x20800 0x20>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
clocks = <&gateclk 18>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
clocks = <&gateclk 19>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
ge0_gmii_pins: ge0-gmii-pins {
|
||||
marvell,pins =
|
||||
@ -362,6 +351,12 @@
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
spi1_pins: spi1-pins {
|
||||
marvell,pins = "mpp13", "mpp14",
|
||||
"mpp16", "mpp17";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
uart2_pins: uart2-pins {
|
||||
marvell,pins = "mpp42", "mpp43";
|
||||
marvell,function = "uart2";
|
||||
@ -372,3 +367,15 @@
|
||||
marvell,function = "uart3";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
@ -1,5 +1,3 @@
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
nvic: interrupt-controller@e000e100 {
|
||||
compatible = "arm,armv7m-nvic";
|
||||
|
@ -46,6 +46,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ðernet {
|
||||
status = "okay";
|
||||
|
||||
|
@ -41,6 +41,7 @@
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/axis,artpec6-clkctrl.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
@ -66,7 +67,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
syscon {
|
||||
syscon: syscon@f8000000 {
|
||||
compatible = "axis,artpec6-syscon", "syscon";
|
||||
reg = <0xf8000000 0x48>;
|
||||
};
|
||||
@ -109,14 +110,14 @@
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0xfaf00200 0x20>;
|
||||
interrupts = <GIC_PPI 11 0xf01>;
|
||||
clocks = <&clkctrl 1>;
|
||||
clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
|
||||
};
|
||||
|
||||
timer@faf00600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xfaf00600 0x20>;
|
||||
interrupts = <GIC_PPI 13 0xf04>;
|
||||
clocks = <&clkctrl 1>;
|
||||
clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -136,15 +137,50 @@
|
||||
arm,data-latency = <1 1 1>;
|
||||
arm,tag-latency = <1 1 1>;
|
||||
arm,filter-ranges = <0x0 0x80000000>;
|
||||
arm,double-linefill = <1>;
|
||||
arm,double-linefill-incr = <0>;
|
||||
arm,double-linefill-wrap = <0>;
|
||||
prefetch-data = <1>;
|
||||
prefetch-instr = <1>;
|
||||
arm,prefetch-offset = <0>;
|
||||
arm,prefetch-drop = <1>;
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a9-pmu";
|
||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&cpu0>, <&cpu1>;
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
||||
pcie: pcie@f8050000 {
|
||||
compatible = "axis,artpec6-pcie", "snps,dw-pcie";
|
||||
reg = <0xf8050000 0x2000
|
||||
0xf8040000 0x1000
|
||||
0xc0000000 0x2000>;
|
||||
reg-names = "dbi", "phy", "config";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
/* downstream I/O */
|
||||
ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
|
||||
/* non-prefetchable memory */
|
||||
0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
|
||||
num-lanes = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
|
||||
axis,syscon-pcie = <&syscon>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
amba@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <0x1>;
|
||||
@ -157,7 +193,7 @@
|
||||
ethernet: ethernet@f8010000 {
|
||||
clock-names = "phy_ref_clk", "apb_pclk";
|
||||
clocks = <ð_phy_ref_clk>,
|
||||
<&clkctrl 4>;
|
||||
<&clkctrl ARTPEC6_CLK_ETH_ACLK>;
|
||||
compatible = "snps,dwc-qos-ethernet-4.10";
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -175,8 +211,8 @@
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0xf8036000 0x1000>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkctrl 13>,
|
||||
<&clkctrl 12>;
|
||||
clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
|
||||
<&clkctrl ARTPEC6_CLK_UART_PCLK>;
|
||||
clock-names = "uart_clk", "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -184,8 +220,8 @@
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0xf8037000 0x1000>;
|
||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkctrl 13>,
|
||||
<&clkctrl 12>;
|
||||
clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
|
||||
<&clkctrl ARTPEC6_CLK_UART_PCLK>;
|
||||
clock-names = "uart_clk", "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -193,8 +229,8 @@
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0xf8038000 0x1000>;
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkctrl 13>,
|
||||
<&clkctrl 12>;
|
||||
clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
|
||||
<&clkctrl ARTPEC6_CLK_UART_PCLK>;
|
||||
clock-names = "uart_clk", "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -202,8 +238,8 @@
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0xf8039000 0x1000>;
|
||||
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkctrl 13>,
|
||||
<&clkctrl 12>;
|
||||
clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
|
||||
<&clkctrl ARTPEC6_CLK_UART_PCLK>;
|
||||
clock-names = "uart_clk", "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -34,15 +34,6 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
@ -178,7 +169,7 @@
|
||||
|
||||
};
|
||||
|
||||
onewire@0 {
|
||||
onewire {
|
||||
compatible = "w1-gpio";
|
||||
gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -26,15 +26,6 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
@ -23,15 +23,6 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
@ -128,13 +119,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
usb0: ohci@500000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
i2c-gpio-0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
i2c-gpio,delay-us = <5>; /* ~85 kHz */
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user