From d84d6e77162529001cbc2b53e1bfaff94f013074 Mon Sep 17 00:00:00 2001 From: Ganbold Tsagaankhuu Date: Wed, 14 Jan 2015 01:23:50 +0000 Subject: [PATCH] Correct cpu type, it was rather Cortex A12 R0. Approved by: stas (mentor) --- sys/arm/arm/cpufunc.c | 2 +- sys/arm/arm/identcpu.c | 4 ++-- sys/arm/include/armreg.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index c4f0f7f8860d..8e69c5405ed3 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -1067,11 +1067,11 @@ set_cpufuncs() cputype == CPU_ID_CORTEXA9R1 || cputype == CPU_ID_CORTEXA9R2 || cputype == CPU_ID_CORTEXA9R3 || + cputype == CPU_ID_CORTEXA12R0 || cputype == CPU_ID_CORTEXA15R0 || cputype == CPU_ID_CORTEXA15R1 || cputype == CPU_ID_CORTEXA15R2 || cputype == CPU_ID_CORTEXA15R3 || - cputype == CPU_ID_CORTEXA17 || cputype == CPU_ID_KRAIT ) { cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ diff --git a/sys/arm/arm/identcpu.c b/sys/arm/arm/identcpu.c index b4b757c018b9..b37a1b3d1b69 100644 --- a/sys/arm/arm/identcpu.c +++ b/sys/arm/arm/identcpu.c @@ -185,6 +185,8 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA9R3, CPU_CLASS_CORTEXA, "Cortex A9-r3", generic_steppings }, + { CPU_ID_CORTEXA12R0, CPU_CLASS_CORTEXA, "Cortex A12-r0", + generic_steppings }, { CPU_ID_CORTEXA15R0, CPU_CLASS_CORTEXA, "Cortex A15-r0", generic_steppings }, { CPU_ID_CORTEXA15R1, CPU_CLASS_CORTEXA, "Cortex A15-r1", @@ -193,8 +195,6 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA15R3, CPU_CLASS_CORTEXA, "Cortex A15-r3", generic_steppings }, - { CPU_ID_CORTEXA17, CPU_CLASS_CORTEXA, "Cortex A17", - generic_steppings }, { CPU_ID_KRAIT, CPU_CLASS_KRAIT, "Krait", generic_steppings }, diff --git a/sys/arm/include/armreg.h b/sys/arm/include/armreg.h index 216fe2aa8a82..4d0078cce853 100644 --- a/sys/arm/include/armreg.h +++ b/sys/arm/include/armreg.h @@ -133,11 +133,11 @@ #define CPU_ID_CORTEXA9R1 0x411fc090 #define CPU_ID_CORTEXA9R2 0x412fc090 #define CPU_ID_CORTEXA9R3 0x413fc090 +#define CPU_ID_CORTEXA12R0 0x410fc0d0 #define CPU_ID_CORTEXA15R0 0x410fc0f0 #define CPU_ID_CORTEXA15R1 0x411fc0f0 #define CPU_ID_CORTEXA15R2 0x412fc0f0 #define CPU_ID_CORTEXA15R3 0x413fc0f0 -#define CPU_ID_CORTEXA17 0x410fc0d0 #define CPU_ID_KRAIT 0x510f06f0 /* Snapdragon S4 Pro/APQ8064 */ #define CPU_ID_TI925T 0x54029250 #define CPU_ID_MV88FR131 0x56251310 /* Marvell Feroceon 88FR131 Core */