cxgbe(4): Add support for hash filters.
These filters reside in the card's memory instead of its TCAM and can be configured via a new "hashfilter" subcommand in cxgbetool. Hash and normal TCAM filters can be used together. The hardware does an exact-match of packet fields for hash filters, unlike the masked match performed for TCAM filters. Any T5/T6 card with memory can support at least half a million hash filters. The sample config file with the driver configures 512K of these, it is possible to double this to 1 million+ in some cases. The chip does an exact-match of fields of incoming datagrams with hash filters and performs the action configured for the filter if it matches. The fields to match are specified in a "filter mask" in the firmware config file. The filter mask always includes the 5-tuple (sip, dip, sport, dport, ipproto). It can, optionally, also include any subset of the filter mode (see filterMode and filterMask in the firmware config file). For example: filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe filterMask = protocol, port, vlan Exact values of the 5-tuple, the physical port, and VLAN tag would have to be provided while setting up a hash filter with the chip configuration above. Hash filters support all actions supported by TCAM filters. A packet that hits a hash filter can be dropped, let through (with optional steering to a specific queue or RSS region), switched out of another port (with optional L2 rewrite of DMAC, SMAC, VLAN tag), or get NAT'ed. (Support for some of these will show up in the driver in a follow-up commit very shortly). Sponsored by: Chelsio Communications
This commit is contained in:
np
parent
d595ecd177
commit
d85f4bf1d5
@ -371,7 +371,7 @@ enum {
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CPL_COOKIE_DDP0,
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CPL_COOKIE_DDP1,
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CPL_COOKIE_TOM,
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CPL_COOKIE_AVAILABLE1,
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CPL_COOKIE_HASHFILTER,
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CPL_COOKIE_AVAILABLE2,
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CPL_COOKIE_AVAILABLE3,
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@ -1244,6 +1244,9 @@ int get_filter(struct adapter *, struct t4_filter *);
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int set_filter(struct adapter *, struct t4_filter *);
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int del_filter(struct adapter *, struct t4_filter *);
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int t4_filter_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
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int t4_hashfilter_ao_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
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int t4_hashfilter_tcb_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
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int t4_del_hashfilter_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
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static inline struct wrqe *
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alloc_wrqe(int wr_len, struct sge_wrq *wrq)
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@ -370,6 +370,7 @@ struct adapter_params {
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resources for TOE operation. */
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unsigned int bypass:1; /* this is a bypass card */
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unsigned int ethoffload:1;
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unsigned int hash_filter:1;
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unsigned int ofldq_wr_cred;
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unsigned int eo_wr_cred;
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@ -458,6 +459,11 @@ static inline int is_ethoffload(const struct adapter *adap)
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return adap->params.ethoffload;
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}
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static inline int is_hashfilter(const struct adapter *adap)
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{
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return adap->params.hash_filter;
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}
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static inline int chip_id(struct adapter *adap)
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{
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return adap->params.chipid;
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@ -197,6 +197,30 @@ static inline int act_open_has_tid(int status)
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status != CPL_ERR_CONN_EXIST);
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}
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/*
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* Convert an ACT_OPEN_RPL status to an errno.
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*/
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static inline int
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act_open_rpl_status_to_errno(int status)
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{
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switch (status) {
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case CPL_ERR_CONN_RESET:
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return (ECONNREFUSED);
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case CPL_ERR_ARP_MISS:
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return (EHOSTUNREACH);
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case CPL_ERR_CONN_TIMEDOUT:
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return (ETIMEDOUT);
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case CPL_ERR_TCAM_FULL:
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return (EAGAIN);
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case CPL_ERR_CONN_EXIST:
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return (EAGAIN);
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default:
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return (EIO);
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}
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}
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enum {
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CPL_CONN_POLICY_AUTO = 0,
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CPL_CONN_POLICY_ASK = 1,
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@ -1040,6 +1064,14 @@ struct cpl_abort_req {
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__u8 rsvd2[6];
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};
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struct cpl_abort_req_core {
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union opcode_tid ot;
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__be32 rsvd0;
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__u8 rsvd1;
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__u8 cmd;
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__u8 rsvd2[6];
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};
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struct cpl_abort_rpl_rss {
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RSS_HDR
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union opcode_tid ot;
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@ -1062,6 +1094,14 @@ struct cpl_abort_rpl {
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__u8 rsvd2[6];
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};
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struct cpl_abort_rpl_core {
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union opcode_tid ot;
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__be32 rsvd0;
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__u8 rsvd1;
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__u8 cmd;
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__u8 rsvd2[6];
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};
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struct cpl_peer_close {
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RSS_HDR
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union opcode_tid ot;
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265
sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt
Normal file
265
sys/dev/cxgbe/firmware/t6fw_cfg_hashfilter.txt
Normal file
@ -0,0 +1,265 @@
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# Firmware configuration file.
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#
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# Global limits (some are hardware limits, others are due to the firmware).
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# nvi = 128 virtual interfaces
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# niqflint = 1023 ingress queues with freelists and/or interrupts
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# nethctrl = 64K Ethernet or ctrl egress queues
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# neq = 64K egress queues of all kinds, including freelists
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# nexactf = 512 MPS TCAM entries, can oversubscribe.
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[global]
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rss_glb_config_mode = basicvirtual
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rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp
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# PL_TIMEOUT register
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pl_timeout_value = 200 # the timeout value in units of us
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sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs
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reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread
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reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
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#Tick granularities in kbps
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tsch_ticks = 100000, 10000, 1000, 10
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filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe
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filterMask = port, protocol
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tp_pmrx = 20, 512
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tp_pmrx_pagesize = 16K
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# TP number of RX channels (0 = auto)
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tp_nrxch = 0
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tp_pmtx = 40, 512
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tp_pmtx_pagesize = 64K
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# TP number of TX channels (0 = auto)
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tp_ntxch = 0
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# TP OFLD MTUs
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tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600
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# enable TP_OUT_CONFIG.IPIDSPLITMODE and CRXPKTENC
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reg[0x7d04] = 0x00010008/0x00010008
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# TP_GLOBAL_CONFIG
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reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable
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# TP_PC_CONFIG
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reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError
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# TP_PC_CONFIG2
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reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag
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# TP_PARA_REG0
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reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6
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# TP_PARA_REG3
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reg[0x7d6c] = 0x28000000/0x28000000 # set EnableTnlCngHdr
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# set RxMacCheck (Note:
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# Only for hash filter,
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# no tcp offload)
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# LE_DB_CONFIG
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reg[0x19c04] = 0x00000000/0x02040000 # LE IPv4 compression disabled
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# EXTN_HASH_IPV4 Disable
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# LE_DB_RSP_CODE_0
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reg[0x19c74] = 0x00000004/0x0000000f # TCAM_ACTV_HIT = 4
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# LE_DB_RSP_CODE_1
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reg[0x19c78] = 0x08000000/0x0e000000 # HASH_ACTV_HIT = 4
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# LE_DB_HASH_CONFIG
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reg[0x19c28] = 0x00800000/0x01f00000 # LE Hash bucket size 8,
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# MC configuration
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mc_mode_brc[0] = 0 # mc0 - 1: enable BRC, 0: enable RBC
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# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
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# these 4 PFs only.
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[function "0"]
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nvf = 4
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wx_caps = all
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r_caps = all
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nvi = 2
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rssnvi = 2
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niqflint = 4
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nethctrl = 4
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neq = 8
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nexactf = 4
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cmask = all
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pmask = 0x1
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[function "1"]
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nvf = 4
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wx_caps = all
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r_caps = all
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nvi = 2
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rssnvi = 2
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niqflint = 4
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nethctrl = 4
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neq = 8
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nexactf = 4
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cmask = all
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pmask = 0x2
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[function "2"]
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nvf = 4
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wx_caps = all
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r_caps = all
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nvi = 2
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rssnvi = 2
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niqflint = 4
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nethctrl = 4
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neq = 8
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nexactf = 4
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cmask = all
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pmask = 0x4
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[function "3"]
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nvf = 4
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wx_caps = all
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r_caps = all
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nvi = 2
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rssnvi = 2
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niqflint = 4
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nethctrl = 4
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neq = 8
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nexactf = 4
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cmask = all
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pmask = 0x8
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# PF4 is the resource-rich PF that the bus/nexus driver attaches to.
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# It gets 32 MSI/128 MSI-X vectors.
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[function "4"]
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wx_caps = all
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r_caps = all
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nvi = 32
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rssnvi = 8
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niqflint = 512
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nethctrl = 1024
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neq = 2048
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nqpcq = 8192
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nexactf = 456
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cmask = all
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pmask = all
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nclip = 320
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# TCAM has 6K cells; each region must start at a multiple of 128 cell.
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# Each entry in these categories takes 2 cells each. nhash will use the
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# TCAM iff there is room left (that is, the rest don't add up to 3072).
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nfilter = 2032
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nserver = 512
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nhpfilter = 0
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nhash = 524288
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protocol = nic_hashfilter
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tp_l2t = 4096
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# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
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# Not used right now.
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[function "5"]
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nvi = 1
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rssnvi = 0
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# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
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# Not used right now.
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[function "6"]
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nvi = 1
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rssnvi = 0
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# The following function, 1023, is not an actual PCIE function but is used to
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# configure and reserve firmware internal resources that come from the global
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# resource pool.
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#
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[function "1023"]
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wx_caps = all
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r_caps = all
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nvi = 4
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rssnvi = 0
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cmask = all
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pmask = all
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nexactf = 8
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nfilter = 16
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# For Virtual functions, we only allow NIC functionality and we only allow
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# access to one port (1 << PF). Note that because of limitations in the
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# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL
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# and GTS registers, the number of Ingress and Egress Queues must be a power
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# of 2.
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#
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[function "0/*"]
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wx_caps = 0x82
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r_caps = 0x86
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nvi = 1
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rssnvi = 1
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niqflint = 2
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nethctrl = 2
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neq = 4
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nexactf = 2
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cmask = all
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pmask = 0x1
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[function "1/*"]
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wx_caps = 0x82
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r_caps = 0x86
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nvi = 1
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rssnvi = 1
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niqflint = 2
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nethctrl = 2
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neq = 4
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nexactf = 2
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cmask = all
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pmask = 0x2
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[function "2/*"]
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wx_caps = 0x82
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r_caps = 0x86
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nvi = 1
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rssnvi = 1
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niqflint = 2
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nethctrl = 2
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neq = 4
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nexactf = 2
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cmask = all
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pmask = 0x1
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[function "3/*"]
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wx_caps = 0x82
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r_caps = 0x86
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nvi = 1
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rssnvi = 1
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niqflint = 2
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nethctrl = 2
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neq = 4
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nexactf = 2
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cmask = all
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pmask = 0x2
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# MPS has 192K buffer space for ingress packets from the wire as well as
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# loopback path of the L2 switch.
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[port "0"]
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dcb = none
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#bg_mem = 25
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#lpbk_mem = 25
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hwm = 60
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lwm = 15
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dwm = 30
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[port "1"]
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dcb = none
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#bg_mem = 25
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#lpbk_mem = 25
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hwm = 60
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lwm = 15
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dwm = 30
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[fini]
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version = 0x1
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checksum = 0xb577311e
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#
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# $FreeBSD$
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#
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@ -32,6 +32,9 @@
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#ifndef __T4_OFFLOAD_H__
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#define __T4_OFFLOAD_H__
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/condvar.h>
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#define INIT_ULPTX_WRH(w, wrlen, atomic, tid) do { \
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(w)->wr_hi = htonl(V_FW_WR_OP(FW_ULPTX_WR) | V_FW_WR_ATOMIC(atomic)); \
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@ -100,11 +103,17 @@ struct tid_info {
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u_int atids_in_use;
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struct mtx ftid_lock __aligned(CACHE_LINE_SIZE);
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struct cv ftid_cv;
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struct filter_entry *ftid_tab;
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u_int nftids;
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u_int ftid_base;
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u_int ftids_in_use;
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struct mtx hftid_lock __aligned(CACHE_LINE_SIZE);
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struct cv hftid_cv;
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void **hftid_tab;
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/* ntids, tids_in_use */
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struct mtx etid_lock __aligned(CACHE_LINE_SIZE);
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struct etid_entry *etid_tab;
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u_int netids;
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File diff suppressed because it is too large
Load Diff
@ -193,6 +193,7 @@ struct t4_filter_specification {
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uint32_t hitcnts:1; /* count filter hits in TCB */
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uint32_t prio:1; /* filter has priority over active/server */
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uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */
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uint32_t hash:1; /* 0 => LE TCAM, 1 => Hash */
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uint32_t action:2; /* drop, pass, switch */
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uint32_t rpttid:1; /* report TID in RSS hash field */
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uint32_t dirsteer:1; /* 0 => RSS, 1 => steer to iq */
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@ -389,7 +390,7 @@ struct t4_offload_policy {
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#define CHELSIO_T4_GET_FILTER_MODE _IOWR('f', T4_GET_FILTER_MODE, uint32_t)
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#define CHELSIO_T4_SET_FILTER_MODE _IOW('f', T4_SET_FILTER_MODE, uint32_t)
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#define CHELSIO_T4_GET_FILTER _IOWR('f', T4_GET_FILTER, struct t4_filter)
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#define CHELSIO_T4_SET_FILTER _IOW('f', T4_SET_FILTER, struct t4_filter)
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#define CHELSIO_T4_SET_FILTER _IOWR('f', T4_SET_FILTER, struct t4_filter)
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#define CHELSIO_T4_DEL_FILTER _IOW('f', T4_DEL_FILTER, struct t4_filter)
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#define CHELSIO_T4_GET_SGE_CONTEXT _IOWR('f', T4_GET_SGE_CONTEXT, \
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struct t4_sge_context)
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@ -436,7 +436,8 @@ static int t4_switchcaps_allowed = FW_CAPS_CONFIG_SWITCH_INGRESS |
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FW_CAPS_CONFIG_SWITCH_EGRESS;
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TUNABLE_INT("hw.cxgbe.switchcaps_allowed", &t4_switchcaps_allowed);
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static int t4_niccaps_allowed = FW_CAPS_CONFIG_NIC;
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static int t4_niccaps_allowed = FW_CAPS_CONFIG_NIC |
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FW_CAPS_CONFIG_NIC_HASHFILTER;
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TUNABLE_INT("hw.cxgbe.niccaps_allowed", &t4_niccaps_allowed);
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static int t4_toecaps_allowed = -1;
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@ -1375,6 +1376,9 @@ t4_detach_common(device_t dev)
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free(sc->sge.iqmap, M_CXGBE);
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free(sc->sge.eqmap, M_CXGBE);
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free(sc->tids.ftid_tab, M_CXGBE);
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free(sc->tids.hftid_tab, M_CXGBE);
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free(sc->tids.atid_tab, M_CXGBE);
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free(sc->tids.tid_tab, M_CXGBE);
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free(sc->tt.tls_rx_ports, M_CXGBE);
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t4_destroy_dma_tag(sc);
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if (mtx_initialized(&sc->sc_lock)) {
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@ -1385,8 +1389,16 @@ t4_detach_common(device_t dev)
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}
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callout_drain(&sc->sfl_callout);
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if (mtx_initialized(&sc->tids.ftid_lock))
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if (mtx_initialized(&sc->tids.ftid_lock)) {
|
||||
mtx_destroy(&sc->tids.ftid_lock);
|
||||
cv_destroy(&sc->tids.ftid_cv);
|
||||
}
|
||||
if (mtx_initialized(&sc->tids.hftid_lock)) {
|
||||
mtx_destroy(&sc->tids.hftid_lock);
|
||||
cv_destroy(&sc->tids.hftid_cv);
|
||||
}
|
||||
if (mtx_initialized(&sc->tids.atid_lock))
|
||||
mtx_destroy(&sc->tids.atid_lock);
|
||||
if (mtx_initialized(&sc->sfl_lock))
|
||||
mtx_destroy(&sc->sfl_lock);
|
||||
if (mtx_initialized(&sc->ifp_lock))
|
||||
@ -3477,6 +3489,20 @@ partition_resources(struct adapter *sc, const struct firmware *default_cfg,
|
||||
LIMIT_CAPS(fcoecaps);
|
||||
#undef LIMIT_CAPS
|
||||
|
||||
if (caps.niccaps & htobe16(FW_CAPS_CONFIG_NIC_HASHFILTER)) {
|
||||
/*
|
||||
* TOE and hashfilters are mutually exclusive. It is a config
|
||||
* file or firmware bug if both are reported as available. Try
|
||||
* to cope with the situation in non-debug builds by disabling
|
||||
* TOE.
|
||||
*/
|
||||
MPASS(caps.toecaps == 0);
|
||||
|
||||
caps.toecaps = 0;
|
||||
caps.rdmacaps = 0;
|
||||
caps.iscsicaps = 0;
|
||||
}
|
||||
|
||||
caps.op_to_write = htobe32(V_FW_CMD_OP(FW_CAPS_CONFIG_CMD) |
|
||||
F_FW_CMD_REQUEST | F_FW_CMD_WRITE);
|
||||
caps.cfvalid_to_len16 = htobe32(FW_LEN16(caps));
|
||||
@ -3630,18 +3656,22 @@ get_params__post_init(struct adapter *sc)
|
||||
READ_CAPS(iscsicaps);
|
||||
READ_CAPS(fcoecaps);
|
||||
|
||||
/*
|
||||
* The firmware attempts memfree TOE configuration for -SO cards and
|
||||
* will report toecaps=0 if it runs out of resources (this depends on
|
||||
* the config file). It may not report 0 for other capabilities
|
||||
* dependent on the TOE in this case. Set them to 0 here so that the
|
||||
* driver doesn't bother tracking resources that will never be used.
|
||||
*/
|
||||
if (sc->toecaps == 0) {
|
||||
sc->iscsicaps = 0;
|
||||
sc->rdmacaps = 0;
|
||||
}
|
||||
if (sc->niccaps & FW_CAPS_CONFIG_NIC_HASHFILTER) {
|
||||
MPASS(chip_id(sc) > CHELSIO_T4);
|
||||
MPASS(sc->toecaps == 0);
|
||||
sc->toecaps = 0;
|
||||
|
||||
param[0] = FW_PARAM_DEV(NTID);
|
||||
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val);
|
||||
if (rc != 0) {
|
||||
device_printf(sc->dev,
|
||||
"failed to query HASHFILTER parameters: %d.\n", rc);
|
||||
return (rc);
|
||||
}
|
||||
sc->tids.ntids = val[0];
|
||||
sc->tids.natids = min(sc->tids.ntids / 2, MAX_ATIDS);
|
||||
sc->params.hash_filter = 1;
|
||||
}
|
||||
if (sc->niccaps & FW_CAPS_CONFIG_NIC_ETHOFLD) {
|
||||
param[0] = FW_PARAM_PFVF(ETHOFLD_START);
|
||||
param[1] = FW_PARAM_PFVF(ETHOFLD_END);
|
||||
@ -3659,7 +3689,6 @@ get_params__post_init(struct adapter *sc)
|
||||
sc->params.eo_wr_cred = val[2];
|
||||
sc->params.ethoffload = 1;
|
||||
}
|
||||
|
||||
if (sc->toecaps) {
|
||||
/* query offload-related parameters */
|
||||
param[0] = FW_PARAM_DEV(NTID);
|
||||
@ -3682,6 +3711,17 @@ get_params__post_init(struct adapter *sc)
|
||||
sc->vres.ddp.size = val[4] - val[3] + 1;
|
||||
sc->params.ofldq_wr_cred = val[5];
|
||||
sc->params.offload = 1;
|
||||
} else {
|
||||
/*
|
||||
* The firmware attempts memfree TOE configuration for -SO cards
|
||||
* and will report toecaps=0 if it runs out of resources (this
|
||||
* depends on the config file). It may not report 0 for other
|
||||
* capabilities dependent on the TOE in this case. Set them to
|
||||
* 0 here so that the driver doesn't bother tracking resources
|
||||
* that will never be used.
|
||||
*/
|
||||
sc->iscsicaps = 0;
|
||||
sc->rdmacaps = 0;
|
||||
}
|
||||
if (sc->rdmacaps) {
|
||||
param[0] = FW_PARAM_PFVF(STAG_START);
|
||||
@ -9895,6 +9935,12 @@ mod_event(module_t mod, int cmd, void *arg)
|
||||
t4_filter_rpl, CPL_COOKIE_FILTER);
|
||||
t4_register_shared_cpl_handler(CPL_L2T_WRITE_RPL,
|
||||
do_l2t_write_rpl, CPL_COOKIE_FILTER);
|
||||
t4_register_shared_cpl_handler(CPL_ACT_OPEN_RPL,
|
||||
t4_hashfilter_ao_rpl, CPL_COOKIE_HASHFILTER);
|
||||
t4_register_shared_cpl_handler(CPL_SET_TCB_RPL,
|
||||
t4_hashfilter_tcb_rpl, CPL_COOKIE_HASHFILTER);
|
||||
t4_register_shared_cpl_handler(CPL_ABORT_RPL_RSS,
|
||||
t4_del_hashfilter_rpl, CPL_COOKIE_HASHFILTER);
|
||||
t4_register_cpl_handler(CPL_TRACE_PKT, t4_trace_pkt);
|
||||
t4_register_cpl_handler(CPL_T5_TRACE_PKT, t5_trace_pkt);
|
||||
sx_init(&t4_list_lock, "T4/T5 adapters");
|
||||
|
||||
@ -288,6 +288,7 @@ cpl_handler_t t4_cpl_handler[NUM_CPL_CMDS];
|
||||
cpl_handler_t set_tcb_rpl_handlers[NUM_CPL_COOKIES];
|
||||
cpl_handler_t l2t_write_rpl_handlers[NUM_CPL_COOKIES];
|
||||
cpl_handler_t act_open_rpl_handlers[NUM_CPL_COOKIES];
|
||||
cpl_handler_t abort_rpl_rss_handlers[NUM_CPL_COOKIES];
|
||||
|
||||
void
|
||||
t4_register_an_handler(an_handler_t h)
|
||||
@ -384,6 +385,22 @@ act_open_rpl_handler(struct sge_iq *iq, const struct rss_header *rss,
|
||||
return (act_open_rpl_handlers[cookie](iq, rss, m));
|
||||
}
|
||||
|
||||
static int
|
||||
abort_rpl_rss_handler(struct sge_iq *iq, const struct rss_header *rss,
|
||||
struct mbuf *m)
|
||||
{
|
||||
struct adapter *sc = iq->adapter;
|
||||
u_int cookie;
|
||||
|
||||
MPASS(m == NULL);
|
||||
if (is_hashfilter(sc))
|
||||
cookie = CPL_COOKIE_HASHFILTER;
|
||||
else
|
||||
cookie = CPL_COOKIE_TOM;
|
||||
|
||||
return (abort_rpl_rss_handlers[cookie](iq, rss, m));
|
||||
}
|
||||
|
||||
static void
|
||||
t4_init_shared_cpl_handlers(void)
|
||||
{
|
||||
@ -391,6 +408,7 @@ t4_init_shared_cpl_handlers(void)
|
||||
t4_register_cpl_handler(CPL_SET_TCB_RPL, set_tcb_rpl_handler);
|
||||
t4_register_cpl_handler(CPL_L2T_WRITE_RPL, l2t_write_rpl_handler);
|
||||
t4_register_cpl_handler(CPL_ACT_OPEN_RPL, act_open_rpl_handler);
|
||||
t4_register_cpl_handler(CPL_ABORT_RPL_RSS, abort_rpl_rss_handler);
|
||||
}
|
||||
|
||||
void
|
||||
@ -413,6 +431,9 @@ t4_register_shared_cpl_handler(int opcode, cpl_handler_t h, int cookie)
|
||||
case CPL_ACT_OPEN_RPL:
|
||||
loc = (uintptr_t *)&act_open_rpl_handlers[cookie];
|
||||
break;
|
||||
case CPL_ABORT_RPL_RSS:
|
||||
loc = (uintptr_t *)&abort_rpl_rss_handlers[cookie];
|
||||
break;
|
||||
default:
|
||||
MPASS(0);
|
||||
return;
|
||||
|
||||
@ -109,30 +109,6 @@ do_act_establish(struct sge_iq *iq, const struct rss_header *rss,
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Convert an ACT_OPEN_RPL status to an errno.
|
||||
*/
|
||||
static inline int
|
||||
act_open_rpl_status_to_errno(int status)
|
||||
{
|
||||
|
||||
switch (status) {
|
||||
case CPL_ERR_CONN_RESET:
|
||||
return (ECONNREFUSED);
|
||||
case CPL_ERR_ARP_MISS:
|
||||
return (EHOSTUNREACH);
|
||||
case CPL_ERR_CONN_TIMEDOUT:
|
||||
return (ETIMEDOUT);
|
||||
case CPL_ERR_TCAM_FULL:
|
||||
return (EAGAIN);
|
||||
case CPL_ERR_CONN_EXIST:
|
||||
log(LOG_ERR, "ACTIVE_OPEN_RPL: 4-tuple in use\n");
|
||||
return (EAGAIN);
|
||||
default:
|
||||
return (EIO);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
act_open_failure_cleanup(struct adapter *sc, u_int atid, u_int status)
|
||||
{
|
||||
|
||||
@ -1953,7 +1953,8 @@ t4_init_cpl_io_handlers(void)
|
||||
t4_register_cpl_handler(CPL_PEER_CLOSE, do_peer_close);
|
||||
t4_register_cpl_handler(CPL_CLOSE_CON_RPL, do_close_con_rpl);
|
||||
t4_register_cpl_handler(CPL_ABORT_REQ_RSS, do_abort_req);
|
||||
t4_register_cpl_handler(CPL_ABORT_RPL_RSS, do_abort_rpl);
|
||||
t4_register_shared_cpl_handler(CPL_ABORT_RPL_RSS, do_abort_rpl,
|
||||
CPL_COOKIE_TOM);
|
||||
t4_register_cpl_handler(CPL_RX_DATA, do_rx_data);
|
||||
t4_register_cpl_handler(CPL_FW4_ACK, do_fw4_ack);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user