powerpc/mpc85xx: Make Freescale PCI bridge driver a subclass of ofw_pcib_pci
This driver was already 99% identical to the ofw_pcib_pci driver, except for the attachment. Since ofw_pcib_pci is already a subclass of pcib, this creates a private declaration of that class, to use for the base class for this driver. At some point in the future, ofw_pcib_pci_driver should probably be exported to a header, so we're not tracking the softc struct contents, but for now, since there's only this one other driver, it's not a pressing issue.
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@ -63,11 +63,16 @@ __FBSDID("$FreeBSD$");
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#include "pcib_if.h"
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DECLARE_CLASS(ofw_pcib_pci_driver);
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struct fsl_pcib_softc {
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/*
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* This is here so that we can use pci bridge methods, too - the
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* generic routines only need the dev, secbus and subbus members
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* filled.
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*
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* XXX: This should be extracted from ofw_pcib_pci.c, and shared in a
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* header.
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*/
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struct pcib_softc ops_pcib_sc;
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phandle_t ops_node;
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@ -90,89 +95,12 @@ fsl_pcib_rc_probe(device_t dev)
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return (BUS_PROBE_DEFAULT);
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}
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static int
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fsl_pcib_rc_attach(device_t dev)
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{
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struct fsl_pcib_softc *sc;
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sc = device_get_softc(dev);
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sc->ops_pcib_sc.dev = dev;
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sc->ops_node = ofw_bus_get_node(dev);
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ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
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sizeof(cell_t));
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pcib_attach_common(dev);
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return (pcib_attach_child(dev));
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}
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static phandle_t
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fsl_pcib_rc_get_node(device_t bridge, device_t dev)
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{
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/* We have only one child, the PCI bus, so pass it our node */
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return (ofw_bus_get_node(bridge));
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}
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static int
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fsl_pcib_rc_route_interrupt(device_t bridge, device_t dev, int intpin)
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{
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struct fsl_pcib_softc *sc;
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struct ofw_bus_iinfo *ii;
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struct ofw_pci_register reg;
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cell_t pintr, mintr[2];
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int intrcells;
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phandle_t iparent;
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sc = device_get_softc(bridge);
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ii = &sc->ops_iinfo;
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if (ii->opi_imapsz > 0) {
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pintr = intpin;
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/* Fabricate imap information if this isn't an OFW device */
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bzero(®, sizeof(reg));
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reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
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(pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
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(pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
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intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, ®,
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sizeof(reg), &pintr, sizeof(pintr), mintr, sizeof(mintr),
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&iparent);
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if (intrcells) {
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/*
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* If we've found a mapping, return it and don't map
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* it again on higher levels - that causes problems
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* in some cases, and never seems to be required.
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*/
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mintr[0] = ofw_bus_map_intr(dev, iparent, intrcells,
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mintr);
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return (mintr[0]);
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}
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} else if (intpin >= 1 && intpin <= 4) {
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/*
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* When an interrupt map is missing, we need to do the
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* standard PCI swizzle and continue mapping at the parent.
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*/
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return (pcib_route_interrupt(bridge, dev, intpin));
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}
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return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent(
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bridge)), bridge, intpin));
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}
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static device_method_t fsl_pcib_rc_methods[] = {
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DEVMETHOD(device_probe, fsl_pcib_rc_probe),
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DEVMETHOD(device_attach, fsl_pcib_rc_attach),
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/* pcib interface */
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DEVMETHOD(pcib_route_interrupt, fsl_pcib_rc_route_interrupt),
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DEVMETHOD(pcib_request_feature, pcib_request_feature_allow),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, fsl_pcib_rc_get_node),
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DEVMETHOD_END
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};
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static devclass_t fsl_pcib_rc_devclass;
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DEFINE_CLASS_1(pcib, fsl_pcib_rc_driver, fsl_pcib_rc_methods,
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sizeof(struct fsl_pcib_softc), pcib_driver);
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sizeof(struct fsl_pcib_softc), ofw_pcib_pci_driver);
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DRIVER_MODULE(rcpcib, pci, fsl_pcib_rc_driver, fsl_pcib_rc_devclass, 0, 0);
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