Properly support the GPIO_PIN_PRESET_{LOW,HIGH} options when configuring
a gpio pin. If neither of the options is specified, pre-set the pin's output value to the pin's current input value, to achieve glitch-free transitions to output mode on pins that are pulled up or down at reset or via fdt pinctrl data.
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@ -506,21 +506,41 @@ static void
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imx51_gpio_pin_configure(struct imx51_gpio_softc *sc, struct gpio_pin *pin,
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unsigned int flags)
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{
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u_int newflags;
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u_int newflags, pad;
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mtx_lock_spin(&sc->sc_mtx);
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/*
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* Manage input/output; other flags not supported yet.
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* Manage input/output; other flags not supported yet (maybe not ever,
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* since we have no connection to the pad config registers from here).
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*
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* When setting a pin to output, honor the PRESET_[LOW,HIGH] flags if
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* present. Otherwise, for glitchless transistions on pins with pulls,
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* read the current state of the pad and preset the DR register to drive
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* the current value onto the pin before enabling the pin for output.
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*
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* Note that changes to pin->gp_flags must be acccumulated in newflags
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* and stored with a single writeback to gp_flags at the end, to enable
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* unlocked reads of that value elsewhere.
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* unlocked reads of that value elsewhere. This is only about unlocked
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* access to gp_flags from elsewhere; we still use locking in this
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* function to protect r-m-w access to the hardware registers.
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*/
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if (flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) {
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newflags = pin->gp_flags & ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
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if (flags & GPIO_PIN_OUTPUT) {
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if (flags & GPIO_PIN_PRESET_LOW) {
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pad = 0;
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} else if (flags & GPIO_PIN_PRESET_HIGH) {
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pad = 1;
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} else {
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if (flags & GPIO_PIN_OPENDRAIN)
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pad = READ4(sc, IMX_GPIO_PSR_REG);
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else
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pad = READ4(sc, IMX_GPIO_DR_REG);
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pad = (pad >> pin->gp_pin) & 1;
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}
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newflags |= GPIO_PIN_OUTPUT;
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SET4(sc, IMX_GPIO_DR_REG, (pad << pin->gp_pin));
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SET4(sc, IMX_GPIO_OE_REG, (1U << pin->gp_pin));
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} else {
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newflags |= GPIO_PIN_INPUT;
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@ -692,7 +712,7 @@ imx51_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
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sc = device_get_softc(dev);
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if (orig_pins != NULL)
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*orig_pins = READ4(sc, IMX_GPIO_PSR_REG);
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*orig_pins = READ4(sc, IMX_GPIO_DR_REG);
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if ((clear_pins | change_pins) != 0) {
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mtx_lock_spin(&sc->sc_mtx);
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@ -718,7 +738,7 @@ imx51_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
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return (EINVAL);
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drclr = drset = oeclr = oeset = 0;
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pads = READ4(sc, IMX_GPIO_PSR_REG);
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pads = READ4(sc, IMX_GPIO_DR_REG);
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for (i = 0; i < num_pins; ++i) {
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bit = 1u << i;
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