From d929c32b7fa99762b489f8ddb3d404a9dfeaca01 Mon Sep 17 00:00:00 2001 From: Nathan Whitehorn Date: Sun, 26 Jun 2016 18:43:42 +0000 Subject: [PATCH] Enter 64-bit mode as early as possible in the 64-bit PowerPC boot sequence. Most of the effect of setting MSR[SF] is that the CPU will stop ignoring the high 32 bits of registers containing addresses in load/store instructions. As such, the kernel was setting it only when it began to need access to high memory. MSR[SF] also affects the operation of some conditional instructions, however, and so setting it at late times could subtly break code at very early times. This fixes use of the FDT mode in loader, and FDT boot more generally, on 64-bit PowerPC systems. Hardware provided by: IBM LTC Approved by: re (kib) --- sys/powerpc/aim/aim_machdep.c | 11 ----------- sys/powerpc/aim/locore64.S | 8 ++++++++ 2 files changed, 8 insertions(+), 11 deletions(-) diff --git a/sys/powerpc/aim/aim_machdep.c b/sys/powerpc/aim/aim_machdep.c index 835783f972ec..ab09ab6b5ad7 100644 --- a/sys/powerpc/aim/aim_machdep.c +++ b/sys/powerpc/aim/aim_machdep.c @@ -179,17 +179,6 @@ aim_cpu_init(vm_offset_t toc) trap_offset = 0; cacheline_warn = 0; - #ifdef __powerpc64__ - /* - * Switch to 64-bit mode, if the bootloader didn't, before we start - * using memory beyond what the bootloader might have set up. - * Guaranteed not to cause an implicit branch since we either (a) - * started with a 32-bit bootloader below 4 GB or (b) were already in - * 64-bit mode, making this a no-op. - */ - mtmsrd(mfmsr() | PSL_SF); - #endif - /* Various very early CPU fix ups */ switch (mfpvr() >> 16) { /* diff --git a/sys/powerpc/aim/locore64.S b/sys/powerpc/aim/locore64.S index cd64b5f81cf9..e7d27b53b430 100644 --- a/sys/powerpc/aim/locore64.S +++ b/sys/powerpc/aim/locore64.S @@ -76,6 +76,14 @@ btext: */ .text ASENTRY_NOPROF(__start) + /* Set 64-bit mode if not yet set before branching to C */ + mfmsr %r20 + li %r21,1 + insrdi %r20,%r21,1,0 + mtmsrd %r20 + isync + nop /* Make this block a multiple of 8 bytes */ + /* Set up the TOC pointer */ b 0f .align 3