- splhigh()/splx() -> critical_enter()/critical_exit()
- fix KV macro in t2_pci.c to include the sable_lynx_base variable so that the T2 CSRs can be found on lynxes. Current should be bootable on lynxes now.
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@ -118,14 +118,14 @@ t2_set_hae_mem(void *arg, u_int32_t pa)
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msb = pa & 0xf8000000;
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pa -= msb;
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msb >>= 27; /* t2 puts high bits in the bottom of the register */
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s = splhigh();
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s = critical_enter();
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if (msb != t2_hae_mem[hose]) {
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t2_hae_mem[hose] = msb;
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t2_csr[hose]->hae0_1 = t2_hae_mem[hose];
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alpha_mb();
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t2_hae_mem[hose] = t2_csr[hose]->hae0_1;
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}
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splx(s);
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critical_exit(s);
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}
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return pa;
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}
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@ -44,7 +44,7 @@
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#include "alphapci_if.h"
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#include "pcib_if.h"
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#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
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#define KV(pa) ALPHA_PHYS_TO_K0SEG((pa) + sable_lynx_base)
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static devclass_t pcib_devclass;
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@ -92,7 +92,7 @@ t2_pcib_maxslots(device_t dev)
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#define T2_TYPE1_SETUP(b,s,old_hae3) if((b)) { \
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do { \
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(s) = splhigh(); \
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(s) = critical_enter(); \
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(old_hae3) = REGVAL(T2_HAE0_3); \
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alpha_mb(); \
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REGVAL(T2_HAE0_3) = (old_hae3) | (1<<30); \
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@ -105,7 +105,7 @@ t2_pcib_maxslots(device_t dev)
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alpha_mb(); \
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REGVAL(T2_HAE0_3) = (old_hae3); \
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alpha_mb(); \
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splx((s)); \
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critical_exit((s)); \
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} while(0); \
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}
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