libpmc: remove PMC_MDEP_TABLE logic

This logic was added for handling some of the complicated relationships
between events and x86 CPU models. Since that logic has been mostly
removed from libpmc(3) in favor of pmu-events, this no longer serves
much of a purpose. Mapping CPU types to event tables is already handled
by the switch statement in pmc_init().

Reviewed by:	ray, emaste
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D30196
This commit is contained in:
Mitchell Horne 2021-05-13 16:00:07 -03:00
parent 4d8d74a4f5
commit da13ef6aa0

View File

@ -177,32 +177,6 @@ static const struct pmc_event_descr cortex_a76_event_table[] =
__PMC_EV_ALIAS_ARMV8_CORTEX_A76()
};
/*
* PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
*
* Map a CPU to the PMC classes it supports.
*/
#define PMC_MDEP_TABLE(N,C,...) \
static const enum pmc_class N##_pmc_classes[] = { \
PMC_CLASS_##C, __VA_ARGS__ \
}
PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
PMC_MDEP_TABLE(beri, BERI, PMC_CLASS_SOFT, PMC_CLASS_BERI);
PMC_MDEP_TABLE(cortex_a8, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
PMC_MDEP_TABLE(cortex_a9, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
PMC_MDEP_TABLE(cortex_a76, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K);
PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450, PMC_CLASS_TSC);
PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970, PMC_CLASS_TSC);
PMC_MDEP_TABLE(power8, POWER8, PMC_CLASS_SOFT, PMC_CLASS_POWER8, PMC_CLASS_TSC);
PMC_MDEP_TABLE(e500, E500, PMC_CLASS_SOFT, PMC_CLASS_E500, PMC_CLASS_TSC);
PMC_MDEP_TABLE(generic, SOFT, PMC_CLASS_SOFT);
static const struct pmc_event_descr tsc_event_table[] =
{
__PMC_EV_TSC()
@ -264,9 +238,6 @@ static struct pmc_class_descr soft_class_table_descr =
static const struct pmc_class_descr **pmc_class_table;
#define PMC_CLASS_TABLE_SIZE cpu_info.pm_nclass
static const enum pmc_class *pmc_mdep_class_list;
static size_t pmc_mdep_class_list_size;
/*
* Mapping tables, mapping enumeration values to human readable
* strings.
@ -985,17 +956,6 @@ pmc_match_event_class(const char *name,
return (NULL);
}
static int
pmc_mdep_is_compatible_class(enum pmc_class pc)
{
size_t n;
for (n = 0; n < pmc_mdep_class_list_size; n++)
if (pmc_mdep_class_list[n] == pc)
return (1);
return (0);
}
/*
* API entry points
*/
@ -1070,8 +1030,7 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
ev = NULL;
for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++) {
pcd = pmc_class_table[n];
if (pcd && pmc_mdep_is_compatible_class(pcd->pm_evc_class) &&
strncasecmp(ctrname, pcd->pm_evc_name,
if (pcd != NULL && strncasecmp(ctrname, pcd->pm_evc_name,
pcd->pm_evc_name_size) == 0) {
if ((ev = pmc_match_event_class(ctrname +
pcd->pm_evc_name_size, pcd)) == NULL) {
@ -1088,7 +1047,7 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
*/
for (n = 0; ev == NULL && n < PMC_CLASS_TABLE_SIZE; n++) {
pcd = pmc_class_table[n];
if (pcd && pmc_mdep_is_compatible_class(pcd->pm_evc_class))
if (pcd != NULL)
ev = pmc_match_event_class(ctrname, pcd);
}
@ -1444,12 +1403,7 @@ pmc_init(void)
pmc_class_table[n++] = &tsc_class_table_descr;
#endif
#define PMC_MDEP_INIT(C) do { \
pmc_mdep_event_aliases = C##_aliases; \
pmc_mdep_class_list = C##_pmc_classes; \
pmc_mdep_class_list_size = \
PMC_TABLE_SIZE(C##_pmc_classes); \
} while (0)
#define PMC_MDEP_INIT(C) pmc_mdep_event_aliases = C##_aliases
/* Configure the event name parser. */
switch (cpu_info.pm_cputype) {