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Initialisation routines for the mailbox, spinlock and PRU-ICSS clocks.

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This commit is contained in:
Rui Paulo 2013-07-31 05:52:03 +00:00
parent 6e22f9f3da
commit db10a06d50
2 changed files with 79 additions and 1 deletions
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72
sys/arm/ti/am335x/am335x_prcm.c
View File

@ -78,15 +78,19 @@ __FBSDID("$FreeBSD$");
#define CM_PER_EPWMSS2_CLKCTRL (CM_PER + 0x0D8)
#define CM_PER_L3_INSTR_CLKCTRL (CM_PER + 0x0DC)
#define CM_PER_L3_CLKCTRL (CM_PER + 0x0E0)
#define CM_PER_PRUSS_CLKCTRL (CM_PER + 0x0E8)
#define CM_PER_TIMER5_CLKCTRL (CM_PER + 0x0EC)
#define CM_PER_TIMER6_CLKCTRL (CM_PER + 0x0F0)
#define CM_PER_MMC1_CLKCTRL (CM_PER + 0x0F4)
#define CM_PER_MMC2_CLKCTRL (CM_PER + 0x0F8)
#define CM_PER_TPTC1_CLKCTRL (CM_PER + 0x0FC)
#define CM_PER_TPTC2_CLKCTRL (CM_PER + 0x100)
#define CM_PER_SPINLOCK0_CLKCTRL (CM_PER + 0x10C)
#define CM_PER_MAILBOX0_CLKCTRL (CM_PER + 0x110)
#define CM_PER_OCPWP_L3_CLKSTCTRL (CM_PER + 0x12C)
#define CM_PER_OCPWP_CLKCTRL (CM_PER + 0x130)
#define CM_PER_CPSW_CLKSTCTRL (CM_PER + 0x144)
#define CM_PER_PRUSS_CLKSTCTRL (CM_PER + 0x140)
#define CM_WKUP 0x400
#define CM_WKUP_CLKSTCTRL (CM_WKUP + 0x000)
@ -107,6 +111,10 @@ __FBSDID("$FreeBSD$");
#define CLKSEL_TIMER4_CLK (CM_DPLL + 0x010)
#define CLKSEL_TIMER5_CLK (CM_DPLL + 0x018)
#define CLKSEL_TIMER6_CLK (CM_DPLL + 0x01C)
#define CLKSEL_PRUSS_OCP_CLK (CM_DPLL + 0x030)
#define PRM_PER 0xC00
#define PRM_PER_RSTCTRL (PRM_PER + 0x00)
#define PRM_DEVICE_OFFSET 0xF00
#define PRM_RSTCTRL (PRM_DEVICE_OFFSET + 0x00)
@ -136,6 +144,7 @@ static void am335x_prcm_reset(void);
static int am335x_clk_cpsw_activate(struct ti_clock_dev *clkdev);
static int am335x_clk_musb0_activate(struct ti_clock_dev *clkdev);
static int am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev);
static int am335x_clk_pruss_activate(struct ti_clock_dev *clkdev);
#define AM335X_GENERIC_CLOCK_DEV(i) \
{ .id = (i), \
@ -243,6 +252,23 @@ struct ti_clock_dev ti_clk_devmap[] = {
AM335X_GENERIC_CLOCK_DEV(PWMSS1_CLK),
AM335X_GENERIC_CLOCK_DEV(PWMSS2_CLK),
/* System Mailbox clock */
AM335X_GENERIC_CLOCK_DEV(MAILBOX0_CLK),
/* SPINLOCK */
AM335X_GENERIC_CLOCK_DEV(SPINLOCK0_CLK),
/* PRU-ICSS */
{ .id = PRUSS_CLK,
.clk_activate = am335x_clk_pruss_activate,
.clk_deactivate = NULL,
.clk_set_source = NULL,
.clk_accessible = NULL,
.clk_get_source_freq = NULL,
},
{ INVALID_CLK_IDENT, NULL, NULL, NULL, NULL }
};
@ -295,6 +321,9 @@ static struct am335x_clk_details g_am335x_clk_details[] = {
_CLK_DETAIL(PWMSS1_CLK, CM_PER_EPWMSS1_CLKCTRL, 0),
_CLK_DETAIL(PWMSS2_CLK, CM_PER_EPWMSS2_CLKCTRL, 0),
_CLK_DETAIL(MAILBOX0_CLK, CM_PER_MAILBOX0_CLKCTRL, 0),
_CLK_DETAIL(SPINLOCK0_CLK, CM_PER_SPINLOCK0_CLKCTRL, 0),
{ INVALID_CLK_IDENT, 0},
};
@ -628,7 +657,7 @@ am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev)
DELAY(10);
/*
* For now set frequenct to 5xSYSFREQ
* For now set frequency to 5xSYSFREQ
* More flexible control might be required
*/
prcm_write_4(CM_WKUP_CM_CLKSEL_DPLL_DISP, (5 << 8) | 0);
@ -654,3 +683,44 @@ am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev)
return (0);
}
static int
am335x_clk_pruss_activate(struct ti_clock_dev *clkdev)
{
struct am335x_prcm_softc *sc = am335x_prcm_sc;
if (sc == NULL)
return (ENXIO);
/* Set MODULEMODE to ENABLE(2) */
prcm_write_4(CM_PER_PRUSS_CLKCTRL, 2);
/* Wait for MODULEMODE to become ENABLE(2) */
while ((prcm_read_4(CM_PER_PRUSS_CLKCTRL) & 0x3) != 2)
DELAY(10);
/* Set CLKTRCTRL to SW_WKUP(2) */
prcm_write_4(CM_PER_PRUSS_CLKSTCTRL, 2);
/* Wait for the 200 MHz OCP clock to become active */
while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<4)) == 0)
DELAY(10);
/* Wait for the 200 MHz IEP clock to become active */
while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<5)) == 0)
DELAY(10);
/* Wait for the 192 MHz UART clock to become active */
while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<6)) == 0)
DELAY(10);
/* Select DISP DPLL as OCP clock */
prcm_write_4(CLKSEL_PRUSS_OCP_CLK, 1);
while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 1)
DELAY(10);
/* Clear the RESET bit */
prcm_write_4(PRM_PER_RSTCTRL, prcm_read_4(PRM_PER_RSTCTRL) & ~2);
return (0);
}

8
sys/arm/ti/ti_prcm.h
View File

@ -149,6 +149,14 @@ typedef enum {
PWMSS1_CLK,
PWMSS2_CLK,
/* Mailbox modules */
MAILBOX0_CLK = 1500,
/* Spinlock modules */
SPINLOCK0_CLK = 1600,
PRUSS_CLK = 1700,
INVALID_CLK_IDENT
} clk_ident_t;