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A port of NetBSD's AlphaServer 1000 and 1000A support. Thanks to Cristian

Browse Source 
Angelini for allowing me to use his AS1000 to do the port.

Note that this is untested on AlphaServer 1000A hardware.

Reviewed by:	dfr
Tested by:   	Cristian Angelini <chr.ang@biella.alpcom.it>
Obtained From: 	NetBSD
This commit is contained in:
Andrew Gallatin 1999-12-01 15:25:04 +00:00
parent 3e566c6577
commit dbc58a480c
8 changed files with 426 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
sys/alpha/alpha/cpuconf.c
View File

@ -104,6 +104,12 @@ extern void st6600_init __P((int));
#define st6600_init platform_not_configured
#endif
#ifdef DEC_1000A
extern void dec_1000a_init __P((int));
#else
#define dec_1000a_init platform_not_configured
#endif
struct cpuinit cpuinit[] = {
cpu_notsupp("???"), /* 0: ??? */
cpu_notsupp("ST_ADU"), /* 1: ST_ADU */
@ -122,7 +128,7 @@ struct cpuinit cpuinit[] = {
cpu_notsupp("ST_DEC_MUSTANG"), /* 14: ST_DEC_MUSTANG */
cpu_init(dec_kn20aa_init,"DEC_KN20AA"), /* 15: ST_DEC_KN20AA */
cpu_notsupp("???"), /* 16: ??? */
cpu_notsupp("ST_DEC_1000"), /* 17: ST_DEC_1000 */
cpu_init(dec_1000a_init, "ST_DEC_1000"), /* 17: ST_DEC_1000 */
cpu_notsupp("???"), /* 18: ??? */
cpu_notsupp("ST_EB66"), /* 19: ST_EB66 */
cpu_init(dec_eb64plus_init,"DEC_EB64PLUS"), /* 20: ST_EB64P */
@ -132,7 +138,7 @@ struct cpuinit cpuinit[] = {
cpu_notsupp("ST_DEC_2100A_A500"), /* 24: ST_DEC_2100A_A500 */
cpu_notsupp("???"), /* 25: ??? */
cpu_init(dec_eb164_init,"DEC_EB164"), /* 26: ST_EB164 */
cpu_notsupp("ST_DEC_1000A"), /* 27: ST_DEC_1000A */
cpu_init(dec_1000a_init,"ST_DEC_1000A"), /* 27: ST_DEC_1000A */
cpu_notsupp("ST_DEC_ALPHAVME_224"), /* 28: ST_DEC_ALPHAVME_224 */
cpu_notsupp("???"), /* 29: ??? */
cpu_init(st550_init,"DEC_ST550"), /* 30: ST_DEC_550 */

402
sys/alpha/alpha/dec_1000a.c Normal file
View File

@ -0,0 +1,402 @@
/* $NetBSD: dec_1000a.c,v 1.5 1999/04/15 22:06:47 thorpej Exp $ */
/*
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is based on dec_kn20aa.c, written by Chris G. Demetriou at
* Carnegie-Mellon University. Platform support for Noritake, Pintake, and
* Corelle by Ross Harvey with copyright assignment by permission of Avalon
* Computer Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University.
* All rights reserved.
*
* Author: Chris G. Demetriou
*
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
* School of Computer Science
* Carnegie Mellon University
* Pittsburgh PA 15213-3890
*
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*/
/*
* Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center
*/
/*
* Additional Copyright (c) 1999 by Andrew Gallatin
*
* $FreeBSD$
*/
#include "opt_ddb.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/termios.h>
#include <machine/rpb.h>
#include <machine/cpuconf.h>
#include <machine/clock.h>
#include <alpha/pci/apecsvar.h>
#include <alpha/pci/ciavar.h>
#include <pci/pcivar.h>
#include "sio.h"
#include "sc.h"
#ifndef CONSPEED
#define CONSPEED TTYDEF_SPEED
#endif
static int comcnrate = CONSPEED;
void dec_1000a_init __P((int));
static void dec_1000a_cons_init __P((void));
static void dec_1000_intr_map __P((void *));
static void dec_1000_intr_disable __P((int));
static void dec_1000_intr_enable __P((int));
static void dec_1000_intr_init __P((void));
static void dec_1000a_intr_map __P((void *));
static void dec_1000a_intr_disable __P((int));
static void dec_1000a_intr_enable __P((int));
static void dec_1000a_intr_init __P((void));
extern int siocnattach __P((int, int));
extern int siogdbattach __P((int, int));
extern int sccnattach __P((void));
static const struct alpha_variation_table dec_1000_variations[] = {
{ 0, "AlphaServer 1000" },
{ 0, NULL },
};
static const struct alpha_variation_table dec_1000a_variations[] = {
{ 0, "AlphaServer 1000A" },
{ 0, NULL },
};
void
dec_1000a_init(int cputype)
{
u_int64_t variation;
platform.family = "AlphaServer 1000/1000A";
if ((platform.model = alpha_dsr_sysname()) == NULL) {
variation = hwrpb->rpb_variation & SV_ST_MASK;
if ((platform.model = alpha_variation_name(variation,
cputype == ST_DEC_1000 ? dec_1000_variations
: dec_1000a_variations)) == NULL)
platform.model = alpha_unknown_sysname();
}
switch(LOCATE_PCS(hwrpb, 0)->pcs_proc_type & PCS_PROC_MAJOR) {
case PCS_PROC_EV4:
case PCS_PROC_EV45:
platform.iobus = "apecs";
platform.pci_intr_map = dec_1000_intr_map;
platform.pci_intr_disable = dec_1000_intr_disable;
platform.pci_intr_enable = dec_1000_intr_enable;
platform.pci_intr_init = dec_1000_intr_init;
break;
default:
/*
* XXX the AlphaServer 1000a support is totally
* untested at this point, so ask the user for
* a status report
*/
printf("Warning: FreeBSD support for the AlphaServer ");
printf("1000A is currently untested!\n");
printf("Please contact gallatin@freebsd.org & report ");
printf("success or failure.\n");
platform.iobus = "cia";
platform.pci_intr_map = dec_1000a_intr_map;
platform.pci_intr_disable = dec_1000a_intr_disable;
platform.pci_intr_enable = dec_1000a_intr_enable;
platform.pci_intr_init = dec_1000a_intr_init;
break;
}
platform.cons_init = dec_1000a_cons_init;
}
extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
static void
dec_1000a_cons_init()
{
struct ctb *ctb;
if(strcmp(platform.iobus, "cia") == 0) {
cia_init();
} else {
apecs_init();
}
#ifdef DDB
siogdbattach(0x2f8, 57600);
#endif
ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
switch (ctb->ctb_term_type) {
case 2:
/* serial console ... */
/* XXX */
{
/*
* Delay to allow PROM putchars to complete.
* FIFO depth * character time,
* character time = (1000000 / (defaultrate / 10))
*/
DELAY(160000000 / comcnrate);
/*
* force a comconsole on com1 if the SRM has a serial
* console
*/
comconsole = 0;
if (siocnattach(0x3f8, comcnrate))
panic("can't init serial console");
break;
}
case 3:
/* display console ... */
/* XXX */
#if NSC > 0
sccnattach();
#else
panic("not configured to use display && keyboard console");
#endif
break;
default:
printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type);
printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot);
panic("consinit: unknown console type %d\n",
(int) ctb->ctb_term_type);
}
}
static void
dec_1000_intr_map(arg)
void *arg;
{
pcicfgregs *cfg = (pcicfgregs *)arg;
if (cfg->intpin == 0) /* No IRQ used. */
return;
if (!(1 <= cfg->intpin && cfg->intpin <= 4))
goto bad;
switch(cfg->slot) {
case 6:
if(cfg->intpin != 1)
break;
cfg->intline = 0xc; /* integrated ncr scsi */
return;
break;
case 11:
case 12:
case 13:
cfg->intline = (cfg->slot - 11) * 4 + cfg->intpin - 1;
return;
break;
}
bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n",
cfg->slot, cfg->intpin);
}
/*
* Read and write the mystery ICU IMR registers
* on the AlphaServer 1000
*/
#define IR() inw(0x536)
#define IW(x) outw(0x536, (x))
/*
* Enable and disable interrupts at the ICU level
*/
static void
dec_1000_intr_enable(irq)
int irq;
{
IW(IR() | 1 << irq);
}
static void
dec_1000_intr_disable(irq)
int irq;
{
IW(IR() & ~(1 << irq));
}
static void
dec_1000_intr_init()
{
/*
* Initialize mystery ICU
*/
IW(0); /* XXX ?? */
/*
* Enable cascade interrupt.
*/
dec_1000_intr_enable(2);
}
/*
* Read and write the mystery ICU IMR registers
* on the AlphaServer 1000a
*/
#define IRA(o) inw(0x54a + 2*(o))
#define IWA(o, v) outw(0x54a + 2*(o), (v))
#define IMR2IRQ(bn) ((bn) - 1)
#define IRQ2IMR(irq) ((irq) + 1)
static void
dec_1000a_intr_map(arg)
void *arg;
{
pcicfgregs *cfg = (pcicfgregs *)arg;
int device = cfg->slot;
int imrbit;
/*
* Get bit number in mystery ICU imr
*/
static const signed char imrmap[][4] = {
# define IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 }
# define IRQNONE { 0, 0, 0, 0 }
/* 0 */ { 1, 0, 0, 0 }, /* Noritake and Pintake */
/* 1 */ IRQSPLIT(8),
/* 2 */ IRQSPLIT(10),
/* 3 */ IRQSPLIT(12),
/* 4 */ IRQSPLIT(14),
/* 5 */ { 1, 0, 0, 0 }, /* Corelle */
/* 6 */ { 10, 0, 0, 0 }, /* Corelle */
/* 7 */ IRQNONE,
/* 8 */ { 1, 0, 0, 0 }, /* isp behind ppb */
/* 9 */ IRQNONE,
/* 10 */ IRQNONE,
/* 11 */ IRQSPLIT(2),
/* 12 */ IRQSPLIT(4),
/* 13 */ IRQSPLIT(6),
/* 14 */ IRQSPLIT(8) /* Corelle */
};
if (cfg->intpin == 0) /* No IRQ used. */
return;
if (!(1 <= cfg->intpin && cfg->intpin <= 4))
goto bad;
if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) {
if (device == 0)
printf("dec_1000a_intr_map: ?! UNEXPECTED DEV 0\n");
imrbit = imrmap[device][cfg->intpin - 1];
if (imrbit) {
cfg->intline = IMR2IRQ(imrbit);
return;
}
}
bad: printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, cfg->intpin);
}
static void
dec_1000a_intr_enable(irq)
int irq;
{
int imrval = IRQ2IMR(irq);
int i = imrval >= 16;
IWA(i, IRA(i) | 1 << (imrval & 0xf));
}
static void
dec_1000a_intr_disable(irq)
int irq;
{
int imrval = IRQ2IMR(irq);
int i = imrval >= 16;
IWA(i, IRA(i) & ~(1 << (imrval & 0xf)));
}
static void
dec_1000a_intr_init()
{
/*
* Initialize mystery ICU
*/
IWA(0, IRA(0) & 1);
IWA(1, IRA(0) & 3);
/*
* Enable cascade interrupt.
*/
dec_1000_intr_enable(2);
}

1
sys/alpha/conf/GENERIC
View File

@ -35,6 +35,7 @@ options DEC_ST550 # Personal Workstation 433, 500, 600
options DEC_ST6600 # xp1000, dp264, ds20, ds10, family
options DEC_3000_300 # DEC3000/300* Pelic* family
options DEC_3000_500 # DEC3000/[4-9]00 Flamingo/Sandpiper family
options DEC_1000A # AlphaServer 1000, 1000A, 800
options INET #InterNETworking
options FFS #Berkeley Fast Filesystem

1
sys/alpha/conf/NOTES
View File

@ -35,6 +35,7 @@ options DEC_ST550 # Personal Workstation 433, 500, 600
options DEC_ST6600 # xp1000, dp264, ds20, ds10, family
options DEC_3000_300 # DEC3000/300* Pelic* family
options DEC_3000_500 # DEC3000/[4-9]00 Flamingo/Sandpiper family
options DEC_1000A # AlphaServer 1000, 1000A, 800
options INET #InterNETworking
options FFS #Berkeley Fast Filesystem

6
sys/alpha/conf/files.alpha
View File

@ -30,6 +30,8 @@ alpha/alpha/dec_kn8ae.c optional dec_kn8ae
alpha/alpha/dec_eb164.c optional dec_eb164
alpha/alpha/dec_eb64plus.c optional dec_eb64plus
alpha/alpha/dec_kn20aa.c optional dec_kn20aa
alpha/alpha/dec_1000a.c optional dec_1000a
alpha/alpha/dec_1000a.c optional dec_1000a
alpha/alpha/dec_2100_a50.c optional dec_2100_a50
alpha/alpha/dec_st550.c optional dec_st550
alpha/alpha/dec_st6600.c optional dec_st6600
@ -132,14 +134,18 @@ alpha/isa/isa_dma.c optional isa
alpha/isa/mcclock_isa.c optional isa
alpha/pci/apecs.c optional dec_2100_a50
alpha/pci/apecs.c optional dec_eb64plus
alpha/pci/apecs.c optional dec_1000a
alpha/pci/apecs_pci.c optional dec_2100_a50
alpha/pci/apecs_pci.c optional dec_eb64plus
alpha/pci/apecs_pci.c optional dec_1000a
alpha/pci/cia.c optional dec_eb164
alpha/pci/cia.c optional dec_kn20aa
alpha/pci/cia.c optional dec_st550
alpha/pci/cia.c optional dec_1000a
alpha/pci/cia_pci.c optional dec_eb164
alpha/pci/cia_pci.c optional dec_kn20aa
alpha/pci/cia_pci.c optional dec_st550
alpha/pci/cia_pci.c optional dec_1000a
alpha/pci/lca.c optional dec_axppci_33
alpha/pci/lca_pci.c optional dec_axppci_33
alpha/pci/pci_eb164_intr.s optional dec_eb164

1
sys/alpha/conf/options.alpha
View File

@ -12,6 +12,7 @@ DEC_ST6600 opt_cpu.h
DEC_AXPPCI_33 opt_cpu.h
DEC_3000_300 opt_cpu.h
DEC_3000_500 opt_cpu.h
DEC_1000A opt_cpu.h
ATAPI opt_atapi.h
ATAPI_STATIC opt_atapi.h

6
sys/conf/files.alpha
View File

@ -30,6 +30,8 @@ alpha/alpha/dec_kn8ae.c optional dec_kn8ae
alpha/alpha/dec_eb164.c optional dec_eb164
alpha/alpha/dec_eb64plus.c optional dec_eb64plus
alpha/alpha/dec_kn20aa.c optional dec_kn20aa
alpha/alpha/dec_1000a.c optional dec_1000a
alpha/alpha/dec_1000a.c optional dec_1000a
alpha/alpha/dec_2100_a50.c optional dec_2100_a50
alpha/alpha/dec_st550.c optional dec_st550
alpha/alpha/dec_st6600.c optional dec_st6600
@ -132,14 +134,18 @@ alpha/isa/isa_dma.c optional isa
alpha/isa/mcclock_isa.c optional isa
alpha/pci/apecs.c optional dec_2100_a50
alpha/pci/apecs.c optional dec_eb64plus
alpha/pci/apecs.c optional dec_1000a
alpha/pci/apecs_pci.c optional dec_2100_a50
alpha/pci/apecs_pci.c optional dec_eb64plus
alpha/pci/apecs_pci.c optional dec_1000a
alpha/pci/cia.c optional dec_eb164
alpha/pci/cia.c optional dec_kn20aa
alpha/pci/cia.c optional dec_st550
alpha/pci/cia.c optional dec_1000a
alpha/pci/cia_pci.c optional dec_eb164
alpha/pci/cia_pci.c optional dec_kn20aa
alpha/pci/cia_pci.c optional dec_st550
alpha/pci/cia_pci.c optional dec_1000a
alpha/pci/lca.c optional dec_axppci_33
alpha/pci/lca_pci.c optional dec_axppci_33
alpha/pci/pci_eb164_intr.s optional dec_eb164

1
sys/conf/options.alpha
View File

@ -12,6 +12,7 @@ DEC_ST6600 opt_cpu.h
DEC_AXPPCI_33 opt_cpu.h
DEC_3000_300 opt_cpu.h
DEC_3000_500 opt_cpu.h
DEC_1000A opt_cpu.h
ATAPI opt_atapi.h
ATAPI_STATIC opt_atapi.h