Add gpio(4) man page to attempt to document the current hints based setup of
pin outputs, functions and setup. Add cross reference in gpioctl(8) for people to find. This is by no means complete and really only covers gpioled(4) and the Atheros based systems who expose a few extra hints at boot time. This should be updated by developers who know more about this system than I and viewed as the beginning of documentation, not the end. Reviewed by: adrian Approved by: re (joel) MFC after: 2 weeks
This commit is contained in:
Sean Bruno
parent
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commit
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@ -154,6 +154,7 @@ MAN= aac.4 \
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geom_uzip.4 \
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gif.4 \
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gpib.4 \
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gpio.4 \
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gre.4 \
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h_ertt.4 \
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hatm.4 \
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176
share/man/man4/gpio.4
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176
share/man/man4/gpio.4
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@ -0,0 +1,176 @@
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.\" Copyright (c) 2013, Sean Bruno <sbruno@freebsd.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd September 13, 2013
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.Dt GPIO 4
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.Os
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.Sh NAME
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.Nm gpiobus
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.Nd GPIO bus system
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.Sh SYNOPSIS
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To compile these devices into your kernel and use the device hints, place the
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following lines in your kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device gpiobus"
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.Cd "device gpioiic"
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.Cd "device gpio"
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.Cd "device gpioc"
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.Cd "device gpioled"
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.Ed
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.Pp
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Additional device entries for the
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.Li ARM
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architecure include:
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.Bd -ragged -offset indent
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.Cd "device a10_gpio"
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.Cd "device bcm_gpio"
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.Cd "device imx51_gpio"
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.Cd "device lpcgpio"
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.Cd "device mv_gpio"
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.Cd "device ti_gpio"
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.Cd "device gpio_avila"
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.Cd "device gpio_cambria"
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.Cd "device zy7_gpio"
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.Cd "device pxagpio"
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.Ed
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.Pp
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Additional device entries for the
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.Li MIPS
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architecure include:
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.Bd -ragged -offset indent
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.Cd "device ar71xxx_gpio"
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.Cd "device octeon_gpio"
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.Cd "device rt305_gpio"
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.Ed
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.Pp
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Additional device entries for the
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.Li POWERPC
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architecure include:
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.Bd -ragged -offset indent
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.Cd "device wiigpio"
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.Cd "device macgpio"
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.Ed
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.Sh DESCRIPTION
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The
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.Em gpiobus
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system provides a simple interface to the bit banging style GPIO bus
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found on embedded architectures.
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.Pp
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The acronym
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.Li GPIO
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means
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.Dq General-Purpose Input/Output.
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.Pp
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The BUS physically consists of multiple pins that can be configured
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for input/output, IRQ delivery, SDA/SCL
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.Em iicbus
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use, etc.
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On most embedded architechtures (mips/arm), discovery of the bus and
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configuration of the pins is done via
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.Xr device.hints 5
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in the platform's kernel
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.Xr config 5
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file.
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.Pp
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Assignment of
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.Xr gpioiic 4
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bus variables is done via:
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.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
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.It Va hint.gpioiic.%d.at
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Normally just gpiobus0.
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.It Va hint.gpioiic.%d.pins
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This is a bitmask of the pins on the gpio board that are to be used for
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SCLOCK and SDATA from the IIC bus.
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To configure pin 0 and 7, use the bitmask of
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10000001 and convert it to a hexadecimal value of 0x0081.
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Should only ever have two bits set in mask.
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.It Va hint.gpioiic.%d.scl
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Indicates which bit in the
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.Va hint.gpioiic.%d.pins
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should be used as the SCLOCK
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source.
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.It Va hint.gpioiic.%d.sda
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Indicates which bit in the
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.Va hint.gpioiic.%d.pins
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should be used as the SDATA
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source.
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.El
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.Pp
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The following are only provided by the
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.Cd ar71xx_gpio
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driver.
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.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
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.It Va hint.gpio.%d.pinmask
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This is a bitmask of pins on the gpio board that we would like to expose
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for use to the host o/s.
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To expose pin 0, 4 and 7, use the bitmask of
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10010001 converted to the hexadecimal value 0x0091.
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.It Va hint.gpio.%d.pinon
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This is a bitmask of pins on the gpio board that will be set to ON at host
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start.
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To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of
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10000000010010 converted to the hexadecimal value 0x2022.
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.It Va hint.gpio.function_set
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.It Va hint.gpio.function_clear
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These are a bitmask of pins that will remap a pin to handle a specific
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function (USB, UART TX/RX, etc) in the Atheros function registers.
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This is mainly used to set/clear functions that we need when they are setup or
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not setup by uBoot.
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.El
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.Pp
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These values are configureable from the
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.Xr gpioled 4
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interface and help create
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.Xr led 4
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compatible devices in
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.Pa /dev/led/<name> .
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.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
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.It Va hint.gpioled.%d.at
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Normally assigned to gpiobus0.
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.It Va hint.gpioled.%d.name
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Arbitrary name of device in
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.Pa /dev/led/
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to create for
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.Xr led 4
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interfaces.
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.It Va hint.gpioled.%d.pins
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Which pin on the GPIO interface to map to this instance.
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.El
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.Pp
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Simply put, each pin of the GPIO interface is connected to an input/output
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of some device in a system.
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.Sh SEE ALSO
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.Xr iicbus 4 ,
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.Xr gpioctl 8
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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.Fx 10.0 .
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.Sh AUTHORS
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This
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manual page was written by
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.An Sean Bruno Aq sbruno@FreeBSD.org .
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@ -27,7 +27,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd May 25, 2011
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.Dd August 13, 2013
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.Dt GPIOCTL 1
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.Os
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.Sh NAME
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@ -105,6 +105,8 @@ Configure pin 12 to be input pin
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.Pp
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gpioctl -f /dev/gpioc0 -c 12 IN
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.El
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.Sh SEE ALSO
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.Xr gpio 4
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.Sh HISTORY
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The
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.Nm
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