INTRNG: only shuffle for !EARLY_AP_STARTUP
During device attachment, all interrupt sources will bind to the BSP, as it is the only processor online. This means interrupts must be redistributed ("shuffled") later, during SI_SUB_SMP. For the EARLY_AP_STARTUP case, this is no longer true. SI_SUB_SMP will execute much earlier, meaning APs will be online and available before devices begin attachment, and there will therefore be nothing to shuffle. All PIC-conforming interrupt controllers will handle this early distribution properly, except for RISC-V's PLIC. Make the necessary tweak to the PLIC driver. While here, convert irq_assign_cpu from a boolean_t to a bool. Reviewed by: markj Differential Revision: https://reviews.freebsd.org/D25693
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@ -128,7 +128,11 @@ static struct intr_irqsrc *irq_sources[NIRQ];
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u_int irq_next_free;
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#ifdef SMP
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static boolean_t irq_assign_cpu = FALSE;
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#ifdef EARLY_AP_STARTUP
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static bool irq_assign_cpu = true;
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#else
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static bool irq_assign_cpu = false;
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#endif
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#endif
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/*
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@ -1191,6 +1195,7 @@ intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
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return (last_cpu);
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}
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#ifndef EARLY_AP_STARTUP
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/*
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* Distribute all the interrupt sources among the available
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* CPUs once the AP's have been launched.
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@ -1205,7 +1210,7 @@ intr_irq_shuffle(void *arg __unused)
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return;
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mtx_lock(&isrc_table_lock);
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irq_assign_cpu = TRUE;
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irq_assign_cpu = true;
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for (i = 0; i < NIRQ; i++) {
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isrc = irq_sources[i];
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if (isrc == NULL || isrc->isrc_handlers == 0 ||
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@ -1231,6 +1236,7 @@ intr_irq_shuffle(void *arg __unused)
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mtx_unlock(&isrc_table_lock);
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}
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SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
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#endif /* !EARLY_AP_STARTUP */
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#else
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u_int
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@ -1239,7 +1245,7 @@ intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
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return (PCPU_GET(cpuid));
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}
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#endif
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#endif /* SMP */
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/*
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* Allocate memory for new intr_map_data structure.
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@ -408,8 +408,7 @@ plic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
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sc = device_get_softc(dev);
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src = (struct plic_irqsrc *)isrc;
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/* Bind to the boot CPU for now. */
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CPU_SET(PCPU_GET(cpuid), &isrc->isrc_cpu);
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CPU_ZERO(&isrc->isrc_cpu);
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plic_bind_intr(dev, isrc);
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return (0);
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