Make it possible to re-evaluate cpu_features.
Add cpuctl(4) ioctl CPUCTL_EVAL_CPU_FEATURES which forces re-read of cpu_features, cpu_features2, cpu_stdext_features, and std_stdext_features2. The intent is to allow the kernel to see the changes in the CPU features after micocode update. Of course, the update is not atomic across variables and not synchronized with readers. See the man page warning as well. Reviewed by: imp (previous version), jilles Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D13770
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6947b91466
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@ -1535,7 +1535,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
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kmdp = init_ops.parse_preload_data(modulep);
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identify_cpu();
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identify_cpu1();
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identify_hypervisor();
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/* Init basic tunables, hz etc */
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@ -73,6 +73,7 @@ static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
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struct thread *td);
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static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
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struct thread *td);
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static int cpuctl_do_eval_cpu_features(int cpu, struct thread *td);
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static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
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struct thread *td);
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static int update_intel(int cpu, cpuctl_update_args_t *args,
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@ -159,7 +160,8 @@ cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
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}
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/* Require write flag for "write" requests. */
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if ((cmd == CPUCTL_MSRCBIT || cmd == CPUCTL_MSRSBIT ||
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cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR) &&
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cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR ||
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cmd == CPUCTL_EVAL_CPU_FEATURES) &&
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(flags & FWRITE) == 0)
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return (EPERM);
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switch (cmd) {
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@ -187,6 +189,9 @@ cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
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ret = cpuctl_do_cpuid_count(cpu,
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(cpuctl_cpuid_count_args_t *)data, td);
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break;
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case CPUCTL_EVAL_CPU_FEATURES:
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ret = cpuctl_do_eval_cpu_features(cpu, td);
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break;
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default:
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ret = EINVAL;
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break;
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@ -504,6 +509,29 @@ fail:
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return (ret);
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}
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static int
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cpuctl_do_eval_cpu_features(int cpu, struct thread *td)
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{
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int is_bound = 0;
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int oldcpu;
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KASSERT(cpu >= 0 && cpu <= mp_maxid,
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("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
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#ifdef __i386__
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if (cpu_id == 0)
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return (ENODEV);
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#endif
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oldcpu = td->td_oncpu;
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is_bound = cpu_sched_is_bound(td);
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set_cpu(cpu, td);
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identify_cpu1();
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identify_cpu2();
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restore_cpu(oldcpu, is_bound, td);
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return (0);
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}
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int
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cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
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{
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@ -59,5 +59,6 @@ typedef struct {
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#define CPUCTL_MSRSBIT _IOWR('c', 5, cpuctl_msr_args_t)
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#define CPUCTL_MSRCBIT _IOWR('c', 6, cpuctl_msr_args_t)
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#define CPUCTL_CPUID_COUNT _IOWR('c', 7, cpuctl_cpuid_count_args_t)
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#define CPUCTL_EVAL_CPU_FEATURES _IO('c', 8)
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#endif /* _CPUCTL_H_ */
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@ -119,7 +119,8 @@ void cpu_setregs(void);
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void dump_add_page(vm_paddr_t);
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void dump_drop_page(vm_paddr_t);
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void finishidentcpu(void);
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void identify_cpu(void);
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void identify_cpu1(void);
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void identify_cpu2(void);
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void identify_hypervisor(void);
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void initializecpu(void);
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void initializecpucache(void);
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@ -1385,9 +1385,8 @@ fix_cpuid(void)
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return (false);
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}
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#ifdef __amd64__
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void
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identify_cpu(void)
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identify_cpu1(void)
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{
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u_int regs[4];
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@ -1404,7 +1403,29 @@ identify_cpu(void)
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cpu_feature = regs[3];
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cpu_feature2 = regs[2];
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}
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#endif
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void
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identify_cpu2(void)
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{
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u_int regs[4], cpu_stdext_disable;
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if (cpu_high >= 7) {
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cpuid_count(7, 0, regs);
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cpu_stdext_feature = regs[1];
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/*
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* Some hypervisors failed to filter out unsupported
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* extended features. Allow to disable the
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* extensions, activation of which requires setting a
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* bit in CR4, and which VM monitors do not support.
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*/
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cpu_stdext_disable = 0;
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TUNABLE_INT_FETCH("hw.cpu_stdext_disable", &cpu_stdext_disable);
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cpu_stdext_feature &= ~cpu_stdext_disable;
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cpu_stdext_feature2 = regs[2];
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}
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}
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/*
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* Final stage of CPU identification.
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@ -1412,7 +1433,7 @@ identify_cpu(void)
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void
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finishidentcpu(void)
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{
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u_int regs[4], cpu_stdext_disable;
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u_int regs[4];
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#ifdef __i386__
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u_char ccr3;
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#endif
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@ -1431,22 +1452,7 @@ finishidentcpu(void)
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cpu_mon_max_size = regs[1] & CPUID5_MON_MAX_SIZE;
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}
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if (cpu_high >= 7) {
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cpuid_count(7, 0, regs);
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cpu_stdext_feature = regs[1];
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/*
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* Some hypervisors failed to filter out unsupported
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* extended features. Allow to disable the
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* extensions, activation of which requires setting a
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* bit in CR4, and which VM monitors do not support.
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*/
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cpu_stdext_disable = 0;
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TUNABLE_INT_FETCH("hw.cpu_stdext_disable", &cpu_stdext_disable);
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cpu_stdext_feature &= ~cpu_stdext_disable;
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cpu_stdext_feature2 = regs[2];
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}
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identify_cpu2();
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#ifdef __i386__
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if (cpu_high > 0 &&
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@ -24,7 +24,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd September 30, 2017
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.Dd January 5, 2018
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.Dt CPUCONTROL 8
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.Os
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.Sh NAME
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@ -34,46 +34,51 @@
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device
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.Sh SYNOPSIS
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.Nm
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.Bk
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.Op Fl v
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.Fl m Ar msr
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.Bk
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.Ar device
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.Ek
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.Bk
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.Nm
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.Op Fl v
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.Fl m Ar msr Ns = Ns Ar value
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.Bk
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.Ar device
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.Ek
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.Bk
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.Nm
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.Op Fl v
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.Fl m Ar msr Ns &= Ns Ar mask
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.Bk
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.Ar device
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.Ek
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.Bk
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.Nm
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.Op Fl v
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.Fl m Ar msr Ns |= Ns Ar mask
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.Bk
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.Ar device
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.Ek
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.Bk
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.Nm
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.Op Fl v
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.Fl i Ar level
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.Bk
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.Ar device
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.Ek
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.Bk
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.Nm
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.Op Fl v
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.Fl i Ar level,level_type
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.Bk
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.Ar device
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.Ek
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.Bk
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.Nm
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.Op Fl vn
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.Op Fl d Ar datadir
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.Fl u
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.Ar device
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.Ek
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.Bk
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.Nm
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.Fl e
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.Ar device
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.Ek
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.Sh DESCRIPTION
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@ -136,6 +141,20 @@ The
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.Nm
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utility will walk through the configured data directories
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and apply all firmware updates available for this CPU.
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.It Fl e
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Re-evaluate the kernel flags indicating the present CPU features.
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This command is typically executed after a firmware update was applied
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which changes information reported by the
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.Dv CPUID
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instruction.
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.Pp
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.Bf -symbolic
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Only execute the
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.Fl e
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command after the microcode update was applied to all CPUs in the system.
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The kernel does not operate correctly if the features of processors are
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not identical.
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.Ef
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.It Fl v
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Increase the verbosity level.
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.It Fl h
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@ -63,6 +63,7 @@ int verbosity_level = 0;
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#define FLAG_M 0x02
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#define FLAG_U 0x04
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#define FLAG_N 0x08
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#define FLAG_E 0x10
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#define OP_INVAL 0x00
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#define OP_READ 0x01
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@ -117,7 +118,7 @@ usage(void)
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if (name == NULL)
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name = "cpuctl";
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fprintf(stderr, "Usage: %s [-vh] [-d datadir] [-m msr[=value] | "
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"-i level | -i level,level_type | -u] device\n", name);
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"-i level | -i level,level_type | -e | -u] device\n", name);
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exit(EX_USAGE);
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}
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@ -340,6 +341,25 @@ do_msr(const char *cmdarg, const char *dev)
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return (0);
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}
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static int
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do_eval_cpu_features(const char *dev)
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{
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int fd, error;
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assert(dev != NULL);
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fd = open(dev, O_RDWR);
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if (fd < 0) {
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WARN(0, "error opening %s for writing", dev);
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return (1);
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}
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error = ioctl(fd, CPUCTL_EVAL_CPU_FEATURES, NULL);
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if (error < 0)
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WARN(0, "ioctl(%s, CPUCTL_EVAL_CPU_FEATURES)", dev);
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close(fd);
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return (error);
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}
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static int
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do_update(const char *dev)
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{
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@ -430,11 +450,14 @@ main(int argc, char *argv[])
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error = 0;
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cmdarg = ""; /* To keep gcc3 happy. */
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while ((c = getopt(argc, argv, "d:hi:m:nuv")) != -1) {
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while ((c = getopt(argc, argv, "d:ehi:m:nuv")) != -1) {
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switch (c) {
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case 'd':
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datadir_add(optarg);
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break;
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case 'e':
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flags |= FLAG_E;
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break;
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case 'i':
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flags |= FLAG_I;
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cmdarg = optarg;
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@ -468,22 +491,25 @@ main(int argc, char *argv[])
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if ((flags & FLAG_N) == 0)
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datadir_add(DEFAULT_DATADIR);
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dev = argv[0];
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c = flags & (FLAG_I | FLAG_M | FLAG_U);
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c = flags & (FLAG_E | FLAG_I | FLAG_M | FLAG_U);
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switch (c) {
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case FLAG_I:
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if (strstr(cmdarg, ",") != NULL)
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error = do_cpuid_count(cmdarg, dev);
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else
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error = do_cpuid(cmdarg, dev);
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break;
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case FLAG_M:
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error = do_msr(cmdarg, dev);
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break;
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case FLAG_U:
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error = do_update(dev);
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break;
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default:
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usage(); /* Only one command can be selected. */
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case FLAG_I:
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if (strstr(cmdarg, ",") != NULL)
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error = do_cpuid_count(cmdarg, dev);
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else
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error = do_cpuid(cmdarg, dev);
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break;
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case FLAG_M:
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error = do_msr(cmdarg, dev);
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break;
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case FLAG_U:
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error = do_update(dev);
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break;
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case FLAG_E:
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error = do_eval_cpu_features(dev);
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break;
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default:
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usage(); /* Only one command can be selected. */
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}
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SLIST_FREE(&datadirs, next, free);
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return (error == 0 ? 0 : 1);
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