- Add 99% of a callout based watchdog. The remaining 1% is waiting
for pci_cfg_restore() to be exported. It was tested using a hackily accessed pci_cfg_restore(). - Add ifmedia_removeall() to mxge_detach() in order to stop leaking an ifaddr - Fix a small acounting bug introduced by the locking code shuffle which could cause spurious watchdog resets now that we have a watchdog. Sponsored by: Myricom
This commit is contained in:
Andrew Gallatin
parent
d43c17aa76
commit
dce01b9b27
@ -90,6 +90,7 @@ static int mxge_intr_coal_delay = 30;
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static int mxge_deassert_wait = 1;
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static int mxge_flow_control = 1;
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static int mxge_verbose = 0;
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static int mxge_ticks;
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static char *mxge_fw_unaligned = "mxge_ethp_z8e";
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static char *mxge_fw_aligned = "mxge_eth_z8e";
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@ -2103,12 +2104,6 @@ mxge_intr(void *arg)
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*(sc->irq_claim + 1) = be32toh(3);
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}
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static void
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mxge_watchdog(struct ifnet *ifp)
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{
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printf("%s called\n", __FUNCTION__);
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}
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static void
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mxge_init(void *arg)
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{
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@ -2140,6 +2135,7 @@ mxge_free_mbufs(mxge_softc_t *sc)
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}
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for (i = 0; i <= sc->tx.mask; i++) {
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sc->tx.info[i].flag = 0;
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if (sc->tx.info[i].m == NULL)
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continue;
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bus_dmamap_unload(sc->tx.dmat,
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@ -2401,7 +2397,7 @@ mxge_open(mxge_softc_t *sc)
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}
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bzero(sc->rx_done.entry,
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mxge_max_intr_slots * sizeof(*sc->rx_done.entry));
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if (MCLBYTES >=
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sc->ifp->if_mtu + ETHER_HDR_LEN + MXGEFW_PAD)
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sc->big_bytes = MCLBYTES;
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@ -2533,7 +2529,7 @@ mxge_close(mxge_softc_t *sc)
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}
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if (old_down_cnt == sc->down_cnt) {
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/* wait for down irq */
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DELAY(2 * sc->intr_coal_delay);
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DELAY(10 * sc->intr_coal_delay);
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}
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if (old_down_cnt == sc->down_cnt) {
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device_printf(sc->dev, "never got down irq\n");
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@ -2544,6 +2540,149 @@ mxge_close(mxge_softc_t *sc)
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return 0;
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}
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static void
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mxge_setup_cfg_space(mxge_softc_t *sc)
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{
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device_t dev = sc->dev;
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int reg;
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uint16_t cmd, lnk, pectl;
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/* find the PCIe link width and set max read request to 4KB*/
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if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) {
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lnk = pci_read_config(dev, reg + 0x12, 2);
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sc->link_width = (lnk >> 4) & 0x3f;
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pectl = pci_read_config(dev, reg + 0x8, 2);
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pectl = (pectl & ~0x7000) | (5 << 12);
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pci_write_config(dev, reg + 0x8, pectl, 2);
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}
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/* Enable DMA and Memory space access */
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pci_enable_busmaster(dev);
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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cmd |= PCIM_CMD_MEMEN;
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pci_write_config(dev, PCIR_COMMAND, cmd, 2);
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}
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static uint32_t
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mxge_read_reboot(mxge_softc_t *sc)
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{
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device_t dev = sc->dev;
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uint32_t vs;
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/* find the vendor specific offset */
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if (pci_find_extcap(dev, PCIY_VENDOR, &vs) != 0) {
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device_printf(sc->dev,
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"could not find vendor specific offset\n");
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return (uint32_t)-1;
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}
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/* enable read32 mode */
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pci_write_config(dev, vs + 0x10, 0x3, 1);
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/* tell NIC which register to read */
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pci_write_config(dev, vs + 0x18, 0xfffffff0, 4);
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return (pci_read_config(dev, vs + 0x14, 4));
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}
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static void
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mxge_watchdog_reset(mxge_softc_t *sc)
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{
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int err;
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uint32_t reboot;
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uint16_t cmd;
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err = ENXIO;
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device_printf(sc->dev, "Watchdog reset!\n");
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/*
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* check to see if the NIC rebooted. If it did, then all of
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* PCI config space has been reset, and things like the
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* busmaster bit will be zero. If this is the case, then we
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* must restore PCI config space before the NIC can be used
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* again
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*/
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cmd = pci_read_config(sc->dev, PCIR_COMMAND, 2);
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if (cmd == 0xffff) {
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/*
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* maybe the watchdog caught the NIC rebooting; wait
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* up to 100ms for it to finish. If it does not come
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* back, then give up
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*/
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DELAY(1000*100);
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cmd = pci_read_config(sc->dev, PCIR_COMMAND, 2);
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if (cmd == 0xffff) {
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device_printf(sc->dev, "NIC disappeared!\n");
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goto abort;
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}
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}
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if ((cmd & PCIM_CMD_BUSMASTEREN) == 0) {
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/* print the reboot status */
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reboot = mxge_read_reboot(sc);
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device_printf(sc->dev, "NIC rebooted, status = 0x%x\n",
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reboot);
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/* restore PCI configuration space */
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/* XXXX waiting for pci_cfg_restore() to be exported */
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goto abort; /* just abort for now */
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/* and redo any changes we made to our config space */
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mxge_setup_cfg_space(sc);
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} else {
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device_printf(sc->dev, "NIC did not reboot, ring state:\n");
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device_printf(sc->dev, "tx.req=%d tx.done=%d\n",
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sc->tx.req, sc->tx.done);
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device_printf(sc->dev, "pkt_done=%d fw=%d\n",
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sc->tx.pkt_done,
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be32toh(sc->fw_stats->send_done_count));
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}
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if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING) {
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mxge_close(sc);
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err = mxge_open(sc);
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}
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abort:
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/*
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* stop the watchdog if the nic is dead, to avoid spamming the
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* console
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*/
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if (err != 0) {
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callout_stop(&sc->co_hdl);
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}
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}
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static void
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mxge_watchdog(mxge_softc_t *sc)
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{
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mxge_tx_buf_t *tx = &sc->tx;
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/* see if we have outstanding transmits, which
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have been pending for more than mxge_ticks */
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if (tx->req != tx->done &&
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tx->watchdog_req != tx->watchdog_done &&
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tx->done == tx->watchdog_done)
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mxge_watchdog_reset(sc);
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tx->watchdog_req = tx->req;
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tx->watchdog_done = tx->done;
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}
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static void
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mxge_tick(void *arg)
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{
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mxge_softc_t *sc = arg;
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/* Synchronize with possible callout reset/stop. */
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if (callout_pending(&sc->co_hdl) ||
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!callout_active(&sc->co_hdl)) {
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mtx_unlock(&sc->driver_mtx);
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return;
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}
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callout_reset(&sc->co_hdl, mxge_ticks, mxge_tick, sc);
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mxge_watchdog(sc);
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}
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static int
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mxge_media_change(struct ifnet *ifp)
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@ -2567,6 +2706,7 @@ mxge_change_mtu(mxge_softc_t *sc, int mtu)
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old_mtu = ifp->if_mtu;
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ifp->if_mtu = mtu;
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if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
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callout_stop(&sc->co_hdl);
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mxge_close(sc);
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err = mxge_open(sc);
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if (err != 0) {
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@ -2574,6 +2714,7 @@ mxge_change_mtu(mxge_softc_t *sc, int mtu)
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mxge_close(sc);
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(void) mxge_open(sc);
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}
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callout_reset(&sc->co_hdl, mxge_ticks, mxge_tick, sc);
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}
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mtx_unlock(&sc->driver_mtx);
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return err;
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@ -2614,9 +2755,11 @@ mxge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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case SIOCSIFFLAGS:
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mtx_lock(&sc->driver_mtx);
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if (ifp->if_flags & IFF_UP) {
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if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
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if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
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err = mxge_open(sc);
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else {
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callout_reset(&sc->co_hdl, mxge_ticks,
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mxge_tick, sc);
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} else {
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/* take care of promis can allmulti
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flag chages */
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mxge_change_promisc(sc,
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@ -2624,8 +2767,10 @@ mxge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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mxge_set_multicast_list(sc);
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}
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} else {
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if (ifp->if_drv_flags & IFF_DRV_RUNNING)
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if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
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mxge_close(sc);
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callout_stop(&sc->co_hdl);
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}
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}
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mtx_unlock(&sc->driver_mtx);
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break;
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@ -2701,11 +2846,14 @@ mxge_fetch_tunables(mxge_softc_t *sc)
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&mxge_deassert_wait);
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TUNABLE_INT_FETCH("hw.mxge.verbose",
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&mxge_verbose);
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TUNABLE_INT_FETCH("hw.mxge.ticks", &mxge_ticks);
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if (bootverbose)
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mxge_verbose = 1;
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if (mxge_intr_coal_delay < 0 || mxge_intr_coal_delay > 10*1000)
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mxge_intr_coal_delay = 30;
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if (mxge_ticks == 0)
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mxge_ticks = hz;
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sc->pause = mxge_flow_control;
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}
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@ -2715,8 +2863,7 @@ mxge_attach(device_t dev)
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mxge_softc_t *sc = device_get_softc(dev);
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struct ifnet *ifp;
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size_t bytes;
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int count, rid, err, reg;
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uint16_t cmd, pectl, lnk;
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int count, rid, err;
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sc->dev = dev;
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mxge_fetch_tunables(sc);
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@ -2757,22 +2904,10 @@ mxge_attach(device_t dev)
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mtx_init(&sc->driver_mtx, sc->driver_mtx_name,
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MTX_NETWORK_LOCK, MTX_DEF);
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/* find the PCIe link width and set max read request to 4KB*/
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if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) {
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lnk = pci_read_config(dev, reg + 0x12, 2);
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sc->link_width = (lnk >> 4) & 0x3f;
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pectl = pci_read_config(dev, reg + 0x8, 2);
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pectl = (pectl & ~0x7000) | (5 << 12);
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pci_write_config(dev, reg + 0x8, pectl, 2);
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}
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/* Enable DMA and Memory space access */
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pci_enable_busmaster(dev);
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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cmd |= PCIM_CMD_MEMEN;
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pci_write_config(dev, PCIR_COMMAND, cmd, 2);
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callout_init_mtx(&sc->co_hdl, &sc->driver_mtx, 0);
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mxge_setup_cfg_space(sc);
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/* Map the board into the kernel */
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rid = PCIR_BARS;
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sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0,
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@ -2888,7 +3023,6 @@ mxge_attach(device_t dev)
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_ioctl = mxge_ioctl;
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ifp->if_start = mxge_start;
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ifp->if_watchdog = mxge_watchdog;
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ether_ifattach(ifp, sc->mac_addr);
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/* ether_ifattach sets mtu to 1500 */
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ifp->if_mtu = MXGE_MAX_ETHER_MTU - ETHER_HDR_LEN;
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@ -2941,8 +3075,10 @@ mxge_detach(device_t dev)
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mtx_lock(&sc->driver_mtx);
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if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING)
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mxge_close(sc);
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callout_stop(&sc->co_hdl);
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mtx_unlock(&sc->driver_mtx);
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ether_ifdetach(sc->ifp);
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ifmedia_removeall(&sc->media);
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mxge_dummy_rdma(sc, 0);
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bus_teardown_intr(sc->dev, sc->irq_res, sc->ih);
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mxge_free_rings(sc);
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@ -108,7 +108,8 @@ typedef struct
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int boundary; /* boundary transmits cannot cross*/
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int stall; /* #times hw queue exhausted */
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int wake; /* #times irq re-enabled xmit */
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int watchdog_req; /* cache of req */
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int watchdog_done; /* cache of done */
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} mxge_tx_buf_t;
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typedef struct {
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@ -160,6 +161,7 @@ typedef struct {
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int fw_multicast_support;
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int link_width;
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mxge_dma_t dmabench_dma;
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struct callout co_hdl;
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char *mac_addr_string;
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char product_code_string[64];
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char serial_number_string[64];
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