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[iwm] Fix several nitpicks in iwm(4).

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Move some declarations to if_iwmreg.h.
    Remove iwm_fw_alive(); just call iwm_post_alive() directly.
    Simplify iwm_mvm_add_sta().
    Return timeout error from iwm_apm_init().
    Print a message when init (i.e. boot) firmware fails to load.
    Remove some commented-out code which wouldn't compile anyway.
    Move iwm_mvm_tx_fifo to if_iwmreg.h to match better where Linux puts it.

    Taken-From: OpenBSD (if_iwm.c r1.80 and if_iwmreg.h r1.11)

Submitted by:	 Imre Vadasz <imre@vdsz.com>
Obtained from:	DragonflyBSD 29fcb331e5620ae145a6ab9cdda830e22fff626a
This commit is contained in:
adrian 2016-06-02 05:43:16 +00:00
parent fc563e2554
commit e0537e6ebb
5 changed files with 56 additions and 86 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
sys/dev/iwm/if_iwm.c
View File

@ -265,7 +265,6 @@ static int iwm_firmware_load_chunk(struct iwm_softc *, uint32_t,
const uint8_t *, uint32_t);
static int iwm_load_firmware(struct iwm_softc *, enum iwm_ucode_type);
static int iwm_start_fw(struct iwm_softc *, enum iwm_ucode_type);
static int iwm_fw_alive(struct iwm_softc *, uint32_t);
static int iwm_send_tx_ant_cfg(struct iwm_softc *, uint8_t);
static int iwm_send_phy_cfg_cmd(struct iwm_softc *);
static int iwm_mvm_load_ucode_wait_alive(struct iwm_softc *,
@ -1353,14 +1352,6 @@ iwm_nic_init(struct iwm_softc *sc)
return 0;
}
enum iwm_mvm_tx_fifo {
IWM_MVM_TX_FIFO_BK = 0,
IWM_MVM_TX_FIFO_BE,
IWM_MVM_TX_FIFO_VI,
IWM_MVM_TX_FIFO_VO,
IWM_MVM_TX_FIFO_MCAST = 5,
};
const uint8_t iwm_mvm_ac_to_tx_fifo[] = {
IWM_MVM_TX_FIFO_VO,
IWM_MVM_TX_FIFO_VI,
@ -2004,12 +1995,6 @@ iwm_start_fw(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
return iwm_load_firmware(sc, ucode_type);
}
static int
iwm_fw_alive(struct iwm_softc *sc, uint32_t sched_base)
{
return iwm_post_alive(sc);
}
static int
iwm_send_tx_ant_cfg(struct iwm_softc *sc, uint8_t valid_tx_ant)
{
@ -2058,7 +2043,7 @@ iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc,
return error;
}
return iwm_fw_alive(sc, sc->sched_base);
return iwm_post_alive(sc);
}
/*
@ -2082,8 +2067,10 @@ iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm)
sc->sc_init_complete = 0;
if ((error = iwm_mvm_load_ucode_wait_alive(sc,
IWM_UCODE_TYPE_INIT)) != 0)
IWM_UCODE_TYPE_INIT)) != 0) {
device_printf(sc->sc_dev, "failed to load init firmware\n");
return error;
}
if (justnvm) {
if ((error = iwm_nvm_init(sc)) != 0) {
@ -3022,13 +3009,7 @@ iwm_mvm_sta_send_to_fw(struct iwm_softc *sc, struct iwm_node *in, int update)
static int
iwm_mvm_add_sta(struct iwm_softc *sc, struct iwm_node *in)
{
int ret;
ret = iwm_mvm_sta_send_to_fw(sc, in, 0);
if (ret)
return ret;
return 0;
return iwm_mvm_sta_send_to_fw(sc, in, 0);
}
static int

4
sys/dev/iwm/if_iwm_pcie_trans.c
View File

@ -363,6 +363,8 @@ iwm_prepare_card_hw(struct iwm_softc *sc)
if (iwm_set_hw_ready(sc))
goto out;
DELAY(100);
/* If HW is not ready, prepare the conditions to check again */
IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
IWM_CSR_HW_IF_CONFIG_REG_PREPARE);
@ -456,7 +458,7 @@ iwm_apm_init(struct iwm_softc *sc)
IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000)) {
device_printf(sc->sc_dev,
"timeout waiting for clock stabilization\n");
error = ETIMEDOUT;
goto out;
}

35
sys/dev/iwm/if_iwm_phy_db.h
View File

@ -106,41 +106,6 @@
#ifndef __IF_IWM_PHY_DB_H__
#define __IF_IWM_PHY_DB_H__
enum iwm_phy_db_section_type {
IWM_PHY_DB_CFG = 1,
IWM_PHY_DB_CALIB_NCH,
IWM_PHY_DB_UNUSED,
IWM_PHY_DB_CALIB_CHG_PAPD,
IWM_PHY_DB_CALIB_CHG_TXP,
IWM_PHY_DB_MAX
};
#define IWM_PHY_DB_CMD 0x6c /* TEMP API - The actual is 0x8c */
/*
* phy db - configure operational ucode
*/
struct iwm_phy_db_cmd {
uint16_t type;
uint16_t length;
uint8_t data[];
} __packed;
/* for parsing of tx power channel group data that comes from the firmware*/
struct iwm_phy_db_chg_txp {
uint32_t space;
uint16_t max_channel_idx;
} __packed;
/*
* phy db - Receive phy db chunk after calibrations
*/
struct iwm_calib_res_notif_phy_db {
uint16_t type;
uint16_t length;
uint8_t data[];
} __packed;
extern int iwm_phy_db_set_section(struct iwm_softc *sc,
struct iwm_calib_res_notif_phy_db *phy_db_notif);
extern int iwm_send_phy_db_data(struct iwm_softc *sc);

24
sys/dev/iwm/if_iwm_power.c
View File

@ -233,30 +233,6 @@ iwm_mvm_power_log(struct iwm_softc *sc, struct iwm_mac_power_cmd *cmd)
"Disable power management\n");
return;
}
KASSERT(0, ("unhandled power management"));
#if 0
DPRINTF(mvm, "Rx timeout = %u usec\n",
le32_to_cpu(cmd->rx_data_timeout));
DPRINTF(mvm, "Tx timeout = %u usec\n",
le32_to_cpu(cmd->tx_data_timeout));
if (cmd->flags & cpu_to_le16(IWM_POWER_FLAGS_SKIP_OVER_DTIM_MSK))
DPRINTF(mvm, "DTIM periods to skip = %u\n",
cmd->skip_dtim_periods);
if (cmd->flags & cpu_to_le16(IWM_POWER_FLAGS_LPRX_ENA_MSK))
DPRINTF(mvm, "LP RX RSSI threshold = %u\n",
cmd->lprx_rssi_threshold);
if (cmd->flags & cpu_to_le16(IWM_POWER_FLAGS_ADVANCE_PM_ENA_MSK)) {
DPRINTF(mvm, "uAPSD enabled\n");
DPRINTF(mvm, "Rx timeout (uAPSD) = %u usec\n",
le32_to_cpu(cmd->rx_data_timeout_uapsd));
DPRINTF(mvm, "Tx timeout (uAPSD) = %u usec\n",
le32_to_cpu(cmd->tx_data_timeout_uapsd));
DPRINTF(mvm, "QNDP TID = %d\n", cmd->qndp_tid);
DPRINTF(mvm, "ACs flags = 0x%x\n", cmd->uapsd_ac_flags);
DPRINTF(mvm, "Max SP = %d\n", cmd->uapsd_max_sp);
}
#endif
}
static void

50
sys/dev/iwm/if_iwmreg.h
View File

@ -539,7 +539,7 @@ enum iwm_dtd_diode_reg {
*/
/**
* enum iwl_ucode_tlv_flag - ucode API flags
* enum iwm_ucode_tlv_flag - ucode API flags
* @IWM_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
* was a separate TLV but moved here to save space.
* @IWM_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behaviour on hidden SSID,
@ -1519,7 +1519,14 @@ enum {
IWM_MVM_CMD_QUEUE = 9,
};
#define IWM_MVM_CMD_FIFO 7
enum iwm_mvm_tx_fifo {
IWM_MVM_TX_FIFO_BK = 0,
IWM_MVM_TX_FIFO_BE,
IWM_MVM_TX_FIFO_VI,
IWM_MVM_TX_FIFO_VO,
IWM_MVM_TX_FIFO_MCAST = 5,
IWM_MVM_TX_FIFO_CMD = 7,
};
#define IWM_MVM_STATION_COUNT 16
@ -1741,6 +1748,45 @@ struct iwm_phy_cfg_cmd {
#define IWM_PHY_CFG_RX_CHAIN_B (1 << 13)
#define IWM_PHY_CFG_RX_CHAIN_C (1 << 14)
/*
* PHY db
*/
enum iwm_phy_db_section_type {
IWM_PHY_DB_CFG = 1,
IWM_PHY_DB_CALIB_NCH,
IWM_PHY_DB_UNUSED,
IWM_PHY_DB_CALIB_CHG_PAPD,
IWM_PHY_DB_CALIB_CHG_TXP,
IWM_PHY_DB_MAX
};
#define IWM_PHY_DB_CMD 0x6c /* TEMP API - The actual is 0x8c */
/*
* phy db - configure operational ucode
*/
struct iwm_phy_db_cmd {
uint16_t type;
uint16_t length;
uint8_t data[];
} __packed;
/* for parsing of tx power channel group data that comes from the firmware */
struct iwm_phy_db_chg_txp {
uint32_t space;
uint16_t max_channel_idx;
} __packed;
/*
* phy db - Receive phy db chunk after calibrations
*/
struct iwm_calib_res_notif_phy_db {
uint16_t type;
uint16_t length;
uint8_t data[];
} __packed;
/* Target of the IWM_NVM_ACCESS_CMD */
enum {