fix support for shared IRQ's.
fix support for multiple HPT & Promise controllers. support mixed 33/66 devices on the Promise 66 controllers. fix the refcount stuff in the atapi drivers. misc cleanups.
This commit is contained in:
sos
parent
ffc4c1858f
commit
e12f0fb097
@ -328,7 +328,8 @@ ata_pciattach(device_t dev)
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/* is this controller busmaster DMA capable ? */
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if (pci_get_progif(dev) & PCIP_STORAGE_IDE_MASTERDEV) {
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/* is busmastering support turned on ? */
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if ((pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4) & 5) == 5) {
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if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) ==
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(PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) {
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/* is there a valid port range to connect to ? */
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if ((bmaddr_1 = pci_read_config(dev, 0x20, 4) & IOMASK))
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bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
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@ -355,12 +356,18 @@ ata_pciattach(device_t dev)
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pci_write_config(dev, 0x53,
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(pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
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break;
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case 0x4d38105a: /* Promise 66's need their clock changed */
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outb(bmaddr_1 + 0x11, inb(bmaddr_1 + 0x11) | 0x0a);
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/* FALLTHROUGH */
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case 0x4d33105a:
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case 0x4d38105a: /* Promise's need burst mode to be turned on */
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case 0x4d33105a: /* Promise's need burst mode to be turned on */
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outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
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break;
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case 0x00041103: /* HPT366 turn of fast interrupt prediction */
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pci_write_config(dev, 0x51, (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
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break;
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case 0x05711106:
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case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */
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/* set prefetch, postwrite */
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@ -381,10 +388,17 @@ ata_pciattach(device_t dev)
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pci_write_config(dev, 0x60, DEV_BSIZE, 2);
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pci_write_config(dev, 0x68, DEV_BSIZE, 2);
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/* prepare for ATA-66 on the 82C686 */
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if (ata_find_dev(dev, 0x06861106))
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/* set the chiptype to the hostchip ID, makes life easier */
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if (ata_find_dev(dev, 0x05861106))
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type = 0x05861106;
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if (ata_find_dev(dev, 0x05961106))
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type = 0x05961106;
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if (ata_find_dev(dev, 0x06861106)) {
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type = 0x06861106;
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/* prepare for ATA-66 on the 82C686 */
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pci_write_config(dev, 0x50,
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pci_read_config(dev, 0x50, 4) | 0x070f070f, 4);
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}
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break;
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}
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@ -736,15 +750,40 @@ static void
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ataintr(void *data)
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{
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struct ata_softc *scp = (struct ata_softc *)data;
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u_int8_t dmastat;
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/* check if this interrupt is for us (shared PCI interrupts) */
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/* if DMA active look at the dmastatus */
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if ((scp->flags & ATA_DMA_ACTIVE) &&
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!(ata_dmastatus(scp) & ATA_BMSTAT_INTERRUPT))
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/*
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* since we might share the IRQ with another device, and in some
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* case with our twin channel, we only want to process interrupts
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* that we know this channel generated.
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*/
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switch (scp->chiptype) {
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#if NPCI > 0
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case 0x00041103: /* HighPoint HPT366 */
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if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
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return;
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outb(scp->bmaddr + ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
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break;
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/* if drive is busy it didn't interrupt */
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if (((scp->status = inb(scp->ioaddr + ATA_STATUS))&ATA_S_BUSY)==ATA_S_BUSY)
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case 0x4d33105a: /* Promise 33's */
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case 0x4d38105a: /* Promise 66's */
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if (!(inl((pci_read_config(scp->dev, 0x20, 4) & IOMASK) + 0x1c) &
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((scp->unit) ? 0x00004000 : 0x00000400)))
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return;
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/* FALLTHROUGH */
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#endif
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default:
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if (scp->flags & ATA_DMA_ACTIVE) {
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if (!(dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)
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return;
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else
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outb(scp->bmaddr+ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT);
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}
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}
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DELAY(1);
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/* get status, if drive is busy it didn't interrupt so return */
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if ((scp->status = inb(scp->ioaddr + ATA_STATUS)) & ATA_S_BUSY)
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return;
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/* find & call the responsible driver to process this interrupt */
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@ -794,8 +833,12 @@ ataintr(void *data)
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void
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ata_start(struct ata_softc *scp)
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{
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#if NATADISK > 0
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struct ad_request *ad_request;
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#endif
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#if NATAPICD > 0 || NATAPIFD > 0 || NATAPIST > 0
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struct atapi_request *atapi_request;
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#endif
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if (scp->active != ATA_IDLE)
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return;
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@ -1099,8 +1142,14 @@ active2str(int32_t active)
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switch (active) {
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case ATA_IDLE:
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return("ATA_IDLE");
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case ATA_IMMEDIATE:
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return("ATA_IMMEDIATE");
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case ATA_WAIT_INTR:
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return("ATA_WAIT_INTR");
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case ATA_WAIT_READY:
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return("ATA_WAIT_READY");
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case ATA_ACTIVE:
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return("ATA_ACTIVE");
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case ATA_ACTIVE_ATA:
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return("ATA_ACTIVE_ATA");
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case ATA_ACTIVE_ATAPI:
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@ -459,10 +459,10 @@ ad_interrupt(struct ad_request *request)
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/* did any real errors happen ? */
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if ((adp->controller->status & ATA_S_ERROR) ||
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(request->flags & AR_F_DMA_USED && dma_stat != ATA_BMSTAT_INTERRUPT)) {
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((request->flags & AR_F_DMA_USED) && (dma_stat & ATA_BMSTAT_ERROR))) {
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oops:
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printf("ad%d: %s %s ERROR blk# %d", adp->lun,
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(adp->controller->error & ATA_E_ICRC) ? "UDMA CRC" : "HARD",
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(adp->controller->error & ATA_E_ICRC) ? "UDMA ICRC" : "HARD",
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(request->flags & AR_F_READ) ? "READ" : "WRITE",
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request->blockaddr + (request->donecount / DEV_BSIZE));
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@ -255,40 +255,37 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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/* we could set PIO mode timings, but we assume the BIOS did that */
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break;
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case 0x05711106: /* VIA 82C571, 82C586, 82C596 & 82C686 */
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case 0x74091022: /* AMD 756 */
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/* UDMA modes on 82C686 */
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if (ata_find_dev(scp->dev, 0x06861106)) {
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if (udmamode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
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if (bootverbose)
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ata_printf(scp, device,
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"%s setting up UDMA4 mode on VIA chip\n",
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(error) ? "failed" : "success");
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if (!error) {
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pci_write_config(scp->dev, 0x53 - devno, 0xe8, 1);
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scp->mode[ATA_DEV(device)] = ATA_UDMA4;
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return;
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}
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}
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if (udmamode >= 2) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
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if (bootverbose)
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ata_printf(scp, device,
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"%s setting up UDMA2 mode on VIA chip\n",
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(error) ? "failed" : "success");
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if (!error) {
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pci_write_config(scp->dev, 0x53 - devno, 0xea, 1);
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scp->mode[ATA_DEV(device)] = ATA_UDMA2;
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return;
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}
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case 0x06861106: /* VIA 82C686 */
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if (udmamode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
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if (bootverbose)
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ata_printf(scp, device,
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"%s setting up UDMA4 mode on VIA chip\n",
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(error) ? "failed" : "success");
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if (!error) {
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pci_write_config(scp->dev, 0x53 - devno, 0xe8, 1);
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scp->mode[ATA_DEV(device)] = ATA_UDMA4;
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return;
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}
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}
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if (udmamode >= 2) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
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if (bootverbose)
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ata_printf(scp, device,
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"%s setting up UDMA2 mode on VIA chip\n",
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(error) ? "failed" : "success");
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if (!error) {
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pci_write_config(scp->dev, 0x53 - devno, 0xea, 1);
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scp->mode[ATA_DEV(device)] = ATA_UDMA2;
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return;
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}
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}
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goto via_generic;
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/* UDMA4 mode on AMD 756 */
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if (udmamode >= 4 && scp->chiptype == 0x74091022) {
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case 0x74091022: /* AMD 756 */
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if (udmamode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
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if (bootverbose)
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@ -301,11 +298,15 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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return;
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}
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}
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/* FALLTHROUGH */
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case 0x05961106: /* VIA 82C596 */
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case 0x05861106: /* VIA 82C586 */
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/* UDMA2 mode only on 82C586 > rev1, 82C596, AMD 756 */
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if ((udmamode >= 2 && ata_find_dev(scp->dev, 0x05861106) &&
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if ((udmamode >= 2 && scp->chiptype == 0x05861106 &&
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pci_read_config(scp->dev, 0x08, 1) >= 0x01) ||
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(udmamode >= 2 && ata_find_dev(scp->dev, 0x05961106)) ||
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(udmamode >= 2 && scp->chiptype == 0x05961106) ||
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(udmamode >= 2 && scp->chiptype == 0x74091022)) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
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@ -319,6 +320,10 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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return;
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}
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}
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/* FALLTHROUGH */
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case 0x05711106: /* VIA 82C571 */
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via_generic:
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if (wdmamode >= 2 && apiomode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
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@ -382,7 +387,6 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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"%s setting up UDMA4 mode on Promise chip\n",
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(error) ? "failed" : "success");
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if (!error) {
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outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2);
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promise_timing(scp, devno, ATA_UDMA4);
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scp->mode[ATA_DEV(device)] = ATA_UDMA4;
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return;
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@ -512,8 +516,16 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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}
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}
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}
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ata_pio2mode(apiomode), ATA_C_F_SETXFER,ATA_WAIT_READY);
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if (bootverbose)
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ata_printf(scp, device, "using PIO mode set by BIOS\n");
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ata_printf(scp, device, "%s setting up PIO%d mode on generic chip\n",
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(error) ? "failed" : "success", apiomode < 0 ? 0 : apiomode);
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if (!error)
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scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
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else
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if (bootverbose)
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ata_printf(scp, device, "using PIO mode set by BIOS\n");
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}
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int32_t
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@ -586,17 +598,55 @@ ata_dmastatus(struct ata_softc *scp)
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static void
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promise_timing(struct ata_softc *scp, int32_t devno, int32_t mode)
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{
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u_int32_t timing;
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switch (mode) {
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default:
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case ATA_PIO0: timing = 0x004ff329; break;
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case ATA_PIO1: timing = 0x004fec25; break;
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case ATA_PIO2: timing = 0x004fe823; break;
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case ATA_PIO3: timing = 0x004fe622; break;
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case ATA_PIO4: timing = 0x004fe421; break;
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case ATA_WDMA2: timing = 0x004367f3; break;
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case ATA_UDMA2: timing = 0x004127f3; break;
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case ATA_UDMA4: timing = 0x004127f3; break;
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u_int32_t timing = 0;
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struct promise_timing {
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u_int8_t pa:4;
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u_int8_t prefetch:1;
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u_int8_t iordy:1;
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u_int8_t errdy:1;
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u_int8_t syncin:1;
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u_int8_t pb:5;
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u_int8_t mb:3;
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u_int8_t mc:4;
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u_int8_t dmaw:1;
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u_int8_t dmar:1;
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u_int8_t iordyp:1;
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u_int8_t dmarqp:1;
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u_int8_t reserved:8;
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} *t = (struct promise_timing*)&timing;
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t->iordy = 1; t->iordyp = 1;
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if (mode >= ATA_DMA) {
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t->prefetch = 1; t->errdy = 1; t->syncin = 1;
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}
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switch (scp->chiptype) {
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case 0x4d33105a: /* Promise 33's */
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switch (mode) {
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default:
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case ATA_PIO0: t->pa = 9; t->pb = 19; t->mb = 7; t->mc = 15; break;
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case ATA_PIO1: t->pa = 5; t->pb = 12; t->mb = 7; t->mc = 15; break;
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case ATA_PIO2: t->pa = 3; t->pb = 8; t->mb = 7; t->mc = 15; break;
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case ATA_PIO3: t->pa = 2; t->pb = 6; t->mb = 7; t->mc = 15; break;
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case ATA_PIO4: t->pa = 1; t->pb = 4; t->mb = 7; t->mc = 15; break;
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case ATA_WDMA2: t->pa = 3; t->pb = 7; t->mb = 3; t->mc = 3; break;
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case ATA_UDMA2: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break;
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}
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break;
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case 0x4d38105a: /* Promise 66's */
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switch (mode) {
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default:
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case ATA_PIO0: t->pa = 15; t->pb = 31; t->mb = 7; t->mc = 15; break;
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case ATA_PIO1: t->pa = 10; t->pb = 24; t->mb = 7; t->mc = 15; break;
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case ATA_PIO2: t->pa = 6; t->pb = 16; t->mb = 7; t->mc = 15; break;
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case ATA_PIO3: t->pa = 4; t->pb = 12; t->mb = 7; t->mc = 15; break;
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case ATA_PIO4: t->pa = 2; t->pb = 8; t->mb = 7; t->mc = 15; break;
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case ATA_WDMA2: t->pa = 6; t->pb = 14; t->mb = 6; t->mc = 6; break;
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case ATA_UDMA2: t->pa = 6; t->pb = 14; t->mb = 2; t->mc = 2; break;
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case ATA_UDMA4: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break;
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}
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break;
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}
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pci_write_config(scp->dev, 0x60 + (devno << 2), timing, 4);
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}
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@ -647,7 +697,7 @@ hpt366_timing(struct ata_softc *scp, int32_t devno, int32_t mode)
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default: timing = 0x0120d9d9;
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}
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}
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pci_write_config(scp->dev, 0x40 + (devno << 2) , timing, 4);
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pci_write_config(scp->dev, 0x40 + (devno << 2) , (timing & ~0x80000000), 4);
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}
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#else /* NPCI > 0 */
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@ -285,7 +285,7 @@ atapi_interrupt(struct atapi_request *request)
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dma_stat = ata_dmadone(atp->controller);
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atp->flags &= ~ATAPI_F_DMA_USED;
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if ((atp->controller->status & (ATA_S_ERROR | ATA_S_DWF)) ||
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dma_stat != ATA_BMSTAT_INTERRUPT) {
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dma_stat & ATA_BMSTAT_ERROR) {
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request->result = inb(atp->controller->ioaddr + ATA_ERROR);
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}
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else {
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@ -69,7 +69,7 @@ static struct cdevsw acd_cdevsw = {
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/* maj */ 117,
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/* dump */ nodump,
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/* psize */ nopsize,
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/* flags */ D_DISK,
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/* flags */ D_DISK | D_TRACKCLOSE,
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/* bmaj */ 31
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};
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@ -207,7 +207,6 @@ acd_init_lun(struct atapi_softc *atp, int32_t lun, struct devstat *stats)
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acd->lun = lun;
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acd->flags &= ~(F_WRITTEN|F_DISK_OPEN|F_TRACK_OPEN);
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acd->block_size = 2048;
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acd->refcnt = 0;
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acd->slot = -1;
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acd->changer_info = NULL;
|
||||
acd->atp->flags |= ATAPI_F_MEDIA_CHANGED;
|
||||
@ -458,7 +457,7 @@ acdopen(dev_t dev, int32_t flags, int32_t fmt, struct proc *p)
|
||||
cdp->flags |= F_WRITING;
|
||||
}
|
||||
|
||||
if (!cdp->refcnt) {
|
||||
if (!cdp->refcnt++) {
|
||||
acd_prevent_allow(cdp, 1);
|
||||
cdp->flags |= F_LOCKED;
|
||||
if (!(flags & O_NONBLOCK) && !(flags & FWRITE))
|
||||
@ -466,7 +465,6 @@ acdopen(dev_t dev, int32_t flags, int32_t fmt, struct proc *p)
|
||||
else
|
||||
atapi_test_ready(cdp->atp);
|
||||
}
|
||||
cdp->refcnt++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -475,10 +473,7 @@ acdclose(dev_t dev, int32_t flags, int32_t fmt, struct proc *p)
|
||||
{
|
||||
struct acd_softc *cdp = dev->si_drv1;
|
||||
|
||||
cdp->refcnt--;
|
||||
|
||||
/* are we the last open ?? */
|
||||
if (!cdp->refcnt)
|
||||
if (!--cdp->refcnt)
|
||||
acd_prevent_allow(cdp, 0);
|
||||
|
||||
cdp->flags &= ~(F_LOCKED | F_WRITING);
|
||||
@ -1396,8 +1391,6 @@ acd_report_key(struct acd_softc *cdp, struct dvd_authinfo *ai)
|
||||
int16_t length;
|
||||
int8_t ccb[16];
|
||||
|
||||
printf("dvd_report_key: format=0x%x\n", ai->format);
|
||||
|
||||
switch (ai->format) {
|
||||
case DVD_REPORT_AGID:
|
||||
case DVD_REPORT_ASF:
|
||||
@ -1488,8 +1481,6 @@ acd_send_key(struct acd_softc *cdp, struct dvd_authinfo *ai)
|
||||
int16_t length;
|
||||
int8_t ccb[16];
|
||||
|
||||
printf("dvd_send_key: format=0x%x\n", ai->format);
|
||||
|
||||
bzero(&d, sizeof(d));
|
||||
|
||||
switch (ai->format) {
|
||||
@ -1532,8 +1523,6 @@ acd_read_structure(struct acd_softc *cdp, struct dvd_struct *s)
|
||||
int32_t error = 0;
|
||||
int8_t ccb[16];
|
||||
|
||||
printf("dvd_read_structure: format=0x%x\n", s->format);
|
||||
|
||||
bzero(&d, sizeof(d));
|
||||
|
||||
switch(s->format) {
|
||||
|
||||
@ -65,8 +65,8 @@ static struct cdevsw afd_cdevsw = {
|
||||
/* maj */ 118,
|
||||
/* dump */ nodump,
|
||||
/* psize */ nopsize,
|
||||
/* flags */ D_DISK,
|
||||
/* bmaj */ 32,
|
||||
/* flags */ D_DISK | D_TRACKCLOSE,
|
||||
/* bmaj */ 32
|
||||
};
|
||||
static struct cdevsw afddisk_cdevsw;
|
||||
|
||||
@ -215,7 +215,8 @@ afdopen(dev_t dev, int32_t flags, int32_t fmt, struct proc *p)
|
||||
|
||||
atapi_test_ready(fdp->atp);
|
||||
|
||||
afd_prevent_allow(fdp, 1);
|
||||
if (!fdp->refcnt++)
|
||||
afd_prevent_allow(fdp, 1);
|
||||
|
||||
if (afd_sense(fdp))
|
||||
printf("afd%d: sense media type failed\n", fdp->lun);
|
||||
@ -237,7 +238,8 @@ afdclose(dev_t dev, int32_t flags, int32_t fmt, struct proc *p)
|
||||
{
|
||||
struct afd_softc *fdp = dev->si_drv1;
|
||||
|
||||
afd_prevent_allow(fdp, 0);
|
||||
if (!--fdp->refcnt)
|
||||
afd_prevent_allow(fdp, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -248,12 +250,12 @@ afdioctl(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, struct proc *p)
|
||||
|
||||
switch (cmd) {
|
||||
case CDIOCEJECT:
|
||||
if ((fdp->flags & F_OPEN) && fdp->refcnt)
|
||||
if (fdp->refcnt > 1)
|
||||
return EBUSY;
|
||||
return afd_eject(fdp, 0);
|
||||
|
||||
case CDIOCCLOSE:
|
||||
if ((fdp->flags & F_OPEN) && fdp->refcnt)
|
||||
if (fdp->refcnt > 1)
|
||||
return 0;
|
||||
return afd_eject(fdp, 1);
|
||||
|
||||
|
||||
@ -73,9 +73,6 @@ struct afd_cappage {
|
||||
struct afd_softc {
|
||||
struct atapi_softc *atp; /* controller structure */
|
||||
int32_t lun; /* logical device unit */
|
||||
int32_t flags; /* device state flags */
|
||||
#define F_OPEN 0x0001 /* the device is opened */
|
||||
|
||||
int32_t refcnt; /* the number of raw opens */
|
||||
int32_t transfersize; /* max size of each transfer */
|
||||
struct buf_queue_head buf_queue; /* queue of i/o requests */
|
||||
|
||||
@ -64,7 +64,7 @@ static struct cdevsw ast_cdevsw = {
|
||||
/* maj */ 119,
|
||||
/* dump */ nodump,
|
||||
/* psize */ nopsize,
|
||||
/* flags */ D_TAPE,
|
||||
/* flags */ D_TAPE | D_TRACKCLOSE,
|
||||
/* bmaj */ -1
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user