In compiler-rt, a few assembler implementations for i386 floating point
conversion functions use SSE2 instructions, but these are not guarded by #ifdef __SSE2__, and there is no implementation using general purpose registers. For these functions, use the generic C variants instead, otherwise they will cause SIGILL on older processors. Reported by: bsdpr@phoe.frmug.org PR: 221733 MFC after: 1 week
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@ -57,18 +57,12 @@ SRCF+= fixunsxfsi
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SRCF+= fixunsxfti
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SRCF+= fixxfdi
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SRCF+= fixxfti
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SRCF+= floatdidf
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SRCF+= floatdisf
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SRCF+= floatditf
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SRCF+= floatdixf
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SRCF+= floatsitf
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SRCF+= floattidf
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SRCF+= floattisf
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SRCF+= floattixf
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SRCF+= floatundidf
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SRCF+= floatundisf
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SRCF+= floatunditf
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SRCF+= floatundixf
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SRCF+= floatunsidf
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SRCF+= floatunsisf
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SRCF+= floatuntidf
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@ -128,6 +122,23 @@ SRCF+= umoddi3
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SRCF+= umodsi3
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SRCF+= umodti3
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# Avoid using SSE2 instructions on i386.
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.if ${MACHINE_CPUARCH} == "i386"
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SRCS+= floatdidf.c
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SRCS+= floatdisf.c
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SRCS+= floatdixf.c
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SRCS+= floatundidf.c
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SRCS+= floatundisf.c
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SRCS+= floatundixf.c
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.else
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SRCF+= floatdidf
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SRCF+= floatdisf
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SRCF+= floatdixf
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SRCF+= floatundidf
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SRCF+= floatundisf
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SRCF+= floatundixf
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.endif
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# __cpu_model support, only used on x86
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.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
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SRCF+= cpu_model
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